Texas Instruments THS3491RGT EVM Manual de usuario

SLOU483–August 2017

THS3491RGT Evaluation Module

User's Guide

SLOU483–August 2017

THS3491RGT Evaluation Module

This document provides information about the evaluation module of the amplifier under test. Additionally,

this document provides a good example of printed-circuit board (PCB) design for high-speed applications.

Remember the following points:

• TI recommends initially reviewing the data sheet of the device under test.

• Review the schematic and layout of the THS3491RGT EVM to determine the design techniques used

in the evaluation board.

• The high-speed amplifier PCB design should be approached with care and special attention must be

provided to the board parasitic which impacts the overall system performance.

Contents

1 Introduction ................................................................................................................... 2

2 EVM Default Configuration ................................................................................................. 3

3 Using the THS3491 EVM................................................................................................... 5

4 High-Speed Amplifier PCB Layout Tips................................................................................... 6

5 EVM Hardware Description................................................................................................. 7

List of Figures

1 THS3491RGT EVM Default Configuration Setup Block Diagram..................................................... 3

2 Output Interface to the Measuring Instrument ........................................................................... 4

3 Full Schematic of the THS3491RGT EVM ............................................................................... 9

4 Top Components and Silk Screen Layer................................................................................ 10

5 Layer 2 - GND .............................................................................................................. 10

6 Layer 3 - GND .............................................................................................................. 11

7 Layer 4 - GND/Signal...................................................................................................... 11

8 Layer 5 - GND .............................................................................................................. 12

9 Layer 6 - GND .............................................................................................................. 12

10 Layer 7 - GND .............................................................................................................. 13

11 Bottom Components and Silk Screen Layer............................................................................ 13

List of Tables

1 THS3491RGT EVM Bill of Materials ...................................................................................... 7

Trademarks

PowerPAD is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

Introduction

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1 Introduction

The Texas Instruments THS3491RGT evaluation module (EVM) helps designers evaluate the

performance of the THS3491 high-speed, high-voltage, and low-distortion current feedback amplifier in a

16-pin RGT package. This document details the THS3491RGT EVM and should be a good starting point

for high-speed PCB design involving the THS3491RGT device. The document includes a brief description

of the module and a list of EVM features, followed by EVM specifications and default EVM configuration,

details on connecting and using the EVM, and a discussion of high-speed amplifier PCB design

considerations.

1.1 Description

The THS3491RGT evaluation module (EVM) is used to evaluate the THS3491 device, which is a high-

speed, high-voltage and low-distortion current-feedback amplifier in a 16-pin RGT package. The EVM is

designed to quickly and easily demonstrate the functionality and performance of THS3491 in a gain of 5 V

/ V, driving an equivalent RLOAD = 100 Ω. The EVM is ready to connect to power supplies, signal source,

and test instruments through the use of onboard connectors. The board is set up for single-ended input

and output operation for interfacing with 50-Ωtest equipment. By default, the THS3491EVM comes with a

heat-sink attached on the bottom of the board directly underneath the device that helps in the overall

device thermal dissipation for high-output voltage swings.

1.2 Evaluation Module Features

The THS3491 high-speed operational amplifier EVM features include:

• Configured for split-supply operation and easily modified for single supply

• Designed for single-ended 50-Ωinput and output connection

• Configured for non-inverting gain of 5 V / V configuration and easily modified for inverting gain

configuration

• Simple interface to the inputs and outputs through the SMA connectors

• Heat-sink on the bottom of the board to help with the overall device thermal dissipation for high-output

voltage swings

1.3 THS3491 Operating Conditions

Supply voltage range, ±VCC = ±7 to ±16 Vdc (see the device data sheet for min and max values).

Supply current, IQ= 17.4 mA (see the device data sheet for min and max values).

For complete THS3491 amplifier IC specifications, parameter measurement information, and additional

application information, see the THS3491 data sheet (SBOS875).

J2 THS3491RGT

+/-15V Split Bench

Power Supply

+15V GND -15V

THS3491RGT EVM

Signal Generator Oscilloscope

(VS+) (VS-)

+287QJ3

50Q

124 Q

50 Q

240Q

287Q

54.9Q

50 Q

Term

50 Q

Source

OUT

IN-

IN+

Voltage Gain = +5 V/V or 14 dB Voltage Gain = 0.0436 V/V or -27.2 dB

499 Q

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EVM Default Configuration

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THS3491RGT Evaluation Module

2 EVM Default Configuration

As delivered, the EVM has a fully functional example circuit; just provide power supplies, a signal source,

and a measuring instrument as shown in Figure 1. Some components, such as supply bypass capacitors

and test points, are omitted on the application schematics of Figure 1 for clarity.

See Figure 3 for the default schematic diagram of the THS3491RGT EVM.

Figure 1. THS3491RGT EVM Default Configuration Setup Block Diagram

2.1 Standard Non-Inverting Gain Configuration

The THS3491RGT EVM default configuration is a single-ended input, single-ended output non-inverting

gain of 5 from SMA input (J2) to the THS3491 device output pins as shown in Figure 1. The default

configuration for non-inverting gain of 5 is determined by R3, and R4 in Figure 3. This gain is calculated

according to Equation 1 that is given below for non-inverting op-amp.

where

• RF = 499 Ω

• RG = 124 Ω(1)

2.2 Output Voltage Loss Calculation to the Measuring Instrument

The THS3491RGT device output is driving an equivalent RLOAD = 100 Ωdetermined by the output series

and parallel matching resistor network as shown in Figure 2. The output resistor network affects the

voltage that is measured at the SMA connector (J3). The designer should take into account the voltage

division from the device output to the SMA connector (J3) which is approximately 0.0436 or -27.2 dB given

by Equation 2. As a result, an overall voltage gain of –13.2 dB is achieved from SMA connector J2 to J3

for single-ended 50-Ωinput and output.

287QJ3

240Q

287Q

54.9Q

THS3491RGT OUT

50 QTerm

Measuring Instrument

EVM Default Configuration

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Remember, the output resistor network is only present to protect the measuring instrument from being

over-driven by the device output for high-output signal swings. Desoldering the output matching resistor

and replacing it with a single 50-Ωseries output resistor that gives only 6-dB output voltage loss at the

measuring instrument is easily done.

Figure 2. Output Interface to the Measuring Instrument

(2)

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Using the THS3491 EVM

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THS3491RGT Evaluation Module

3 Using the THS3491 EVM

This section describes how to connect the THS3491 EVM to test equipment. TI recommends connecting

the EVM as described in this section to avoid damage to the EVM or the THS3491 installed on the board.

CAUTION

Caution hot surface. The PCB surface can get very

hot while passing high-output voltage swings.

Contact may cause burns. Do not touch

3.1 Required Equipment

The following equipment is required:

• Dual dc output power supply (±15 V, 200-mA output minimum).

• Two dc current meters with resolution to 1 mA and capable of a maximum current which the dc power

supply can supply. If available, set the current limit on the dc power supply to 200 mA.

NOTE: Some power supplies incorporate current meters which may be applicable to this test.

• 50-Ωsource impedance signal generator (10 MHz, up to 4 VPP sine wave).

• Oscilloscope (100-MHz bandwidth minimum, 50-Ωterminated BNC input).

3.2 Power Supply Setup (Reference Figure 1)

Use the following procedure for power supply setup:

• Before connecting the power supply cables to the EVM, set the dual dc output power supply to ±15 V.

• Make sure the dc power supply is turned off before proceeding to the next step.

• Connect the +15-V power supply to the +Vs of the power supply port on the EVM.

• Connect the –15-V power supply to the -Vs of the power supply port on the EVM.

• Connect the grounds of the +15-V and –15-V power supply to the GND port on the EVM.

• Make sure the dc current meters on the dual dc output power supply are set to at least 1-mA resolution

and are set to 200-mA minimum output current capability.

• Turn-on the dual dc power supply to ±15 V

3.3 Input and Output Test Setup (Reference Figure 1)

Use the following procedure for input and output test setup:

• Set the signal generator to a 10 MHz, ±1.14 V (2.28 VPP or 11.1 dBm) sine wave with no dc offset. The

signal generator output should be set in 50-Ωtermination mode.

• Turn off the signal generator before proceeding to the next step.

• Connect the signal generator output to SMA connector J2 on the EVM.

• Oscilloscope channel 1 should be connected to SMA connector J3 on the EVM. Set the oscilloscope to

500 mV / division and a time-base of 1 μs / division.

NOTE: The oscilloscope must be set in a 50-Ωtermination for proper operation.

• Turn on the signal generator. The measured output on the scope channel 1 at SMA connector J3

should approximately be ±250 mV (500 mVPP).

High-Speed Amplifier PCB Layout Tips

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4 High-Speed Amplifier PCB Layout Tips

The THS3491 EVM layout, designed for use with high-speed signals, can be used as an example when

designing PCBs incorporating the THS3491. Careful attention has been given to component selection,

grounding, power supply bypassing, and signal path layout. Disregarding these basic design

considerations could result in less than optimum performance of the THS3491 high-speed operational

amplifier. Surface-mount components were selected because of the extremely low lead inductance

associated with this technology. This helps minimize both stray inductance and capacitance. Also,

because surface-mount components are physically small, the layout can be very compact.

Tantalum power supply bypass capacitors at the power input pads help filter switching transients from the

laboratory power supply. Power supply bypass capacitors are placed as close as possible to the IC power

input pins to minimize the return path impedance. This improves high-frequency bypassing and reduces

harmonic distortion. The GND side of these capacitors should be located close to each other, minimizing

the differential current loops associated with differential output currents. If poor high-frequency

performance is observed, replace the 0.1-μF capacitors with microwave capacitors with a self-resonance

at the frequency that produces trouble. A proper ground plane on both sides of the PCB should be used

with high-speed circuit design. This provides low-inductive ground connections for return current paths.

In the area of the amplifier input pins, the ground plane has been removed to minimize stray capacitance

and to reduce ground plane noise coupling into these pins. This is especially important for the inverting

input pin. A capacitance as low as 1 pF at the inverting input can significantly affect the response of the

amplifier or even cause oscillation.

In general, it is best to keep signal lines as short and as straight as possible. Incorporation of microstrip or

stripline techniques is also recommended when signal lines are greater than 1 inch in length. These traces

must be designed with a characteristic impedance of either 50 Ωor 75 Ω, as required by the application.

Such a signal line must also be properly terminated with an appropriate resistor.

The PCB that is used with PowerPAD™ packages must have features included in the design to remove

the heat from the package efficiently. As a minimum, there must be an area of solder-tinned-copper

underneath the PowerPAD package. This area is called the thermal land. The thermal land varies in size

depending on the PowerPAD package being used, the PCB construction, and the amount of heat to be

removed. In addition, this thermal land may or may not contain thermal vias, depending on PCB

construction. The requirements for thermal lands and thermal vias are detailed in PowerPAD™Thermally

Enhanced Package (SLMA002) and PowerPAD™ Made Easy (SLMA004).

Finally, all inputs and outputs must be properly terminated, either in the layout or in the load

instrumentation. Unterminated lines, such as coaxial cable, can appear to be a reactive load to the

amplifier. By terminating a transmission line with its characteristic impedance, the load of the amplifier

then appears to be purely resistive, and reflections are absorbed at each end of the line. Another

advantage of using an output termination resistor is that capacitive loads are isolated from the amplifier

output. This isolation helps minimize the reduction in the phase-margin of the amplifier and improves the

amplifier stability, resulting in reduced peaking and settling times.

On boards operated from dual power supplies, it is helpful to place a capacitor directly across the positive

and negative power supplies. This helps the fully differential drive.

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EVM Hardware Description

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THS3491RGT Evaluation Module

5 EVM Hardware Description

This section describes the EVM hardware. It includes the EVM parts list, and PCB layout.

5.1 Bill of Materials

Table 1 lists the EVM bill of materials.

Table 1. THS3491RGT EVM Bill of Materials

Item # Designator Qty Value Part Number Manufacturer Description Package Reference

1 !PCB1 1 HSP006 Any Printed Circuit Board

2 C1, C2 2 4.7uF GRM319R61H475KA12D00 MuRata CAP, CERM, 4.7 µF, 50 V, ±10%, X5R, 1206 1206

3 C3, C4 2 1uF C2012X5R1H105K125AB TDK CAP, CERM, 1 µF, 50 V, ±10%, X5R, 0805 0805

4 C5, C6 2 0.1uF C0603C104Z3VACTU Kemet CAP, CERM, 0.1 µF, 25 V, +80/-20%, Y5V, 0603 0603

5 C7 1 0.01uF 06031C103KAT2A AVX CAP, CERM, 0.01 µF, 100 V, ±10%, X7R, 0603 0603

6 C8 1 0.1uF GRM155R61E104KA87D MuRata CAP, CERM, 0.1 µF, 25 V, ±10%, X5R, 0402 0402

7 H1, H2, H3, H4 4 PMSSS 440 0025 PH B&F Fastener Supply Machine Screw Pan Phillips 4-40 Machine Screw, 4-40,

1/4 inch

8 H5, H6, H7, H8 4 2204 Keystone Hex Standoff 4-40 Aluminum 3/4" Hex Standoff 4-40

Aluminum 3/4 inch

9 H9 1 7109DG Aavid Surface mount heat sink for D2PAK Surface mount heat

sink for D2PAK

10 J1, J2, J3 3 142-0701-851 Emerson Network Power Connector, End launch SMA, 50 ohm, SMT SMA End Launch

11 J4 1 SPC15363 Tenma BANANA JACK, SOLDER LUG, RED, TH Red Insulated Banana

Jack

12 J5 1 6095 Keystone Standard Banana Jack, Uninsulated Keystone_6095

13 J6 1 SPC15354 Tenma BANANA JACK, SOLDER LUG, BLACK, TH Black Insulated

Banana Jack

14 L1, L2 2 220 ohm BLM21PG221SN1D MuRata Ferrite Bead, 220 ohm @ 100 MHz, 2 A, 0805 0805

15 LBL1 1 THT-14-423-10 Brady Thermal Transfer Printable Labels, 0.650" W x 0.200"

H - 10,000 per roll PCB Label 0.650"H x

0.200"W

16 R1, R7 2 49.9 CRCW060349R9FKEA Vishay-Dale RES, 49.9, 1%, 0.1 W, 0603 0603

17 R2, R6, R8 3 0 CRCW06030000Z0EA Vishay-Dale RES, 0, 5%, 0.1 W, 0603 0603

18 R3 1 124 RC0603FR-07124RL Yageo America RES, 124, 1%, 0.1 W, 0603 0603

19 R4 1 499 RCS0603499RFKEA Vishay-Dale RES, 499, 1%, 0.25 W, 0603 0603

20 R9, R10 2 240 CRCW2512240RJNEG Vishay-Dale RES, 240, 5%, 1 W, AEC-Q200 Grade 0, 2512 2512

21 R11, R12 2 287 CRCW1206287RFKEA Vishay-Dale RES, 287, 1%, 0.25 W, 1206 1206

22 R13 1 54.9 CRCW060354R9FKEA Vishay-Dale RES, 54.9, 1%, 0.1 W, 0603 0603

23 TP1 1 TP105-01-09 Components Corporation Test Point, Miniature, White, TH Test-Point, Dia

100mil, TH

24 TP3 1 5000 Keystone Test Point, Miniature, Red, TH Red Miniature

Testpoint

EVM Hardware Description

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Table 1. THS3491RGT EVM Bill of Materials (continued)

Item # Designator Qty Value Part Number Manufacturer Description Package Reference

25 U1 1 THS3491IRGT Texas Instruments High Voltage, Low Distortion, Current-Feedback

Amplifier, RGT0016A RGT0016A

26 C9 0 100pF C0603C101J5GACTU Kemet CAP, CERM, 100 pF, 50 V, ±5%, C0G/NP0, 0603 0603

27 FID1, FID2, FID3,

FID4, FID5, FID6 0 N/A N/A Fiducial mark. There is nothing to buy or mount. Fiducial

28 R5 0 49.9 CRCW060349R9FKEA Vishay-Dale RES, 49.9, 1%, 0.1 W, 0603 0603

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EVM Hardware Description

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THS3491RGT Evaluation Module

5.2 Schematic

Figure 3 illustrates the EVM schematic.

Figure 3. Full Schematic of the THS3491RGT EVM

EVM Hardware Description

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5.3 Circuit Board Layout

Figure 4 through Figure 11 illustrate the EVM PCB layout.

Figure 4. Top Components and Silk Screen Layer

Figure 5. Layer 2 - GND

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