Texas Instruments TPD3S716-Q1EVM Manual de usuario

SLVUAL9–April 2016

TPD3S716-Q1 Evaluation Module

User's Guide

SLVUAL9–April 2016

TPD3S716-Q1 Evaluation Module

This user's guide describes the characteristics, operation, and use of the TPD3S716-Q1EVM evaluation

module (EVM). This EVM includes four TPD3S716-Q1s in various configurations for testing.

• IEC61000-4-2 compliance testing on the connector-side pin

• USB 2.0 Type A input and output connectors for throughput analysis

• ESD clamping waveforms during an electrostatic discharge (ESD) event

Contents

1 Introduction ................................................................................................................... 2

2 Definitions..................................................................................................................... 2

3 Setup .......................................................................................................................... 3

4 Board Layout ................................................................................................................ 6

5 Schematics and Bill Of Materials .......................................................................................... 7

List of Figures

1 Ideal Contact Discharge Waveform of the Output Current of the ESD Simulator at 4-kV ......................... 3

2 System Level ESD Test Setup............................................................................................. 5

3 TPD3S716-Q1EVM Top Components and Silkscreen.................................................................. 6

4 TPD3S716-Q1EVM Layer Two - GND Plane............................................................................ 6

5 TPD3S716-Q1EVM Layer Three - 5-V Power Plane ................................................................... 6

6 TPD3S716-Q1EVM Bottom Layer......................................................................................... 6

7 TPD3S716-Q1EVM Schematic ............................................................................................ 7

List of Tables

1 EVM Configuration........................................................................................................... 2

2 IEC61000-4-2 Test Levels ................................................................................................. 2

3 Waveform Parameters in Contact Discharge Mode..................................................................... 2

4 /VEN and /EN Jumper Configurations .................................................................................... 3

5 +5-V and +3.3-V Jumper Configurations ................................................................................. 3

6 Bill of Materials............................................................................................................... 8

Introduction

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1 Introduction

Texas Instrument’s TPD3S716-Q1 evaluation module helps designers evaluate the operation and

performance of the TPD3S716-Q1 device. The TPD3S716-Q1 is a single-chip solution for a USB

connector’s VBUS and data line protection. The nFET switch ensures safe current flow in host mode

operation while protecting the internal system circuits from any over-voltage conditions at the VBUS_CON, VD,

and VD– pins. On these pins, this device can protect against over-voltage up to 18 V. The VBUS_CON pin

also protects against shorts to ground. The TPD3S716-Q1 is designed to operate over an ambient air

temperature range of -40°C to +125°C.

The TPD3S716-Q1EVM contains four TPD3S716-Q1s labeled U1 through U4. U1 is configured with two

USB2.0 connectors (USB1 and USB2) for capturing system level tests. U2 is configured with four SMA

(S1 – S4) connectors for 4-port analysis with a vector network analyzer. U3 is configured with test points

for striking ESD to the protection pins. U3 is also configured for capturing clamping waveforms using J3

with an oscilloscope during an ESD test. Caution must be taken when capturing clamping waveforms

during an ESD event so as not to damage the oscilloscope. A proper procedure is outlined in Section 3

section. U4 is pinned out for device level tests. Devices U1 and U4 have Kelvin connections (TP4 – TP5

and TP7 – TP8) around the nFET for measuring RON.

Table 1. EVM Configuration

Reference Designator TI Part Number Configuration

U1 TPD3S716-Q1 USB 2.0 System Level

U2 TPD3S716-Q1 S-Parameters

U3 TPD3S716-Q1 IEC61000-4-2 ESD Tests

U4 TPD3S716-Q1 Pinned out device

2 Definitions

Contact Discharge — a method of testing in which the electrode of the ESD simulator is held in contact

with the device-under-test (DUT).

Air Discharge — a method of testing in which the charged electrode of the ESD simulator approaches

the DUT, and a spark to the DUT actuates the discharge.

ESD simulator — a device that outputs IEC61000-4-2 compliance ESD waveforms shown in Figure 1

with adjustable ranges shown in Table 2 and Table 3.

IEC61000-4-2 has 4 classes of protection levels. Classes 1 – 4 are shown in Table 2. Stress tests

should be incrementally tested to level 4 as shown in Table 3 until the point of failure. If the DUT

does not fail at 8 kV, testing can continue in 2 kV increments until failure.

Table 2. IEC61000-4-2 Test Levels

Contact Discharge Air Discharge

Class Test Voltage [± kV] Class Test Voltage [± kV]

1212

2424

3638

4 8 4 15

Table 3. Waveform Parameters in Contact Discharge Mode

Stress Level Step Simulator Voltage

[kV] Ipeak ±15% [A] Rise Time ±25%

[nS] Current at 30-ns

±30% [A] Current at 60-ns

±30% [A]

1 2 7.5 0.8 4 2

2 4 15 0.8 8 4

3 6 22.5 0.8 12 6

4 8 30 0.8 16 8

0 20 40 60 80 100

Current (A)

Time (ns)

IPEAK

90% IPEAK

10% IPEAK

800 ps 90/10 rise time

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Setup

SLVUAL9–April 2016

TPD3S716-Q1 Evaluation Module

Figure 1. Ideal Contact Discharge Waveform of the Output Current of the ESD Simulator at 4-kV

3 Setup

This section describes the intended use of the EVM. A generalized outline of the procedure given in IEC

61000-4-2 is described here. IEC 61000-4-2 should be referred to for a more specific testing outline. Basic

configurations for collecting s-parameters, eye diagrams, and ESD clamping waveforms are outlined as

well.

Table 4. /VEN and /EN Jumper Configurations

Jumper Off On

(U1, U2, U3) /VEN disable the VBUS switch

for U1 – U3 enable the VBUS switch

for U1 – U3

(U1, U2, U3) /DEN disable the data switch

for U1 – U3 enable the data switch

for U1 – U3

/VEN_U4 disable the VBUS switch

for U4 enable the VBUS switch

for U4

/DEN_U4 disable the data switch

for U4 enable the data switch

for U4

Table 5. +5-V and +3.3-V Jumper Configurations

U1 U2 U3 U4 Power Supply

Connection

Shunt to supply 5 V to U1 Shunt to supply 5 V to U2 Shunt to supply 5 V to U3 Shunt to supply 5 V to U4 +5 V

Shunt to supply 3.3 V to

U1 Shunt to supply 3.3 V to

U2 Shunt to supply 3.3 V to

U3 Shunt to supply 3.3 V to

U4 +3.3 V

Power should be supplied to +5V, +3.3V, and GND connectors, except if powering U1 through the USB

connector. When testing DUT U1 shunt both jumpers (JP1 and JP5) but 5 V can only be supplied by

either the test point labeled “+5V” or the USB male connector (USB2) on VBUS. All other DUTs require a

power supply to be attached to both test points labeled “+3.3V” and “+5V” with the appropriate shunts set

per Table 5. Power can be distributed to each TPD3S716-Q1 by setting the shunts in place for each DUT

(U1 – U4) according to Section 3.2.1. All shunts in Table 5 can be set at the same time or only for the

device under test.

Setup

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3.1 U1

A single TPD3S716-Q1 (U1) is configured with two USB2.0 Type A connectors (USB1 and USB2) for

capturing Eye Diagrams and other system level tests. All system level tests should use USB1 as the sink

and USB2 as the source. +5V can be supplied to VBUS using either the male USB connector (USB2) or by

attaching 5V to the test point labeled “+5V.” If supplying 5 V by the USB connector (USB2) then do not

attach a power supply to the test point labeled “+5V” and do shunt JP1 to supply the pull-up resistor

for /FLT. Kelvin connections (TP4 and TP5) are provided for accurate voltage measurements of VBUS_SYS

and VBUS_CON during load tests.

Different resistor values are provided to connect to pin 16, Iadj, to ground by setting a shunt on one of the

jumpers J9 – J11. Pin 16 can also be connected directly to +5-V or ground using J6. Only one shunt

should be connected at a time.

3.2 U2

TPD3S716-Q1 (U2) is configured with four SMA (S1 – S4) connectors to allow 4-port analysis with a

vector network analyzer. Connect Port 1 to S1, Port 2 to S2, Port 3 to S3, and Port 4 to S4. This

configuration allows for the following terminology in 4 port analysis:

• S11: Return loss

• S21: Insertion loss

• S31: Near end cross talk

• S41: Far end cross talk

A calibration section is included using four SMA (SP1 – SP4) connectors with the same PCB trace

geometry

One TPD3S716-Q1 (U3) can be used for destructive IEC 61000-4-2 ESD pass/fail ESD strikes. TP2 has

an added SMB (J3) connector for capturing clamping waveforms with an oscilloscope during an ESD

strike. Caution must be taken when capturing clamping waveforms during an ESD event so as not to

damage the oscilloscope.

3.2.1 Oscilloscope Setup for Clamping Waveforms

Without a proper procedure, capturing ESD clamping waveforms exposes the oscilloscope to potential

voltages higher than the rating of the equipment. Proper methodology can mitigate any risk in this

operation.

Recommended equipment:

• Minimum of 1-GHz bandwidth oscilloscope.

• Either of the following:

– Two 10X 50 Ωattenuators and a 0 Ωresistor (to be installed at R1).

– One 10X 50 Ωattenuator and a 150 Ωresistor (already installed at R1).

• 50 Ωshielded SMB cable.

Procedure

In order to protect the oscilloscope, attenuation of the measured signal is required. Here are two

possible procedures for testing U3:

1. Using two 10X attenuators:

• Install a 0-Ωresistor in R1.

• Attach two 10X attenuators to the oscilloscope channel being used.

• Attach the 50-Ωshielded SMB cable between J5 and the attenuator.

• Set the scope attenuation factor to 100X.

• Set the oscilloscope to trigger on a positive edge for (+) ESD and a negative edge for (–) ESD

strikes. The magnitude should be set to 20 V.

• Following Section 3.2.2, strike contact ESD to TP1.

ESD Simulator

Typical Position for

Direct Discharge

Ground Reference Plane

Power and Ground Connection

DUT or System

Horizontal Coupling

Plane (HCP)

To Wall

Ground

470 kO

Non-conducting Table

Insulation

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Setup

SLVUAL9–April 2016

TPD3S716-Q1 Evaluation Module

2. Using one 10X attenuator:

• Attach one 10X attenuator to the oscilloscope.

• Attach the 50-Ωshielded SMB cable between J5 and the attenuator.

• Set the scope attenuation factor to 40X.

• Set the oscilloscope to trigger on a positive edge for (+) ESD and a negative edge for (–) ESD

strikes. The magnitude should be set to 20 V.

• Following Section 3.2.2, strike contact ESD to TP1.

Recommended settings for the time axis is 20 ns/division and for the voltage axis is 10-V/division.

The voltage levels of the ESD applied to TP2 should not exceed 8 kV while capturing clamping

waveforms.

3.2.2 IEC 61000-4-2 Test Method and Set-Up

An example test setup is shown in Figure 2. Details of the testing table and ground planes can be found in

the IEC 61000-4-2 test procedure. Ground the EVM using the banana connector labeled GND. Discharge

the ESD simulator on any of the Test Points TP1 – TP3. Contact and air-gap discharge are tested using

the same simulator with the same discharge waveform. While the simulator is in direct contact with the

test point during contact, it is not during air-gap.

Figure 2. System Level ESD Test Setup

3.2.2.1 Evaluation of Test Results

Connect the tested device on the EVM to a curve tracer both before and after ESD testing. After each

incremental level, if the IV-curve of the ESD protection diode shifts ±0.1 V, or the leakage current

increases by a factor of ten, then the device is permanently damaged by ESD.

TPD3S716-Q1 (U4) is fully pinned out for easy access to device level tests. VBUS_SYS and VBUS_CON are

pinned out using a 3-pin terminal block (J5) for high current tests. Pin J5.1 is VBUS_SYS, J5.2 is GND, and

J5.3 is VBUS_CON. Kelvin connections (TP7 and TP8) are provided for accurate voltage measurements of

VBUS_SYS and VBUS_CON during load tests.

Board Layout

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4 Board Layout

This section provides the TPD3S716-Q1EVM board layout. TPD3S716-Q1EVM is a 4-layer board of FR-4

at 0.062” thickness.

Different resistor values are provided to connect to Iadj (pin 16), to ground by setting a shunt on one of the

jumpers J9 – J11. Iadj can also be connected directly to +5 V or ground using J6. Only one shunt should

be connected at a time.

Figure 3. TPD3S716-Q1EVM

Top Components and Silkscreen Figure 4. TPD3S716-Q1EVM Layer Two

- GND Plane

Figure 5. TPD3S716-Q1EVM Layer Three

- 5-V Power Plane Figure 6. TPD3S716-Q1EVM Bottom Layer

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Schematics and Bill Of Materials

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TPD3S716-Q1 Evaluation Module

5 Schematics and Bill Of Materials

5.1 Schematics

Figure 7. TPD3S716-Q1EVM Schematic

Schematics and Bill Of Materials

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Table 6. Bill of Materials

Quantity Designator Description Part Number Manufacturer

1 !PCB Printed Circuit Board Any

1 J3 Connector, SMB,Vertical RCP 0-4GHz, 50

ohm, TH 131-3701-261 Emerson Network Power

1 J4 Standard Banana Jack, Uninsulated, 5.5mm 575-4 Keystone

1 J5 Terminal Block, 5.08 mm, 3x1, Brass, TH ED120/3DS On-Shore Technology

1 R1 RES, 150 ohm, 1%, 0.1W, 0603 CRCW0603150RFKEA Vishay-Dale

1 USB1 Connector, Receptacle, USB TYPE A, 4POS

SMD 896-43-004-00-000000 Mill-Max

1 USB2 Connector, USB Type A, 4POS R/A, SMD 0480371000 Molex

2 D1, D2 Diode, Zener, 20 V, 225 mW, SOT-23 BZX84C20LT1G ON Semiconductor

2 L1, L2 Inductor, Multilayer, Air Core, 10 nH, 0.3 A,

0.26 ohm, SMD LQG15HS10NJ02D MuRata

2 R12, R13 RES, 0, 5%, 0.063 W, 0402 CRCW04020000Z0ED Vishay-Dale

2 R2, R3 RES, 10.0k ohm, 1%, 0.1W, 0603 CRCW060310K0FKEA Vishay-Dale

2 R4, R9 RES, 140 k, 1%, 0.063 W, 0402 CRCW0402140KFKED Vishay-Dale

2 R5, R10 RES, 274 k, 1%, 0.063 W, 0402 CRCW0402274KFKED Vishay-Dale

2 R6, R11 RES, 93.1 k, 1%, 0.063 W, 0402 CRCW040293K1FKED Vishay-Dale

2 R7, R8 RES, 100 k, 5%, 0.063 W, 0402 CRCW0402100KJNED Vishay-Dale

2 TP14, TP15 Test Point, Miniature, Red, TH 5000 Keystone

2 TP6, TP13 Test Point, Miniature, White, TH 5002 Keystone

3 C1, C4, C7 CAP, CERM, 1 µF, 100 V, +/- 10%, X7S, 0805 C2012X7S2A105K125AB TDK

3 TP1, TP2, TP3 TEST POINT. No entry in BOM.

4 C2, C3, C6, C9 CAP, CERM, 100 µF, 10 V, +/- 20%, X5R,

1210 C1210C107M8PACTU Wurth Elektronik

4 C5, C8, C10, C11 CAP, CERM, 10 µF, 6.3 V, +/- 20%, X7R,

0805 C2012X7R0J106M125AB TDK

4 H1, H2, H3, H4 Bumpon, Hemisphere, 0.44 X 0.20, Clear SJ-5303 (CLEAR) 3M

4 S1, S2, S3, S4 SMA Straight PCB Socket Die Cast, 50 Ohm,

TH 5-1814832-1 TE Connectivity

4 TP4, TP5, TP7, TP8 Test Point, Miniature, Yellow, TH 5004 Keystone

4 TP9, TP10, TP11,

TP12 Test Point, Miniature, Orange, TH 5003 Keystone

4 U1, U2, U3, U4 AUTOMOTIVE USB 2.0 Interface Protection

with Short-to-Battery, Short-to-Ground

Protection, and Adjustable Current Limit,

DBQ0016A

TPD3S716QDBQRQ1 Texas Instruments

6 J1, J2, J6, J7, J8, J9 Header, 100mil, 3x1, Tin, TH PEC03SAAN Sullins Connector Solutions

14 JP1, JP2, JP3, JP4,

JP5, JP6, JP7, JP8,

JP9, JP10, JP11,

JP12, JP13, JP14

Header, 100mil, 2x1, Gold, TH PBC02SAAN Sullins Connector Solutions

14 SH-J1, SH-J2, SH-

JP1, SH-JP2, SH-

JP3, SH-JP4, SH-

JP5, SH-JP6, SH-

JP7, SH-JP8, SH-

JP9, SH-JP10, SH-

JP11, SH-JP12

Shunt, 100mil, Gold plated, Black 969102-0000-DA 3M

STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES

1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or

documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.

Acceptance of the EVM is expressly subject to the following terms and conditions.

1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility

evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not

finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For

clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions

set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software

1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,

or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production

system.

2Limited Warranty and Related Remedies/Disclaimers:

2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software

License Agreement.

2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM

to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment

by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any

way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or

instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as

mandated by government requirements. TI does not test all parameters of each EVM.

2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,

or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the

warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to

repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall

be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day

warranty period.

3Regulatory Notices:

3.1 United States

3.1.1 Notice applicable to EVMs not FCC-Approved:

This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit

to determine whether to incorporate such items in a finished product and software developers to write software applications for

use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless

all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause

harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is

designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of

an FCC license holder or must secure an experimental authorization under part 5 of this chapter.

3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:

CAUTION

This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not

cause harmful interference, and (2) this device must accept any interference received, including interference that may cause

undesired operation.

Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to

operate the equipment.

FCC Interference Statement for Class A EVM devices

NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of

the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is

operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not

installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.

Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to

correct the interference at his own expense.

SPACER

FCC Interference Statement for Class B EVM devices

NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of

the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential

installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance

with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference

will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which

can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more

of the following measures:

•Reorient or relocate the receiving antenna.

•Increase the separation between the equipment and receiver.

•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

•Consult the dealer or an experienced radio/TV technician for help.

3.2 Canada

3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210

Concerning EVMs Including Radio Transmitters:

This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:

(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may

cause undesired operation of the device.

Concernant les EVMs avec appareils radio:

Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation

est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit

accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.

Concerning EVMs Including Detachable Antennas:

Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)

gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type

and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for

successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types

listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.

Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited

for use with this device.

Concernant les EVMs avec antennes détachables

Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et

d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage

radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope

rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le

présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le

manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne

non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de

l'émetteur

3.3 Japan

3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に

輸入される評価用キット、ボードについては、次のところをご覧ください。

http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page

3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified

by TI as conforming to Technical Regulations of Radio Law of Japan.

If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of

Japan to follow the instructions below with respect to EVMs:

1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal

Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for

Enforcement of Radio Law of Japan,

2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to

EVMs, or

3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan

with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note

that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.

SPACER

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