Texas Instruments DS250DF410EVM Manual de usuario

SNLU203A–February 2016–Revised September 2019

DS250DF410EVM User’s Guide

User's Guide

SNLU203A–February 2016–Revised September 2019

DS250DF410EVM User’s Guide

The DS250DF410 is a four-channel multi-rate retimer with integrated signal conditioning. It is used to

extend the reach and robustness of long, lossy, crosstalk-impaired high-speed serial links while achieving

a bit error rate (BER) of 10-15 or less. Each channel of the DS250DF410 independently locks to serial

data rates in a continuous range from 20.6 Gbps to 25.8 Gbps or to any supported sub-rate (÷2 and ÷4),

including key data rates such as 10.3125 Gbps and 12.5 Gbps. The DS250DF410 has a single power

supply and minimal need for external components. These features reduce PCB routing complexity and

BOM cost. The advanced equalization features of the DS250DF410 include a low-jitter 3-tap transmit finite

impulse response (FIR) filter, an adaptive continuous-time linear equalizer (CTLE), and an adaptive

decision feedback equalizer (DFE). This enables reach extension for lossy interconnect and backplanes

with multiple connectors and crosstalk. The integrated CDR function is ideal for front-port optical module

applications to reset the jitter budget and retime the high-speed serial data. The DS250DF410 implements

2x2 cross-point on each channel pair, providing the host with both lane crossing and fanout options.

The DS250DF410 can be configured via the default SMBus slave mode or with an external EEPROM. Up

to 16 devices can share a single EEPROM. A non-disruptive on-chip eye monitor and PRBS generator

and checker functions allow for in-system diagnostics. With this kit, users can quickly evaluate the

DS250DF410 retimer performance.

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DS250DF410EVM User’s Guide

Contents

1 Hardware Description and Setup .......................................................................................... 3

2 Software Description ........................................................................................................ 4

3 Best Practices and Usage Tips........................................................................................... 21

4 Test Case Examples....................................................................................................... 22

5 Supplemental Documents................................................................................................. 22

6 EVM Cable Assemblies ................................................................................................... 23

List of Figures

1 DS250DF410EVM, Showing Connections for Power, Signal, and USB Communications ........................ 3

2 Download SigCon Architect from www.ti.com ........................................................................... 4

3 Sigcon Architect Start-Up Screen ......................................................................................... 5

4 Capture Illustrating the “Manage Devices” Pop-Up Window for Adding New Part Numbers to the

“Selection” Panel............................................................................................................. 6

5 Low-Level Page Capture Illustrating the Different Block Select Options............................................. 7

6 Low-Level Page Capture After Selecting Access to an Individual Register.......................................... 7

7 Eye Monitor Page for DS250DF410 Profile.............................................................................. 8

8 EEPROM Page for DS250DF410 Profile................................................................................. 9

9 High-Level Page, with Block Diagram Tab Selected .................................................................. 10

10 High-Level Page, with Device Status Tab Selected................................................................... 11

11 Rx EQ/DFE Tab............................................................................................................ 12

12 Cross-Point Tab, Default Mode Selected ............................................................................... 14

13 Cross-Point Tab, Fanout Mode Selected ............................................................................... 14

14 Cross-Point Tab, Lane Crossing Mode Selected ...................................................................... 15

15 CDR Tab, Standard Mode Selected..................................................................................... 16

16 CDR Tab, Manual Mode Selected....................................................................................... 17

17 TX FIR Tab.................................................................................................................. 18

18 PRBS Tab, PRBS Generator Configuration ............................................................................ 19

19 PRBS Tab, PRBS Checker Configuration .............................................................................. 20

20 SDD21 Loss Characteristic of Example Test Case.................................................................... 22

Trademarks

All trademarks are the property of their respective owners.

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Hardware Description and Setup

SNLU203A–February 2016–Revised September 2019

DS250DF410EVM User’s Guide

1 Hardware Description and Setup

The general procedure for setting up and testing with the DS250DF410 Evaluation Module

(DS250DF410EVM) hardware is as follows:

1. Check the EVM jumper settings to ensure they match Figure 1 below.

2. Connect the EVM to a PC using the provided USB cable.

3. Connect 3.3V power (2A max) as shown below. The EVM has an on-board 3.3V-to-2.5V regulator to

supply the Retimer with the required 2.5V. Make sure multiple jumpers are used on header J10.

Figure 1. DS250DF410EVM, Showing Connections for Power, Signal, and USB Communications

4. Connect the EVM to the system under test.

The default EVM configuration has four differential RX inputs and four differential TX outputs accessible to

the user. Connect the RX and TX signals to the test channel using Huber+Suhner 1x8 MXP cable

assemblies (See Section 6 for ordering information).

NOTE: All TX and RX channels are AC coupled with physical 220 nF capacitors on the evaluation

board, so external AC coupling capacitors are not needed when using this EVM.

Software Description

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DS250DF410EVM User’s Guide

2 Software Description

2.1 Setup

The one-time procedure for installing the GUI software is as follows:

1. Download and install the TI SigCon Architect GUI. The steps for installing the software are as follows:

1. Go to www.ti.com/tool/sigconarchitect and download the latest version of SigCon Architect. At the

time this document was written, the latest version of SigCon Architect is 2.0.0.4.

Figure 2. Download SigCon Architect from www.ti.com

2. Extract the executable file (.EXE) from the downloaded file and run the executable.

3. Follow the installation wizard’s instructions to install SigCon Architect.

4. Request download link for the DS250DF410 profile file via "Special Note" link. Software access will

be granted with TI MySecure software access.

5. Extract the executable file (.EXE) from the downloaded file and run the executable.

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Software Description

SNLU203A–February 2016–Revised September 2019

DS250DF410EVM User’s Guide

2. Run the SigCon Architect software.

1. Start the software by double-clicking its icon on the desktop.

2. On the “Selection” panel, the DS250DF410 should appear.

3. If DS250DF410 is not listed:

1. Go to “Device” tab and choose “Manage Devices”.

2. Click on “+” icon and then select the “DS250DF410” device model.

3. Fill in the “New Device Name" DS250DF410 is recommended.

4. Select the slave address as configured on EVM (typical setting is 0x30).

5. Click “OK”.

4. Navigate to the “Configuration” page of DS250DF410 via the “Selection” panel. Choose “Slave

Address” “0x30” from the drop down menu. Verify the “USB2ANY Details” specify “USB2ANY 0”,

and click “Apply”. Successful connection is indicated by the green “CONNECTED” indicator on the

bottom of the application.

Figure 3. Sigcon Architect Start-Up Screen

Software Description

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DS250DF410EVM User’s Guide

Figure 4. Capture Illustrating the “Manage Devices” Pop-Up Window for Adding New Part Numbers to the

“Selection” Panel

3. Once connection is successfully established, users can read and write various settings to the device in

real-time, using the functional pages.

2.2 Functional Pages

2.2.1 Low-Level Page

The low-level page allows the user to read and write to all registers on the DS250DF410. To access it,

navigate to the “Low Level Page”, as shown below.

• The user may click “Read All” to load the data in each register from the device to the “Register Map."

• The user may access the Shared, Global or Channel registers via “Block Select.”

• To Read a register:

– Type the readable address in the “Current Address” text box or select a register from the Register

Map.

– Click “Read Register”. The data in this register will appear in the “Data” text box.

• To Write a register:

– Type the writeable address in the “Current Address” text box or select a register from the Register

Map.

– The user may either type the data value (in HEX) to write to this address in the “Data” text box, or

check/uncheck boxes as desired for individual bits within the register. Then click “Write Register.”

– If Broadcast is selected for channel register writes, the specified write will be performed to all

channels in the device.

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Software Description

SNLU203A–February 2016–Revised September 2019

DS250DF410EVM User’s Guide

Figure 5. Low-Level Page Capture Illustrating the Different Block Select Options

Figure 6. Low-Level Page Capture After Selecting Access to an Individual Register

Software Description

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DS250DF410EVM User’s Guide

2.2.2 Eye Opening Monitor (EOM) Page

The Eye monitor page allows the user to visualize DS250DF410 eye plots, a means of assessing received

signal quality after equalization.

• Select the channel for eye plotting. Note that plots can only be generated for a given channel if “CDR

Locked” is indicated.

• The EOM_SEL_VRANGE pull-down allows the user to adjust the vertical scale for eye plots.

• The user may perform a “Single Capture” of eye monitor plot, or select “Continuous Capture” to

accumulate multiple plots over a period of time.

• The Horizontal Eye Opening (HEO) and Vertical Eye Opening (VEO) may be read on the Eye Monitor

page.

• If the user desires to do their own analysis or post-processing of the EOM data, the “Export Raw Data”

and “Export Density” buttons respectively generate an Excel spreadsheet containing the 63x63 eye

monitor values matrix.

Figure 7. Eye Monitor Page for DS250DF410 Profile

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Software Description

SNLU203A–February 2016–Revised September 2019

DS250DF410EVM User’s Guide

2.2.3 EEPROM Page

The SigCon Architect EEPROM page allows the user to either create a DS250DF410 Hex file that is

programmable to an EEPROM or configure a DS250DF410 device based on values from an existing

DS250DF410 Hex file.

Figure 8. EEPROM Page for DS250DF410 Profile

The user may choose to update the EEPROM page settings based on values read from the DS250DF410

device by clicking “Update Slot from Device”. To create the programmable hex file, click “Write to

EEPROM Hex”. Note that the evaluation module does not include an EEPROM, but there is a socket for a

standard 6-pin EEPROM (XU1). SigCon Architect cannot directly program the EEPROM. The EEPROM

Hex File can be burned on the EEPROM via I2C communication (i.e. AARDVARK or equivalent interface

adapter). The EEPROM control settings are described in greater detail below.

• Common Channel: If this box is checked, all channels receive the same configuration. Different

devices can receive different configurations, but within one device, all channels will receive the same

configuration. If this box is unchecked, then the EEPROM will store the configuration as unique

channel configurations. Each of the four channels can receive a unique configuration.

• EEPROM>256:

– This setting must be enabled if there are more than 4 EEPROM slots.

– When this box is checked, the “EEPROM Size” drop down menu is automatically populated by 512

Bytes if previously populated by 256 Bytes.

– When this box is unchecked, the “EEPROM Size” drop down menu is automatically populated by

256 Bytes. Up to 4 EEPROM slots can be programmed.

• Enable CRC: If enabled, each device will have a CRC value specific to the base header, address map

header, and data. If disabled, the CRC is not computed.

• Slot Update Details: The number of slots refers to the total number of unique SMBus register settings

to load from the EEPROM. The user can choose to update all slots, or which slot # to update the

SigCon Architect EEPROM page from.

Software Description

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DS250DF410EVM User’s Guide

• EEPROM Size: The EEPROM size must be set to 256, 512, or 1024 bytes. A single external EEPROM

can be used by up to 16 DS250DF410 devices.

– The first 3 bytes of EEPROM data is the base header. The base header contains the CRC enabled,

address map header enabled, EEPROM<256 bytes, device count, and maximum EEPROM burst

size settings.

– If multiple devices are programmed, an address map header is needed for each device. The

address map header specifies the CRC value and the Device EEPROM Start Address.

– EEPROM Size ≤256 Bytes:

• EEPROM Size = 3 Bytes (Base Header) + # of devices * 8 Bytes/device (Address Header) + #

of slots * 66 Bytes/slot (Data)

– EEPROM Size > 256 Bytes:

• EEPROM Size = 3 Bytes (Base Header) + # of devices * 12 Bytes/device (Address Header) + #

of slots * 66 Bytes/slot (Data)

2.2.4 High-Level Page

2.2.4.1 Overview

The High-Level Page on the Selection Panel enables the user to easily configure and/or check the status

of the DS250DF410 high-speed data path functional blocks: Clock and data recovery (CDR), Receiver

equalization, Transmitter output driver, PRBS generator and checker, and cross-point. The Figure 9 below

shows the landing page after uses selects “High-Level Page on the Selection Panel. The first button

option is the “Block Diagram”, an illustrative page highlighting the DS250DF410’s functional stages. The

configuration features for the additional tabs within the High-Level Page are described further in the next

sub-sections.

Figure 9. High-Level Page, with Block Diagram Tab Selected

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