Transcend TS4G-16GSDHC6- S5W Manual de usuario

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SDHC Memory Card + Reader S5

Transcend Information Inc.

Description

Transcend High Capacity SD Card series are

specifically designed to meet the High Capacity, High

Definition Audio and Video requirement for the latest

Digital Cameras, DV Recorders, Mobile Phones, etc,.

The new defined Speed Class enables the host to

support AV applications to perform real time

recording to the SD memory card.

Placement

Front Back

Features

•ROHS compliant product.

•Card Lid material: PC (comply with UL94,Flame

Class:HB)

•Operating Voltage: 2.7 ~ 3.6V

•Operating Temperature: -25 ~ 85°C

•Durability: 10,000 insertion/removal cycles

•Compatible with SD Specification Ver. 2.0

•Comply with SD File System Specification Ver. 2.0

•Mechanical Write Protection Switch

•Supports Speed Class Specification up to Class 6

•Supports Copy Protection for Recorded Media (CPRM)

for SD-Audio

•Seamless compatibility with SDMI-compliant digital audio

devices

•Form Factor: 24mm x 32mm x 2.1mm

Pin Definition

SD Mode SPI Mode

Pin No. Name Type Description Name Type Description

1 CD/DAT I/O/PP3Card Detect/Data Line [Bit3] CS I

Chip Select (neg true)

2 CMD PP Command/Response DI I

Data In

3 VSS1 S Supply voltage ground VSS S

Supply voltage ground

4 VDD S Supply voltage VDD S

Supply voltage

5 CLK I Clock SCLK I Clock

6 VSS2 S Supply voltage ground VSS2 S Supply voltage ground

7 DAT0 I/O/PP Data Line [Bit0] DO O/PP

Data Out

8 DAT1 I/O/PP Data Line [Bit1] RSV

9 DAT2 I/O/PP Data Line [Bit2] RSV

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Architecture

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Bus Operating Conditions

• General

Parameter Symbol Min. Max. Unit Remark

Peak voltage on all lines -0.3 VDD+0.3 V

All Inputs

Input Leakage Current -10 10 µA

All Outputs

Output Leakage Current -10 10 µA

• Power Supply Voltage

Parameter Symbol Min. Max. Unit Remark

Supply voltage VDD 2.7 3.6 V

Output High Voltage VOH 0.75* VDD V IOH=-100uA@VDD Min.

Output Low Voltage VOL 0.125* VDD V IOL=100uA@VDD Min.

Input High Voltage VIH 0.625* VDD VDD+0.3 V

Input Low Voltage VIL VSS-0.3 0.25* VDD V

Power up time 250 ms From 0v to VDD Min.

• Current Consumption

The current consumption is measured by averaging over 1 second.

‧Before first command: Maximum 15 mA

‧During initialization: Maximum 100 mA

‧Operation in Default Mode: Maximum 100 mA

‧Operation in High Speed Mode: Maximum 200 mA

‧Operation with other functions: Maximum 500 mA.

• Bus Signal Line Load

The total capacitance CLthe CLK line of the SD Memory Card bus is the sum of the bus master capacitance CHOST, the bus

capacitance CBUS itself and the capacitance CCARD of each card connected to this line:

CL= CHOST + CBUS + Ν*CCARD

Where N is the number of connected cards.

Parameter Symbol Min. Max. Unit Remark

Pull-up resistance RCMD

RDAT

10 100 kΩTo prevent bus floating

Bus signal line capacitance CL40 pF 1 card

CHOST+CBUS shall not exceed

30 pF

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Single card capacitance CCARD 10 pF

Maximum signal line inductance 16 nH fPP ≤ 20 MHz

Pull-up resistance inside card (pin1) RDAT3 10 90 kΩMay be used for card

detection

Note that the total capacitance of CMD and DAT lines will be consist of CHOST, CBUS and one CCARD only because they are

connected separately to the SD Memory Card host.

Host should consider total bus capacitance for each signal as the sum of CHOST, CBUS, and CCARD, these parameters are

defined by per signal. The host can determine CHOST and CBUS so that total bus capacitance is less than the card estimated

capacitance load (CL=40 pF). The SD Memory Card guarantees its bus timing when total bus capacitance is less than

maximum value of CL(40 pF).

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• Bus Signal Levels

As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage.

To meet the requirements of the JEDEC specification JESD8-1A and JESD8-7, the card input and output voltages shall be

within the following specified ranges for any VDD of the allowed voltage range:

Parameter Symbol Min. Max. Unit Remark

Output HIGH voltage VOH 0.75*VDD V IOH = -100 μA @VDD min

Output LOW voltage VOL 0.125*VDD V IOL = -100 μA @VDD min

Input HIGH voltage VIH 0.625*VDD VDD + 0.3 V

Input LOW voltage VIL VSS – 0.3 0.25*VDD V

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• Bus Timing

Parameter Symbol Min Max. Unit Remark

Clock CLK (All values are referred to min (VIH) and max (VIL)

Clock frequency Data Transfer Mode fPP 0 25 MHz CCARD ≤ 10 pF, (1 card)

Clock frequency Identification Mode fOD 0(1)/100 400 KHz CCARD ≤ 10 pF, (1 card)

Clock low time tWL 10 ns CCARD ≤ 10 pF, (1 card)

Clock high time tWH 10 ns CCARD ≤ 10 pF, (1 card)

Clock rise time tTLH 10 ns CCARD ≤ 10 pF, (1 card)

Clock fall time tTHL 10 ns CCARD ≤ 10 pF, (1 card)

Inputs CMD, DAT (referenced to CLK)

Input set-up time tISU 5 ns CCARD ≤ 10 pF, (1 card)

Input hold time tIH 5 ns CCARD ≤ 10 pF, (1 card)

Outputs CMD, DAT (referenced to CLK)

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Output Delay time during Data Transfer Mode tODLY 0 14 ns CL≤ 40 pF, (1 card)

Output Delay time during Identification Mode tODLY 0 50 ns CL≤ 40 pF, (1 card)

(1) 0 Hz means to stop the clock. The given minimum frequency range is for cases were continues clock is required

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• Bus Timing (High Speed Mode)

Parameter Symbol Min Max. Unit Remark

Clock CLK (All values are referred to min (VIH) and max (VIL)

Clock frequency Data Transfer Mode fPP 0 50 MHz CCARD ≤ 10 pF, (1 card)

Clock low time tWL 7 ns CCARD ≤ 10 pF, (1 card)

Clock high time tWH 7 ns CCARD ≤ 10 pF, (1 card)

Clock rise time tTLH 3 ns CCARD ≤ 10 pF, (1 card)

Clock fall time tTHL 3 ns CCARD ≤ 10 pF, (1 card)

Inputs CMD, DAT (referenced to CLK)

Input set-up time tISU 6 ns CCARD ≤ 10 pF, (1 card)

Input hold time tIH 2 ns CCARD ≤ 10 pF, (1 card)

Outputs CMD, DAT (referenced to CLK)

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SDHC Memory Card + Reader S5

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Output Delay time during Data Transfer Mode tODLY 14 ns CL≤ 40 pF, (1 card)

Output Hold time tOH 2.5 ns CL≤ 40 pF, (1 card)

Total System capacitance for each line1CL40 pF (1 card)

1) In order to satisfy severe timing, host shall drive only one card.

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Reliability and Durability

Temperature Operation: -25°C / 85°C

Storage: -40°C (168h) / 85°C (500h)

Junction temperature: max. 95°C

Moisture and corrosion Operation: 25°C / 95% rel. humidity

Storage: 40°C / 93% rel. hum./500h

Salt Water Spray: 3% NaCl/35C; 24h acc. MIL STD Method 1009

Durability 10.000 mating cycles; test procedure: tbd.

Bending 10N

Torque 0.15N.m or +/-2.5 deg

Drop test 1.5m free fall

UV light exposure UV: 254nm, 15Ws/cm² according to ISO 7816-1

X-ray exposure 0.1 Gy of medium-energy radiation (70 keV to 140 keV, cumulative dose per year)

to both sides of the card, according to ISO7816-1.

Visual inspection

Shape and form

No warp page; no mold skin; complete form; no cavities surface smoothness <=

-0.1 mm/cm² within contour; no cracks; no pollution (fat, oil dust, etc.)

Minimum moving force of WP witch 40gf (Ensures that the WP switch will not slide while it is inserted to the connector.)

WP Switch cycles minimum 1000 Cycles(@Slide force 0.4N to 5N)

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