Texas Instruments ADS7056EVM Manual de usuario

ADS7056EVM

User's Guide

Literature Number: SBAU285

March 2017

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Table of Contents

Contents

1 Overview............................................................................................................................. 5

1.1 ADS7056EVM-PDK Features .......................................................................................... 5

1.2 ADS7056EVM Features................................................................................................. 5

2 Analog Interface................................................................................................................... 5

2.1 Connectors for Single-Ended Analog Input........................................................................... 5

2.2 ADC Single-Ended Input Signal Driver................................................................................ 6

3 Digital Interfaces.................................................................................................................. 6

3.1 SPI for ADC Digital I/O .................................................................................................. 6

4 Power Supplies.................................................................................................................... 7

5 ADS7056EVM-PDK Initial Setup ............................................................................................. 8

5.1 Default Jumper Settings................................................................................................. 8

5.2 EVM Graphical User Interface Software Installation ................................................................ 9

6 ADS7056EVM-PDK Operation............................................................................................... 13

6.1 EVM GUI Global Settings for ADC Control.......................................................................... 15

6.2 Time Domain Display Tool ............................................................................................ 16

6.3 Spectral Analysis Tool ................................................................................................. 17

6.4 Histogram Tool.......................................................................................................... 18

6.5 Offset Calibration ....................................................................................................... 19

6.6 Linearity Analysis Tool................................................................................................. 20

7 Bill of Materials, Printed-Circuit Board Layout, and Schematics............................................... 21

7.1 Bill of Materials.......................................................................................................... 21

7.2 PCB Layout.............................................................................................................. 23

7.3 Schematics .............................................................................................................. 27

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List of Figures

1 ADS7056EVM Analog Input Path ......................................................................................... 6

2 ADS7056EVM-PDK Jumper Locations ................................................................................... 8

3 ADS7056EVM Software Installation Prompts............................................................................ 9

4 Device Driver Installation Wizard Prompts.............................................................................. 10

5 LabVIEW Run-Time Engine Installation................................................................................. 11

6 ADS7056EVM-PDK Installation Final Step ............................................................................. 12

7 EVM-PDK Hardware Setup and LED Indicators ....................................................................... 13

8 Launch the EVM GUI Software........................................................................................... 14

9 EVM GUI Global Input Parameters ...................................................................................... 15

10 Time Domain Display Tool Options...................................................................................... 16

11 Spectral Analysis Tool..................................................................................................... 17

12 Histogram Analysis Tool................................................................................................... 18

13 ADS7056 Calibration....................................................................................................... 19

14 Linearity Analysis Tool..................................................................................................... 20

15 ADS7056EVM PCB Layer 1: Top Layer ................................................................................ 23

16 ADS7056EVM PCB Layer 2: GND Plane............................................................................... 24

17 ADS7056EVM PCB Layer 3: Power Planes............................................................................ 25

18 ADS7056EVM PCB Layer 4: Bottom Layer ............................................................................ 26

19 Schematic Diagram (Page 1) of the ADS7056EVM PCB............................................................. 27

20 Schematic Diagram (Page 2) of the ADS7056EVM PCB............................................................. 28

List of Tables

1 Related Documentation..................................................................................................... 4

2 Analog Input Connector Description....................................................................................... 5

3 Voltage Settings for AVDD and VDD Supplies............................................................................ 7

4 VDD Voltage Selection Settings............................................................................................. 7

5 Default Jumper Configurations............................................................................................. 8

6 External Source Requirements for Device Evaluation (SNR and THD)............................................. 17

7 External Source Requirements for Device Evaluation (Linearity).................................................... 20

8 BOM ......................................................................................................................... 21

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ADS7056EVM

User's Guide

SBAU285–March 2017

ADS7056EVM

This user's guide describes the characteristics, operation, and use of the ADS7056 evaluation module

(EVM) performance demonstration kit (PDK). This kit is an evaluation platform for the ADS7056 device,

which is a 14-bit, 2.5-MSPS, single-ended analog input, successive approximation register (SAR) analog-

to-digital converter (ADC) that features an easy-to-use SPI. The EVM-PDK eases the evaluation of the

ADS7056 device with hardware, software, and computer connectivity through the universal serial bus

(USB) interface. This user's guide includes complete circuit descriptions, schematic diagrams, and a bill of

materials.

The following related documents are available through the Texas Instruments website.

Table 1. Related Documentation

Device Literature Number

ADS7056 SBAS769

OPA836 SLOS712

TPS79147 SLVS325

REF1933 SBOS697

SN74AVC4T245 SCES576

LM7705 SNVS420

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Overview

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ADS7056EVM

Microsoft, Windows are registered trademarks of Microsoft Corporation.

LabVIEW is a trademark of National Instruments.

All other trademarks are the property of their respective owners.

1 Overview

The ADS7056EVM-PDK is a platform for evaluating the performance of the ADS7056 SAR ADC, which is

a single-ended analog input, 14-bit, 2.5-msps device. The evaluation kit includes the ADS7056EVM board

and the precision host interface (PHI) controller board that enables the accompanying computer software

to communicate with the ADC over USB for data capture and analysis.

The ADS7056EVM board includes the ADS7056 SAR ADC, all the peripheral analog circuits, and the

components required to achieve optimum performance from the ADC.

The PHI controller board primarily serves three functions:

• Provide a communication interface from the EVM to the computer through a USB port

• Provide the digital input and output signals necessary to communicate with the ADS7056 device

• Supply power to all active circuitry on the ADS7056EVM board

Along with the ADS7056EVM and PHI controller board, this evaluation kit includes an A-to-micro-B USB

cable to connect to a computer.

1.1 ADS7056EVM-PDK Features

The ADS7056EVM-PDK includes the following features:

• Hardware and software required for diagnostic testing as well as accurate performance evaluation of

the ADS7056 ADC

• USB powered — no external power supply is required

• The PHI controller board that provides a convenient communication interface to the ADS7056 ADC

over USB 2.0 (or higher) for power delivery as well as digital input and output

• Easy-to-use evaluation software for Microsoft®Windows®7, 64-bit operating systems

1.2 ADS7056EVM Features

The ADS7056EVM includes the following features:

• Onboard low-noise, low-distortion ADC input drivers optimized to meet ADC performance

• Onboard ultra-low noise, low-dropout (LDO) regulators, to generate supplies for the operation amplifier

and voltage reference to generate the power supply for ADC

2 Analog Interface

The ADS7056EVM is a low-power, small ADC that supports single-ended analog inputs. The

ADS7056EVM uses an OPA836 amplifier to drive the inputs of the ADC. The ADS7056EVM is designed

for easy interfacing to analog sources. This section describes driver details, including jumper configuration

for the analog input signal source.

2.1 Connectors for Single-Ended Analog Input

The ADS7056EVM is designed for easy interfacing to an external, analog, single-ended source through a

subminiature version A (SMA) connector or 100-mil headers. J1 is the SMA connector that allows analog

source connectivity through coaxial cables. Alternatively, 100-mil jumper cables or mini-grabbers can be

used to connect analog sources to the J6:1 pin. Table 2 lists the analog input connectors.

Table 2. Analog Input Connector Description

Pin Number Signal Description

J1 INP Positive single-ended input provided at the SMA

J6:1 INP Alternate location to provide the positive single-ended input

OPA_VDD

OPA836

AINP

GND

AVDD

Device

Input Driver Device: 14-bit, 2.5-msps,

single-ended input

GND

33 

680 pF

VSOURCE

AVDD

AVDD+ 0.2 V - 5.5 V

3.3 µF

1 µF

REF1933

Analog Power Supply for ADC

VIN VOUT

GND

SCLK

SDO

33 

Host

Controller

33 

AINP

Analog Interface

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2.2 ADC Single-Ended Input Signal Driver

SAR ADC inputs terminate in switched-capacitor networks that create large instantaneous current loads

when the switches are closed, which effectively makes the ADC inputs dynamically low impedance. The

single-ended input of the ADS7056EVM are therefore driven by an OPA836 device used in a noninverting,

unity-gain configuration to maintain ADC performance with maximum loading at full device throughput of

2.5 msps.

2.2.1 Input Signal Path

Figure 1 shows the signal path for positive single-ended input applied to the ADS7056EVM. An OPA836

amplifier is used in buffer configuration and it drives single-ended input of ADS7056EVM. An RC filter

value of 33 Ωand 680 pF are selected to achieve SINAD greater than 75 dB and THD less than –85 dB

for 2-kHz sine wave input at full throughput of 2.5 msps.

Figure 1. ADS7056EVM Analog Input Path

3 Digital Interfaces

As noted in Section 1, the EVM interfaces with the PHI, which in turn communicates with the computer

over USB. The two devices on the EVM that the PHI communicates with are the ADS7056 ADC (over

SPI) and the EEPROM (over I2C). The EEPROM comes preprogrammed with the information required to

configure and initialize the ADS7056EVM-PDK platform. When the hardware is initialized, the EEPROM is

no longer used.

3.1 SPI for ADC Digital I/O

The ADS7056EVM-PDK supports interface and calibration modes detailed in the Ultra-Low Power, Ultra-

Small Size, 14-Bit, 2.5-MSPS, SAR ADC data sheet. The PHI is capable of operating at a 3.3-V logic level

and is directly connected to the digital I/O lines of the ADC.

The buffer SN74AVC4T245 (U8) is included in the design to ensure that, if required, the SDO can be

driven to a host controller over long cables with minimal distortion.

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Power Supplies

SBAU285–March 2017

ADS7056EVM

4 Power Supplies

The device supports a wide range of operation on its analog supplies. The AVDD can operate from 2.35 V

to 3.6 V. The DVDD operates from 1.65 V to 3.6 V, independent of the AVDD supply. The analog portion

of the device operates from a 5.5-V supply, which in turn generates a 4.7-V VDD supply for the OPA836

operation amplifier using the low-noise, fixed voltage regulator, TPS79147. The 3.3-V AVDD supply for the

ADS7056EVM is generated using the low-drift, low-power, voltage reference REF1933.

There is provision given onboard to use an adjustable version of the TPS79901 regulator, to generate a

VDD supply other than 4.7 V. Table 3 lists the feedback resistor values to be populated onboard to

generate the desired VDD supply voltage.

Table 3. Voltage Settings for AVDD and VDD Supplies

Output Voltage Device (U6) C24 R24 R23 C7 and C11

4.7 V (default) TPS79147

(default) 10 nF (default) Not installed (default) Not installed (default) Not installed (default)

3.3 V TPS79901 Open 53.6 kΩ30.1 kΩ15 pF

3.6 V TPS79901 Open 60.4 kΩ30.1 kΩ15 pF

4.83 V TPS79901 Open 90.9 kΩ30.1 kΩ15 pF

There is provision given for operating the OPA836 operational amplifier and the ADS7056 ADC from the

common power supply AVDD. Table 4 lists the modifications required to select a common power supply

for the OPA836 and ADS7056 devices.

Table 4. VDD Voltage Selection Settings

OPA836 Supply Source R10 R11

VDD

(default 4.7 V) Assembled (0 Ω) Not installed

AVDD Not installed Assemble (0 Ω)

The rail-to-rail amplifier cannot output zero volts when operating from a single-supply voltage and can

introduce an error at the output when the input signal is near zero. To enable the amplifier output swing to

zero volts, the Vs-pin of the OPA836 device is powered from the LM7705 device, which is a –0.23-V, low-

noise, fixed voltage regulator. However, there is provision given to connect the Vs-pin of the OPA836

device to the ground plane. To drive the Vs-pin of the OPA836 device to GND, R9 must be assembled

and R18 must be removed.

The digital portion of the ADC operates from a 3.3-V supply, EVM_DVDD from the PHI.

ADS7056EVM-PDK Initial Setup

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5 ADS7056EVM-PDK Initial Setup

This section explains the initial hardware and software setup procedure that must be completed for proper

operation of the ADS7056EVM-PDK.

5.1 Default Jumper Settings

Figure 2 shows the silkscreen plot, which details the jumper locations for ADS7056EVM-PDK.

Figure 2. ADS7056EVM-PDK Jumper Locations

Table 5 lists the functionality and default configuration of each jumper. No shunts are required on any

location of the EVM for normal operation. Remove any shunts that may be present at locations J3 through

J6.

Table 5. Default Jumper Configurations

Reference Designator Default Configuration Description

J3 Open EEPROM write protection

J4 Open Bias voltage output

J6 Open Alternate location to provide the positive single-ended input

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ADS7056EVM-PDK Initial Setup

SBAU285–March 2017

ADS7056EVM

5.2 EVM Graphical User Interface Software Installation

The following steps describe how to install the software for the EVM GUI.

1. Download the latest version of the EVM graphical user interface (GUI) installer from the Tools and

Software folder of the device, and run the GUI installer to install the EVM GUI software on your

computer.

CAUTION

Manually disable any antivirus software running on the computer before

downloading the EVM GUI installer onto the local hard disk. Failure to disable

antivirus software, depending on the antivirus settings, may cause an error

message to appear or the installer.exe file may be deleted.

2. Accept the License Agreements and follow the on-screen instructions to complete the installation (see

Figure 3).

Figure 3. ADS7056EVM Software Installation Prompts

ADS7056EVM-PDK Initial Setup

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3. As a part of the ADS7056EVM GUI installation, a prompt with a Device Driver Installation Wizard

appears on the screen (see Figure 4). Click the Next button to proceed, then click the Finish button

when the installation is complete.

Figure 4. Device Driver Installation Wizard Prompts

NOTE: A notice may appear on the screen stating that Windows cannot verify the publisher of this

driver software. Select the Install this driver software anyway option.

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