Texas Instruments LMK00308EVM Manual de usuario

User’s Guide

March 2012

LMK00308EVM User’s Guide

March 2012 SNAU117 LMK00308EVM User’s Guide 1

1. General Description

This user guide describes how to set up and operate the LMK00308 evaluation module (EVM). The

LMK00308 is a 3-GHz, 8-output differential clock buffer intended for high frequency, low additive jitter clock

distribution and level translation. The EVM allows the user to verify the functionality and performance

specifications of the device. Refer to the LMK00308 datasheet for the functional description and

specifications.

2. Features

Low-noise clock fan-out via two banks of four differential outputs and one LVCMOS output

Selectable differential output type (LVPECL, LVDS, HCSL, or Hi-Z)

3:1 input multiplexer with two universal input buffers and one crystal oscillator interface

DIP switch control of device configuration

3.3 V core and 3 independent 3.3 V/2.5 V output supplies (one per output bank) using external supply

inputs or optional LP3878-ADJ LDO or LMZ10500 switching regulator on board

AC- or DC-coupled input & output interface with low-skew, controlled-impedance traces and edge SMA

connectors

Figure 1: LMK00308EVM Board Photo

2 LMK00308EVM User’s Guide March 2012

CONTENTS

1. General Description................................................................................................... 1

2. Features...................................................................................................................... 1

CONTENTS........................................................................................................................ 2

LIST OF FIGURES ............................................................................................................. 3

LIST OF TABLES............................................................................................................... 3

3. Quick Setup................................................................................................................ 4

4. Signal Path and Control Switches ........................................................................... 5

5. Power Supplies .......................................................................................................... 6

5.1. Independent Output Supply Voltages................................................................... 6

6. Clock Inputs ............................................................................................................... 7

6.1. Configuring CLKinX+ for a Single Ended Input................................................... 7

7. Crystal Oscillator Interface....................................................................................... 7

7.1. Configuring OSCin for a Single Ended Input....................................................... 7

8. Clock Outputs ............................................................................................................ 8

8.1. LVPECL and LVCMOS with 2.5 V Vcco ................................................................ 8

9. Schematics................................................................................................................. 9

10. Board Layout.......................................................................................................... 12

11. Bill of Materials ...................................................................................................... 16

March 2012 LMK00308EVM User’s Guide 3

LIST OF FIGURES

Figure 1: LMK00308EVM Board Photo ........................................................................... 1

Figure 2: LMK00308 Evaluation Board Quick Start Setup............................................ 4

Figure 3: Schematic Sheet #1.......................................................................................... 9

Figure 4: Schematic Sheet #2........................................................................................ 10

Figure 5: Schematic Sheet #3........................................................................................ 11

Figure 6: Top Side, Layer #1 (Not to scale).................................................................. 12

Figure 7: Internal Ground Plane, Layer #2 (Layer Inverted, Not to scale)................. 13

Figure 8: Internal Power Plane, Layer #3 (Not to scale).............................................. 14

Figure 9: Bottom Side, Layer #4 (Top view, Not to scale) .......................................... 15

LIST OF TABLES

Table 1: Default Clock Output Modes............................................................................. 4

Table 2: Input Selection.................................................................................................... 5

Table 3: Bank A Output Mode Selection......................................................................... 5

Table 4: Bank B Output Mode Selection......................................................................... 5

Table 5: REFout Enable Selection................................................................................... 5

Table 6: EVM Power Supply Configuration Options ..................................................... 6

4 LMK00308EVM User’s Guide March 2012

3. Quick Setup

To quickly set up and operate the board with basic equipment, refer to the setup procedure below and test

setup shown in Figure 2.

LMK0030x

EVALUATION

MODULE

CLKinX

CLKinX*

VCC_EXT

GND

Bank A Outputs

(LVPECL default)

REFout

(LVCMOS)

Bank B Outputs

(LVPECL default)

Bottom side:

25 MHz Crystal

(Default Input)

CLKoutBn

CLKoutBn*

CLKoutAn

CLKoutAn*

O-SCOPE

(50Winputs)

50WTERM

Note: Terminate unused

output traces (or disconnect

from output pin on PCB)

CLOCK

SOURCE

(OPTIONAL)

50WTERM

4-6 V

GND

POWER

SUPPLY

Figure 2: LMK00308 Evaluation Board Quick Start Setup

1. Verify the output mode control switches, S1[1:5], match the states shown in Table 1 to reflect the default

output clock interfaces configured on the EVM.

Table 1: Default Clock Output Modes

SW Position/Name

SW State

Default Clock Output Modes

S1[1] / CLKoutB_Type1

OFF

Bank B outputs are LVDS

S1[2] / CLKoutB_Type0

S1[3] / CLKoutB_Type1

OFF

Bank A outputs are LVPECL

S1[4] / CLKoutB_Type0

OFF

S1[5] / REFout_EN

REFout (CMOS) enabled

2. Connect a 4 –6 V power supply to VCC_EXT and GND terminals of the power block labeled J2. This powers

the on-board LDO regulator to supply 3.3 V to the VCC and VCCO rails of the IC. Both VCC & VCCO status

LEDs should be lit green when ON.

3. Set the desired clock input using the input selection control switches, S1[6:7], per Table 2. The onboard 25

MHz crystal (Y1) can be selected, so an external clock source is not required. A differential clock source can

be connected to SMAs labeled CLKin0/0* or CLKin1/1*. By default, these differential inputs are AC coupled

and terminated near the device with 100 ohms differential. To configure the EVM for a single-ended input,

refer to the Clock Inputs section.

March 2012 LMK00308EVM User’s Guide 5

Table 2: Input Selection

Selected Input

Default Input Mode

S1[6] CLKin_Sel1 State

S1[7] CLKin_Sel0 State

CLKin0/0*

Differential clock

OFF

CLKin1/1*

Differential clock

OFF

OSCin

25 MHz XTAL onboard

Don’t care

4. Connect and measure any clock output SMA labeled CLKoutA#/A#*, CLKoutB#/B#*, or REFout to an

oscilloscope or other test instrument using SMA cable(s). The output clock will be a level-translated/buffered

copy of the selected clock input or crystal oscillator. Note: All output clocks are AC-coupled to the SMA

connectors to ensure safe use with RF instruments.

Note: Any active output trace(s) without proper load termination can cause signal reflections on the board,

which can couple onto nearby outputs and degrade signal quality and measurement accuracy. To minimize

these effects, be sure to properly terminate any unused output trace with a 50-ohm SMA load, or else

disconnect any unused output trace from the device output pin by removing the series 0-ohm resistor. An

unused output or output bank may also be disabled using the output mode control switch.

4. Signal Path and Control Switches

The LMK00308 supports single-ended or differential clocks on CLKin0 and CLKin1. A third input, OSCin, has

an integrated crystal oscillator interface that supports a fundamental mode, AT-cut crystal or an external

single-ended clock. To achieve the maximum operating frequency and lowest additive jitter, it is

recommended to use a differential input clock with high slew rate (>3 V/ns) on either CLKin0 or CLKin1 port.

The device provides up to 8 differential outputs with pin-selectable output mode (LVPECL, LVDS, HCSL, or

Hi-Z). An additional output, REFout, has a fixed LVCMOS buffer with output enable input.

All control pins are configured with the control DIP switch, S1. The input selection logic is shown in Table 2.

The output mode selection logic for Bank A and Bank B are shown in Table 3 and Table 4. The REFout

enable logic is shown in Table 5.

Table 3: Bank A Output Mode Selection

Bank A Output Mode

S1[3] CLKoutA_Type1 State

S1[4] CLKoutA_Type0 State

LVPECL

OFF

LVDS

OFF

HCSL

OFF

Disabled/Hi-Z

Table 4: Bank B Output Mode Selection

Bank B Output Mode

S1[1] CLKoutB_Type1 State

S1[2] CLKoutB_Type0 State

LVPECL

OFF

LVDS

OFF

HCSL

OFF

Disabled/Hi-Z

Table 5: REFout Enable Selection

REFout Enable Mode

S1[5] REFout_EN State

Disabled/Hi-Z

OFF

Enabled

6 LMK00308EVM User’s Guide March 2012

5. Power Supplies

The power supply section on the EVM provides flexibility to power the device using the onboard regulator(s)

or direct supply input(s). A combination of 0-ohm resistor options allows the user to modify the EVM power

supply configuration, if desired.

By default, 3.3 V is supplied to both VCC and VCCO rails by the onboard LDO regulator, U3. To power the

regulator, connect a 4 V –6 V input voltage and ground from an external power source to the terminal block,

J2, or SMA input labeled VCC_EXT.

To modify the EVM with a different power supply configuration, populate the resistor options as shown in

Table 6. Then, apply the appropriate voltage(s) to the EVM power input(s).

If the EVM is configured for dual direct supplies, connect the 3.3 V supply and ground to VCC_EXT and the

2.5 V supply and ground to the SMA input labeled VCCO_EXT.

Decoupling capacitors and 0-ohm resistor footprints, which can accommodate ferrite beads, can be used to

isolate the EVM power input(s) from the device power pins.

Table 6: EVM Power Supply Configuration Options

LP3878 LDO

Regulator (U3)

3.3 V (DEFAULT)

LMZ10500

Switcher (U2)

3.3 V

Single

Direct Supply

3.3 V

Dual

Direct Supplies

3.3 V & 2.5 V

VCC_EXT port

(J2 or SMA)

Apply 4 V –6 V

Apply 4 V –5.5 V

Apply 3.3 V ± 5%

VCCO_EXT port

(SMA)

Not used

Apply 2.5 V ± 5%

U2 Vout

Not used

3.3 V (VCC & VCCO)

Not used

U3 Vout

3.3 V (VCC & VCCO)

Not used

R131

OPEN

R132

R134

OPEN

R145

OPEN

R153

OPEN

R155

OPEN

R156

OPEN

5.1.Independent Output Supply Voltages

On the bottom side of the EVM, resistor options provide flexibility to power each of the three individual output

supply pins (VCCOA, VCCOB, and VCCOC) from either VCC or VCCO rail. This is useful when 3.3 V and

2.5 V are both needed for separate output supplies.

For example, if Bank A outputs require 3.3 V LVPECL levels, Bank B outputs require 2.5 V LVPECL levels,

and REFout requires 2.5 V LVCMOS, then VCCOA can be connected to VCC (3.3 V) and VCCOB and

VCCOC can be connected to VCCO (2.5 V).

The EVM power supply needs to be modified to get 2.5 V on the VCCO rail, either using the VCCO_EXT

input or LMZ10500 switcher, per Table 6. To configure LMZ10500 with 2.5 V output, set R138 to 150k and

R139 to 118k.

Note: When the LMZ10500 switcher is used to power the DUT and an ultra-low-noise clock source is used,

the higher output noise voltage of the switcher (compared to the LP3878-ADJ) can cause an slight increase

March 2012 LMK00308EVM User’s Guide 7

in the output phase noise floor at low offset frequencies as well as low-level spurs. The high PSRR of the

device helps to minimize supply-induced jitter.

6. Clock Inputs

The SMA inputs labeled CLKin0 & CLKin0* and CLKin1 & CLKin1* can be configured to receive a differential

clock or single-ended clock. Best performance is achieved with a differential input clock, which is the default

configuration for both CLKin ports.

Both CLKin0 and CLKin1 paths include footprint options to provide the user with flexibility in configuring the

termination, biasing, and coupling for the device inputs.

6.1.Configuring CLKinX+ for a Single Ended Input

To configure an AC-coupled or DC-coupled single-ended clock input on CLKin0, follow the steps below.

CLKin1 can be modified similarly.

1. Remove R24 (100 ohm differential termination).

2. Terminate CLKin0 (driven input) by installing 51 ohms on R30.

3. Install 0.1 uF on C10 as a bypass capacitor.

4. Modify for AC or DC coupled input:

a. AC-coupled input:

i. Install 0 ohms on R23, so CLKin0* input pin is AC coupled to ground via C17.

b. DC-coupled input:

i. Replace R22 and R28 with 0 ohms to DC couple the input path.

ii. Bias CLKin0*(non-driven input) with a reference voltage near the common-mode voltage of

the DC-coupled input signal (on CLKin0) using R21 and R23 to form a voltage divider from

VCC.

For example, if CLKin0 will be driven by a single-ended, DC-coupled LVCMOS signal with a common-mode

voltage of 1.65 V, then 1 kohm resistors can be installed on R21 and R23 to bias CLKin0* to VCC/2.

7. Crystal Oscillator Interface

The LMK00308 has an integrated crystal oscillator interface (OSCin/OSCout) that supports a fundamental

mode, AT-cut crystal. If the crystal input is selected, the onboard XTAL on either footprint Y1 or Y2 will start-

up and the oscillator clock can be measured on any enabled output.

By default, a 25.000 MHz XTAL is populated on Y1, which uses a HC49 footprint on the bottom side of the

PCB. Alternatively, a 3.2 x 2.5 mm XTAL or 3.3 V XO (3.3 V CMOS or clipped sinewave) can be populated

on Y2, located on the top side. Only one XTAL footprint should be used at a time.

When using a XTAL, the external load capacitor values of C18 and C22 (CEXT) depend on the specified load

capacitance (CL) for the crystal, as well as the device’s OSCin input capacitance (CIN = 1 pF typical) and the

PCB stray capacitance (CSTRAY ~ 1 pF). The selected 25 MHz crystal is specified for CLof 18 pF. Assuming

equal external load capacitor values for optimum symmetry, CEXT can be calculated as follows:

CEXT = (CL–CIN –CSTRAY) * 2

CEXT = (18 pF –1 pF –1 pF) * 2

CEXT ~ 33 pF (nearest standard value)

To limit crystal power dissipation, a 1 kohm resistor is placed between the OSCout pin and the crystal.

7.1.Configuring OSCin for a Single Ended Input

To configure a single-ended clock input on OSCin, remove R34 and R37 to disconnect the crystal. Install 0.1

uF on C24 to provide an AC-coupled path from the SMA input labeled OSCin to the device input, which has

internal biasing. Note that the OSCin path includes a 51-ohm termination on R42.

8 LMK00308EVM User’s Guide March 2012

8. Clock Outputs

By default, Bank A outputs are configured for LVPECL mode, source-terminated with 160 ohm resistors, and

AC coupled to the SMA connectors labeled CLKoutA#+ / CLKoutA#-. Bank B outputs are configured for

LVDS and AC coupled to SMA connectors labeled CLKoutB#+ / CLKoutB#-. To modify the output interface

for a different output mode, refer to the modifications noted in the Schematics section.

REFout is a LVCMOS output and is AC coupled to its SMA connector.

As noted before, active output traces should be properly terminated; otherwise any unused output pin can be

disconnected from the output trace by removing the 0-ohm series resistor.

8.1.LVPECL and LVCMOS with 2.5 V Vcco

The LVPECL and LVCMOS output levels depend on the output driver’s respective Vcco supply as specified

in the datasheet.

When an output bank is configured for LVPECL and its Vcco supply is 2.5 V, it is suggested to replace the

160-ohm -termination resistor to ground with a lower value, such as 91 ohms, to maintain proper DC

bias current on each output.

March 2012 LMK00308EVM User’s Guide 9

9.Schematics

Figure 3: Schematic Sheet #1

10 LMK00308EVM User’s Guide March 2012

Figure 4: Schematic Sheet #2

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