Freescale Semiconductor MSC8144ADS Manual de usuario

MSC8144ADS Processor Board

Reference Manual

MSC8144ADSRM

Rev 0, February 2007

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MSC8144ADSRM

Rev. 0

2/2007

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MSC8144ADS Reference Manual, Rev. 0

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Contents

1General Information

1.1 Working Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

1.1.1 Standalone Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.1.2 AMC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.1.3 Debugging Chain Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.1.3.1 Single . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.1.3.2 Chain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.2 MSC8144ADS processor board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.3 External Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

1.4 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5

1.5 Definitions, Acronyms, and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6

1.6 Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7

1.7 Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7

2Hardware Preparation and Installation

2.1 Unpacking Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

2.2 Installation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

3Memory Map

3.1 MPC8560 Host Mapping for the MSC8144ADS . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3.2 MSC8144 Mapping. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

4Controls and Indicators

4.1 DIP Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2

4.2 Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5

4.3 LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6

4.4 Push Buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6

5ADS Functional Description

5.1 MSC8144 Memory System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

5.1.1 DDR2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

5.1.2 DDR1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

5.1.3 DDR Connection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

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5.1.4 Power for DDR Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2

5.2 MPC8560 PCI Host Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3

5.3 GETH Interface Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3

5.4 Serial RapidIO Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5

5.5 TDM Ports and Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5

5.5.1 16-bit Voice Codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5

5.5.2 E1/T1 Framer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5

5.5.3 TDM Bus Interconnection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6

5.6 RS-232 on UART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7

5.7 I2C Bus Interconnection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8

5.7.1 Serial EEPROM for MPC8560 Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8

5.7.2 Serial EEPROM for MSC8144 Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9

5.7.3 RTC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9

5.7.4 Codec. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9

5.7.5 Power Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10

5.8 SPI Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10

5.9 Reset Operation and Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11

5.9.1 Reset Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12

5.9.2 PORESET Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12

5.9.3 Hard Reset Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13

5.10 Clock Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15

5.10.1 Clock Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15

5.10.2 SHMOO Programmable Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16

5.11 JTAG Debug Port Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17

5.12 Host Processor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17

5.12.1 Host Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-18

5.12.2 Host Memory Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19

5.12.3 Host Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19

5.12.3.1 Flash on LBIU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19

5.12.3.2 DS3 Framer on LBIU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-20

5.12.3.3 BCSR on FPGA (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21

5.13 Interrupt Assignment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-22

5.14 Board Control and Status Registers (BCSRs) . . . . . . . . . . . . . . . . . . . . . . . . . . 5-23

5.14.1 BCSR0 Board Control Register 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-24

5.14.2 BCSR1 Board Control Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25

5.14.3 BCSR2 Board Control Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25

5.14.4 BCSR3 Board Control Register 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26

5.14.5 BCSR4 Board Control Register 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27

5.14.6 BCSR5 Board Control Register 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-28

5.14.7 BCSR6 Board Control Register 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-28

5.14.8 BCSR7 Board Control Register 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-28

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5.14.9 BCSR8 Board Miscellaneous Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-29

5.14.10 BCSR9 Board Control Miscellaneous Register 2 . . . . . . . . . . . . . . . . . . . . . . 5-29

5.14.11 BCSR10 Board Status Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-30

5.14.12 BCSR11 Board Status Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-30

5.14.13 BCSR12 Board Status Register 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-31

5.14.14 BCSR13 FA Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-31

5.14.15 BCSR14 FA_M3 Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-31

5.14.16 BCSR15 Reserved. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-32

5.14.17 BCSR16 Board Status Register 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-32

5.14.18 BCSR17 Board Status Register 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-32

5.14.19 BCSR18 Board Status Register 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-32

5.14.20 BCSR19 Board Status Register 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-32

5.14.21 BCSR20 Board Status Register 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-33

5.15 Power Supply System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-33

5.15.1 Primary Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-33

5.15.2 Power Supply Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-33

5.16 Interconnection Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-35

6Expansion Options

6.1 PTMC Expansion Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

6.2 AMC in ATCA Environment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-10

7Replacing the MSC8144 DSP

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Contents

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MSC8144ADS Reference Manual, Rev. 0

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General Information 1

This document describes the MSC8144ADS processor board. The MSC8144ADS processor

board is an application development system (ADS) that provides a complete debugging

environment for engineers developing applications for the Freescale MSC8144 DSP family.The

MSC8144ADS processor board is intended to serve as a platform for software and hardware

development in the MSC8144 processor environment. On-board resources and the associated

debugger enable developers to perform a variety of tasks: download and run code, set

breakpoints, display memory and registers, and connect proprietary h/w via the expansion

connector. This board answers the development needs of three different infrastructure

applications: wireless transcoding, IP telephony, and video transcoding. It can also be used as a

demonstration tool for these types of applications, and for control processing in applications such

as network routers and switches, mass storage subsystems, network appliances, and print and

imaging systems.

The MSC8144 device is a highly integrated DSP processor that contains four StarCore SC3400

DSP subsystems, 512 Kbyte of M2 shared memory, 10 Mbyte of M3 shared memory, L1

instruction and data caches optimized for packet telephony, 128 Kbyte of shared L2 instruction

cache, a DDR memory controller, a serial RapidIO® interface, two 10/100/1000Base-T Ethernet

controllers, an ATM Controller Supporting various ATM adaptation layers, eight 512-channel

time-division multiplexing (TDM) interfaces, a 16-channel DMA controller, 32-bit PCI interface

that runs at 66/33MHz, a UART interface, and an I2C interface.

The MSC8144ADS processor board is based on the 64-bit MSC8144 as a slave processor

controlled from an MPC8560 host processor via a PCI bus or GETH switch. However, the board

can be configured to bypass the host in certain situations. In addition, the board can function in a

standalone configuration or as an AMC card in the ATCA system. The ADS board uses a triple

AMC form factor.

1.1 Working Configurations

The MSC8144ADS has two basic operating modes, as discussed in the following sections. In

addition to the basic modes, there are two debugging chain options that can be used with either

operating mode.

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General Information

1.1.1 Standalone Mode

The MSC8144ADS processor board can be run in a standalone mode, like other application

development systems, with direct connections to debuggers, power supply, and other external

connections.

1.1.2 AMC Mode

As opposed to standalone mode, in this mode, the MSC8144ADS processor board can be

connected to an additional MSC8144ADS processor board via the AMC ATCA edge connector.

For details on this mode, see Chapter 6, Expansion Options. The MSC8144ADS processor

board can also be connected to a TUNDRA platform via the edge connector.

1.1.3 Debugging Chain Options

Both options can be used in standalone and AMC modes.

1.1.3.1 Single

A single debugger connection can be used to debug applications for the MSC8144ADS processor

board. The debugger can be connected to either the MSC8144, or the MPC8560, or both of them

simultaneously (but independently). For a single connection to the MSC8144, use the P1

connection, and configure the board for this using the DIP switches (SW[2–3]). For a single

connection to the MPC8560, use the P11 connection, and configure the board for this using the

DIP switches (SW[2–3]).

1.1.3.2 Chain

A chain connection can be used to debug applications for the MSC8144ADS processor board. In

such a case, the debugger can only be connected to the MSC8144-MPC8560 via the P1

connection. Use the DIP switches (SW2.3) to configure the board for this.

1.2 MSC8144ADS processor board Features

The ADS is based on the MSC8144 as slave processor controlled from a PQIII (MPC8560) via

the PCI bus or GETH switch.

Supports MSC8144 running at up to 1000MHz, with cores voltages at 1V.

Dual DDR (DDR1 and DDR2) on SODIMM with 32 bits utilized, which provides a 256

Mbyte capacity, at a data rate up to 533 MHz

Programmable Hard Reset Configuration for MSC8144 is executed from PCI host

(MPC8560), I2C EEPROM or other sources.

Configuration and boot code for the host is loaded from Flash memory.

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PTMC expansion connectors carries most signals of both processors (except High Speed

signals)

PTMC pinout is designed to comply with the PT3MC or PT5MC standard.

RGMII GETH switch and SGMII GETH switch (expands connectivity options)

Two E1/T1 framers and codec on TDM bus.

Debugging is performed via an external command converter connected to the OnCE

14-pin header or COP 16-pin header for separate access to the processors.

JTAG Chain mode is provided via EOnCE header.

After MSC8144 reset, the MSC8144 Debug Enable/Disable options may be selected. The

processor EE pins enable and support the noted options.

Board Control and Status Register (BCSR) implemented in FPGA.

Board Identification and board status may be read via the BCSR.

Two SMB form RF-connectors enable the connection of up to two external pulse

generators to the two clock inputs of the MSC8144.

Various configurations (configurable via DIP switches or BCSR):

— Standalone mode with an external power 12 VDC @ 6 A.

— As an AMC card in the ATCA system.

— No host (the host MPC8560 stays in continued reset—configurable via SW 2.1). All

local bus operations are emulated by I2C expanders and controlled from the MSC8144.

Push Buttons

— Main Power-On Reset (for both Host and Slave);

— Hard Reset, Soft Reset, and NMI for MSC8144

1.3 External Connections

The MSC8144ADS processor board interconnects with external devices via the following set of

connectors (see Figure 1-1 and Figure 1-2):

1. Double RS232 9-pin connector (P2).

Upper - connects to Host UART port.

Lower - connects to MSC8144 UART port

2. Stereo Jack, LINE-IN (P4)

3. Stereo Jack, LINE-OUT (P6)

4. Four GETH ports RJ-45 connectors with LEDs (100 MHz displays green and 1GHz

displays amber) (P9)

5. Double RJ-48 eight pin E1/T1 connectors (J5)

6. Four 64-pin PTMC connectors for expansion cards (J1–J4).

7. Mictor LA Connectors hold host (MPC8560) LBC signals (P7–P8]).

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General Information

8. 5 V connection for fan (J6)

Mounted: Fan is connected

Removed: Fan is not connected

9. Host (MPC8560) COP Debug connector 16-pin (P11 to work with host only with single

JTAG).

10. Power jack for 12 V @ 6 A external power supply (P10)

11. ISP 14-pin connector to program Altera FPGA. (P3)

12. MSC8144 OnCE Debug connector 14-pin (P1 for single or chain).

13. AMC edge connector (P26)

Figure 1-1. MSC8144ADS processor board External Connections (front view)

Figure 1-2. MSC8144ADS processor board External Connections (rear view)

321

45 6

910

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