Renesas HD6473937RXV Manual de usuario

Regarding the change of names mentioned in the document, such as Hitachi

Electric and Hitachi XX, to RenesasTechnology Corp.

The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas

Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog

and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)

Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand

names are mentioned in the document, these names have in fact all been changed to Renesas

Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and

corporate statement, no changes whatsoever have been made to the contents of the document, and

these changes do not constitute any alteration to the contents of the document itself.

Renesas Technology Home Page: http://www.renesas.com

Renesas Technology Corp.

Customer Support Dept.

April 1, 2003

To all our customers

Cautions

Keep safety first in your circuit designs!

1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better

and more reliable, but there is always the possibility that trouble may occur with them. Trouble with

semiconductors may lead to personal injury, fire or property damage.

Remember to give due consideration to safety when making your circuit designs, with appropriate

measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or

(iii) prevention against any malfunction or mishap.

Notes regarding these materials

1. These materials are intended as a reference to assist our customers in the selection of the Renesas

Technology Corporation product best suited to the customer's application; they do not convey any

license under any intellectual property rights, or any other rights, belonging to Renesas Technology

Corporation or a third party.

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third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or

circuit application examples contained in these materials.

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subject to change by Renesas Technology Corporation without notice due to product improvements or

other reasons. It is therefore recommended that customers contact Renesas Technology Corporation

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(http://www.renesas.com).

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information contained herein.

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or system that is used under circumstances in which human life is potentially at stake. Please contact

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contained therein.

H8/3937 Series, H8/3937R Series

H8/3937 HD6433937, HD6473937

H8/3936 HD6433936

H8/3935 HD6433935

H8/3937R HD6433937R, HD6473937R

H8/3936R HD6433936R

H8/3935R HD6433935R

Hardware Manual

ADE-602-218

Rev. 1.0

2/27/01

Hitachi Ltd.

Cautions

1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s

patent, copyright, trademark, or other intellectual property rights for information contained in

this document. Hitachi bears no responsibility for problems that may arise with third party’s

rights, including intellectual property rights, in connection with use of the information

contained in this document.

2. Products and product specifications may be subject to change without notice. Confirm that you

have received the latest product standards or specifications before final design, purchase or

use.

3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.

However, contact Hitachi’s sales office before using the product in an application that

demands especially high quality and reliability or where its failure or malfunction may directly

threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear

power, combustion control, transportation, traffic, safety equipment or medical equipment for

life support.

4. Design your application so that the product is used within the ranges guaranteed by Hitachi

particularly for maximum rating, operating supply voltage range, heat radiation characteristics,

installation conditions and other characteristics. Hitachi bears no responsibility for failure or

damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,

consider normally foreseeable failure rates or failure modes in semiconductor devices and

employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi

product does not cause bodily injury, fire or other consequential damage due to operation of

the Hitachi product.

5. This product is not designed to be radiation resistant.

6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document

without written approval from Hitachi.

7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi

semiconductor products.

Preface

The H8/300L Series of single-chip microcomputers has the high-speed H8/300L CPU at its core,

with many necessary peripheral functions on-chip. The H8/300L CPU instruction set is

compatible with the H8/300 CPU.

The H8/3937 Series and H8/3937R Series include, a FLEX™ decoder*, five kinds of timers, a 2-

channel serial communication interface, and an A/D converter, as on-chip peripheral functions

necessary for system configuration. The configuration of these series makes them ideal for use as

embedded microcomputers in pagers using the FLEX™ decoder system.

The H8/3937 Series supports non-roaming, while the H8/3937R Series supports roaming.

This manual describes the hardware of the H8/3937 Series and H8/3937R Series. For details on

H8/3937 Series and 3937R Series instruction set, refer to the H8/300L Series Programming

Manual.

Note: * FLEX is a trademark of Motorola Inc.

Contents

Section 1 Overview........................................................................................................... 1

1.1 Overview............................................................................................................................ 1

1.2 Internal Block Diagram ..................................................................................................... 5

1.3 Pin Arrangement and Functions........................................................................................ 6

1.3.1 Pin Arrangement .................................................................................................. 6

1.3.2 Pin Functions........................................................................................................ 7

Section 2 CPU..................................................................................................................... 13

2.1 Overview............................................................................................................................ 13

2.1.1 Features ................................................................................................................ 13

2.1.2 Address Space ...................................................................................................... 14

2.1.3 Register Configuration ......................................................................................... 14

2.2 Register Descriptions......................................................................................................... 15

2.2.1 General Registers.................................................................................................. 15

2.2.2 Control Registers.................................................................................................. 15

2.2.3 Initial Register Values.......................................................................................... 16

2.3 Data Formats...................................................................................................................... 17

2.3.1 Data Formats in General Registers....................................................................... 18

2.3.2 Memory Data Formats.......................................................................................... 19

2.4 Addressing Modes ............................................................................................................. 20

2.4.1 Addressing Modes................................................................................................ 20

2.4.2 Effective Address Calculation.............................................................................. 22

2.5 Instruction Set.................................................................................................................... 26

2.5.1 Data Transfer Instructions.................................................................................... 28

2.5.2 Arithmetic Operations.......................................................................................... 30

2.5.3 Logic Operations.................................................................................................. 31

2.5.4 Shift Operations.................................................................................................... 31

2.5.5 Bit Manipulations................................................................................................. 33

2.5.6 Branching Instructions.......................................................................................... 37

2.5.7 System Control Instructions................................................................................. 39

2.5.8 Block Data Transfer Instruction........................................................................... 40

2.6 Basic Operational Timing.................................................................................................. 42

2.6.1 Access to On-Chip Memory (RAM, ROM)......................................................... 42

2.6.2 Access to On-Chip Peripheral Modules............................................................... 43

2.7 CPU States......................................................................................................................... 45

2.7.1 Overview.............................................................................................................. 45

2.7.2 Program Execution State...................................................................................... 46

2.7.3 Program Halt State ............................................................................................... 46

2.7.4 Exception-Handling State .................................................................................... 46

2.8 Memory Map ..................................................................................................................... 47

2.9 Application Notes.............................................................................................................. 50

2.9.1 Notes on Data Access........................................................................................... 50

2.9.2 Notes on Bit Manipulation ................................................................................... 52

2.9.3 Notes on Use of the EEPMOV Instruction .......................................................... 58

Section 3 Exception Handling........................................................................................ 59

3.1 Overview............................................................................................................................ 59

3.2 Reset .................................................................................................................................. 59

3.2.1 Overview.............................................................................................................. 59

3.2.2 Reset Sequence..................................................................................................... 59

3.2.3 Interrupt Immediately after Reset ........................................................................ 60

3.3 Interrupts............................................................................................................................ 61

3.3.1 Overview.............................................................................................................. 61

3.3.2 Interrupt Control Registers................................................................................... 63

3.3.3 External Interrupts................................................................................................ 72

3.3.4 Internal Interrupts................................................................................................. 73

3.3.5 Interrupt Operations.............................................................................................. 74

3.3.6 Interrupt Response Time...................................................................................... 79

3.4 Application Notes.............................................................................................................. 80

3.4.1 Notes on Stack Area Use...................................................................................... 80

3.4.2 Notes on Rewriting Port Mode Registers............................................................. 81

3.4.3 Notes on Interrupt Request Flag Clearing Methods............................................. 83

Section 4 Clock Pulse Generators................................................................................. 85

4.1 Overview............................................................................................................................ 85

4.1.1 Block Diagram...................................................................................................... 85

4.1.2 System Clock and Subclock................................................................................. 85

4.2 System Clock Generator.................................................................................................... 86

4.3 Subclock Generator ........................................................................................................... 89

4.4 Prescalers........................................................................................................................... 91

4.5 Note on Oscillators............................................................................................................ 92

4.5.1 Definition of Oscillation Settling Standby Time.................................................. 92

4.5.2 Notes on Use of Crystal Oscillator Element

(Excluding Ceramic Oscillator Element) ............................................................. 94

Section 5 Power-Down Modes...................................................................................... 95

5.1 Overview............................................................................................................................ 95

5.1.1 System Control Registers..................................................................................... 98

5.2 Sleep Mode........................................................................................................................ 103

5.2.1 Transition to Sleep Mode ..................................................................................... 103

5.2.2 Clearing Sleep Mode............................................................................................ 103

5.2.3 Clock Frequency in Sleep (Medium-Speed) Mode.............................................. 104

iii

5.3 Standby Mode.................................................................................................................... 105

5.3.1 Transition to Standby Mode................................................................................. 105

5.3.2 Clearing Standby Mode........................................................................................ 105

5.3.3 Oscillator Settling Time after Standby Mode is Cleared...................................... 105

5.3.4 Standby Mode Transition and Pin States.............................................................. 106

5.3.5 Notes on External Input Signal Changes before/after Standby Mode.................. 107

5.4 Watch Mode ...................................................................................................................... 109

5.4.1 Transition to Watch Mode.................................................................................... 109

5.4.2 Clearing Watch Mode .......................................................................................... 109

5.4.3 Oscillator Settling Time after Watch Mode is Cleared........................................ 109

5.4.4 Notes on External Input Signal Changes before/after Watch Mode.................... 109

5.5 Subsleep Mode .................................................................................................................. 110

5.5.1 Transition to Subsleep Mode................................................................................ 110

5.5.2 Clearing Subsleep Mode ...................................................................................... 110

5.6 Subactive Mode ................................................................................................................. 111

5.6.1 Transition to Subactive Mode .............................................................................. 111

5.6.2 Clearing Subactive Mode..................................................................................... 111

5.6.3 Operating Frequency in Subactive Mode............................................................. 111

5.7 Active (Medium-Speed) Mode.......................................................................................... 112

5.7.1 Transition to Active (Medium-Speed) Mode....................................................... 112

5.7.2 Clearing Active (Medium-Speed) Mode.............................................................. 112

5.7.3 Operating Frequency in Active (Medium-Speed) Mode...................................... 112

5.8 Direct Transfer................................................................................................................... 113

5.8.1 Overview of Direct Transfer ................................................................................ 113

5.8.2 Direct Transition Times........................................................................................ 114

5.8.3 Notes on External Input Signal Changes before/after Direct Transition.............. 116

5.9 Module Standby Mode ...................................................................................................... 117

5.9.1 Setting Module Standby Mode............................................................................. 117

5.9.2 Clearing Module Standby Mode .......................................................................... 117

Section 6 ROM................................................................................................................... 119

6.1 Overview............................................................................................................................ 119

6.1.1 Block Diagram...................................................................................................... 119

6.2 PROM Mode...................................................................................................................... 120

6.2.1 Setting to PROM Mode........................................................................................ 120

6.2.2 Socket Adapter Pin Arrangement and Memory Map........................................... 120

6.3 Programming ..................................................................................................................... 123

6.3.1 Writing and Verifying.......................................................................................... 123

6.3.2 Programming Precautions .................................................................................... 128

6.4 Reliability of Programmed Data........................................................................................ 129

Section 7 RAM................................................................................................................... 131

7.1 Overview............................................................................................................................ 131

7.1.1 Block Diagram...................................................................................................... 131

Section 8 I/O Ports ............................................................................................................ 133

8.1 Overview............................................................................................................................ 133

8.2 Port 1.................................................................................................................................. 135

8.2.1 Overview.............................................................................................................. 135

8.2.2 Register Configuration and Description............................................................... 135

8.2.3 Pin Functions........................................................................................................ 140

8.2.4 Pin States.............................................................................................................. 142

8.2.5 MOS Input Pull-Up.............................................................................................. 142

8.3 Port 2 [Chip Internal I/O Port]........................................................................................... 143

8.3.1 Overview.............................................................................................................. 143

8.3.2 Register Configuration and Description............................................................... 143

8.3.3 Function................................................................................................................ 147

8.3.4 States .................................................................................................................... 147

8.4 Port 3.................................................................................................................................. 148

8.4.1 Overview.............................................................................................................. 148

8.4.2 Register Configuration and Description............................................................... 148

8.4.3 Pin Functions........................................................................................................ 151

8.4.4 Pin States.............................................................................................................. 153

8.4.5 MOS Input Pull-Up.............................................................................................. 153

8.5 Port 4*................................................................................................................................ 154

8.5.1 Overview.............................................................................................................. 154

8.5.2 Register Configuration and Description............................................................... 154

8.5.3 Pin Functions........................................................................................................ 156

8.5.4 Pin States.............................................................................................................. 157

8.6 Port 5.................................................................................................................................. 158

8.6.1 Overview.............................................................................................................. 158

8.6.2 Register Configuration and Description............................................................... 158

8.6.3 Pin Functions........................................................................................................ 160

8.6.4 Pin States.............................................................................................................. 161

8.6.5 MOS Input Pull-Up.............................................................................................. 161

8.7 Port 6.................................................................................................................................. 162

8.7.1 Overview.............................................................................................................. 162

8.7.2 Register Configuration and Description............................................................... 162

8.7.3 Pin Functions........................................................................................................ 164

8.7.4 Pin States.............................................................................................................. 164

8.7.5 MOS Input Pull-Up.............................................................................................. 164

8.8 Port 7.................................................................................................................................. 165

8.8.1 Overview.............................................................................................................. 165

8.8.2 Register Configuration and Description............................................................... 165

8.8.3 Pin Functions........................................................................................................ 167

8.8.4 Pin States.............................................................................................................. 167

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