Texas Instruments INA-DUAL-2AMP-EVM Manual de usuario

User’s Guide

INA-DUAL-2AMP-EVM

ABSTRACT

This user’s guide describes the characteristics, operation, and use of the INA-DUAL-2AMP-EVM, an evaluation

module (EVM) that is compatible with a variety of instrumentation amplifiers (INAs). This EVM is compatible with

the SOIC-16 (D) and SOIC-16 (DW) INA packages, and is designed to evaluate the performance of the devices

in both single-supply and dual-supply configurations. This document includes the schematic, printed circuit board

(PCB) layouts, and BOM. Throughout this document the terms evaluation board, evaluation module, and EVM

are synonymous with the INA-DUAL-2AMP-EVM.

Table of Contents

1 Overview..................................................................................................................................................................................3

1.1 Features............................................................................................................................................................................. 3

1.2 INA Pinout.......................................................................................................................................................................... 3

1.3 Compatible Devices........................................................................................................................................................... 3

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INA-DUAL-2AMP-EVM 1

2 Quick Start...............................................................................................................................................................................4

2.1 Dual-Supply Configuration................................................................................................................................................. 4

2.2 Single-Supply Configuration...............................................................................................................................................5

3 EVM Components................................................................................................................................................................... 8

3.1 Power................................................................................................................................................................................. 8

3.2 Inputs................................................................................................................................................................................. 8

3.3 Output................................................................................................................................................................................ 8

3.4 Reference...........................................................................................................................................................................9

3.5 Miscellaneous.................................................................................................................................................................... 9

4 Schematic, PCB Layout, and Bill of Materials................................................................................................................... 10

4.1 Schematic........................................................................................................................................................................ 10

4.2 PCB Layout...................................................................................................................................................................... 11

4.3 Bill of Materials.................................................................................................................................................................12

List of Figures

Figure 1-1. INA-DUAL-2AMP-EVM Pinout.................................................................................................................................. 3

Figure 2-1. Dual-Supply Configuration........................................................................................................................................ 4

Figure 2-2. Single-Supply Configuration, Direct Reference Connection......................................................................................5

Figure 2-3. Single-Supply Configuration, Buffered Reference Connection..................................................................................6

Figure 4-1. INA-DUAL-2AMP-EVM Schematic..........................................................................................................................10

Figure 4-2. INA-DUAL-2AMP-EVM PCB....................................................................................................................................11

List of Tables

Table 1-1. Compatible Devices.................................................................................................................................................... 3

Table 4-1. INA-DUAL-2AMP-EVM Bill of Materials....................................................................................................................12

Trademarks

X2Y® is a registered trademark of X2Y Attenuators, LLC.

All trademarks are the property of their respective owners.

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1 Overview

1.1 Features

This EVM is intended to provide basic functional evaluation of the instrumentation amplifiers shown in Table 1-1

with the pinout shown in Figure 1-1. The EVM provides the following features:

• Easy access to nodes with surface-mount test points

• Reference voltage source flexibility

• Convenient input and output filtering

1.2 INA Pinout

The INA-DUAL-2AMP-EVM evaluates INAs that have the pinout shown in Figure 1-1.

VINA-

VINA+

RGA

RefA

VOA

SenseA

V-

VINB-

VINB+

RGB

RefB

VOB

SenseB

V+

Figure 1-1. INA-DUAL-2AMP-EVM Pinout

1.3 Compatible Devices

Devices that are compatible with the INA-DUAL-2AMP-EVM are shown in Table 1-1.

Table 1-1. Compatible Devices

Device Package

INA2126 SOIC (D)

INA2128 SOIC (DW)

INA2141 SOIC (DW)

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INA-DUAL-2AMP-EVM 3

2 Quick Start

2.1 Dual-Supply Configuration

Figure 2-1 shows an example of how to set up the EVM for dual-supply operation. These steps can be applied to

channel A or channel B of the dual INA.

TP14

TP17 R17



R12



R13

GND GND

R19

C21

C18

C16 R11

V+

R10

V-

V+

R21

R22

V-

GND

C15

V+

0.1µF



R14



GND

R16 C20

TP15

R15 VINA-

VINA+

RGA

RefA

VOA

SenseA

V-

VINB-

VINB+

RGB

RefB

VOB

SenseB

V+

GND

C22

V-

0.1µF

R32

GND

GNDGND

R38 C32

C30

C27R31

V+

R30

V-

V+

R39

R40

V-

R35

R37

R33

R34



GND GND

R36

C31

TP21

GND GND

C19

R28

C29

TP20

TP22





R5 R25



VOBVOA

VINA-

VINA+

VINB-

VINB+



GND

V-

V+

TP1

10µF

1µF

10µF

1µF

TP11

GND

OAV-

OAV+

TP2

10µF

1µF

10µF

1µF

TP12

J1 J2

Instrumentation Amplifier

Power Supply

Operational Amplifier Power

Supply

TP8 TP9 TP23TP24

TP4 TP5 TP6 TP7

Figure 2-1. Dual-Supply Configuration

1. +VS to test point TP1

2. –VS to test point TP11

3. Install jumper shunt to position 1 and 2 on J1

4. Differential input signal connect to test points VinA– (TP14) and VinA+ (TP17) of channel A

a. Differential input signal connect to test points VinB– (TP20) and VinB+ (TP22) of channel B

5. Observe output at test point VOA (TP15)

a. Observe output at test point VOB (TP21)

Note

C15 and C22 are prepopulated with 0.1-µF power-supply decoupling capacitors. See the respective

device data sheet for additional power-supply decoupling information.

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2.2 Single-Supply Configuration

2.2.1 Direct Reference Connection

Figure 2-2 shows an example of how to set up the EVM for single-supply operation with a direct voltage

connection to the reference pin.

TP14

TP17 R17



R12



R13

GND GND

R19

C21

C18

C16 R11

V+

R10

V-

V+

R21

R22

V-

GND

C15

V+

0.1µF



R14



GND

R16 C20

TP15

R15

VINA-

VINA+

RGA

RefA

VOA

SenseA

V-

VINB-

VINB+

RGB

RefB

VOB

SenseB

V+

GND

C22

V-

0.1µF

R32

GND

GNDGND

R38 C32

C30

C27R31

V+

R30

V-

V+

R39

R40

V-

R35

R37

R33

R34



GND GND

R36

C31

TP21

C19

R28

C29

TP20

TP22





VOBVOA

VINA-

VINA+

VINB-

VINB+

–

TP10 TP18

REFA

GND

REFB

GND

VREFB

VREFA

GND

V-

V+

TP1

10µF

1µF

10µF

1µF

TP11

GND

OAV-

OAV+

TP2

10µF

1µF

10µF

1µF

TP12

J1 J2

Instrumentation Amplifier

Power Supply

Operational Amplifier Power

Supply

TP8 TP9 TP23TP24

TP4 TP5 TP6 TP7

Figure 2-2. Single-Supply Configuration, Direct Reference Connection

1. +VS to test point TP1

2. GND to test point TP11

3. Install jumper shunt to positions 2 and 3 on J1

4. Remove resistor R5 for REFA

a. Remove resistor R25 for REFB

5. Reference voltage to test point REFA (TP10)

a. Reference voltage to test point REFB (TP18)

6. Differential input signal connect to test points VinA– (TP14) and VinA+ (TP17) of channel A

a. Differential input signal connect to test points VinB– (TP20) and VinB+ (TP22) of channel B

7. Observe output at test point VOA (TP15)

a. Observe output at test point VOB (TP21)

Note

C15 and C22 are prepopulated with 0.1-µF power-supply decoupling capacitors. C22 is not required

to be removed for proper single-supply operation. See the respective device data sheet for additional

power-supply decoupling information.

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2.2.2 Buffered-Reference Voltage Connection

A buffered-reference configuration is useful when the source impedance is high (for example, a voltage

divider). Buffering a high-impedance source with an operational amplifier provides a low-impedance source and

preserves common-mode rejection. Figure 2-3 shows an example of how to set up the EVM for single-supply

operation with a buffered-reference voltage connection. Depending on the application, desirable single-supply

buffer operational amplifiers include the OPA2330 and OPA2376. The OPA2202 is a good choice for high-

voltage applications.

OUTA

INA-

INA+

VS- INB+

INB-

OUTB

VS+1

4 5

TP14

TP17 R17



R12



R13

GND GND

R19

C21

C18

C16 R11

V+

R10

V-

V+

R21

R22

V-

GND

C15

V+

0.1µF



GND GND

R29

R26

R14



GND

R16 C20

TP15

TP3

GND

C14

OAV-

0.1µF

TP13

GND

C12

GND

C13

R15

VINA-

VINA+

RGA

RefA

VOA

SenseA

V-

VINB-

VINB+

RGB

RefB

VOB

SenseB

V+

GND

C22

V-

0.1µF

R32

GND

GNDGND

R38 C32

C30

C27R31

V+

R30

V-

V+

R39

R40

V-

R35

R37

R33

R34



GND GND

R36

C31

TP21

C10

OAV+

0.1µF

GND

TP19

TP16

GND

C11

GND GND

C19

R28

C29

TP20

TP22





R5 R25

C24

C17

R9 R27

R23

C25C26

R20

C28

R18

C23

R24

TP10 TP18

VOBVOA

VINA-

VINA+

VINB-

VINB+

REFA REFB

















GND

V-

V+

TP1

10µF

1µF

10µF

1µF

TP11

GND

OAV-

OAV+

TP2

10µF

1µF

10µF

1µF

TP12

J1 J2

Instrumentation Amplifier

Power Supply

Operational Amplifier Power

Supply

TP8 TP9 TP23TP24

TP4 TP5 TP6 TP7

GND

OAVinA-

OAVinA+

OAVinB-

OAVinB+

Figure 2-3. Single-Supply Configuration, Buffered Reference Connection

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1. +VS to test point TP1

2. GND to test points TP11 AND TP12

3. OAV+ to test point TP2

4. Install jumper shunt on positions 2 and 3 on J1 and J2

5. Remove resistor R5 for REFA

a. Remove resistor R25 for REFB

6. Populate R1, R4, R6, and R7 with a 0-Ω resistor for channel A

a. Populate R18, R24, R26, and R27 with a 0-Ω resistor for channel B

7. Reference voltage to test point OAVinA+ (TP13)

a. Reference voltage to test point OAVinB+ (TP19)

8. Differential input signal connect to test points VinA– (TP14) and VinA+ (TP17) of channel A

a. Differential input signal connect to test points VinB– (TP20) and VinB+ (TP22) of channel B

9. Observe output at test point VOA (TP15)

a. Observe output at test point VOB (TP21)

Note

C15 and C22 are prepopulated with 0.1-µF power-supply decoupling capacitors. C22 is not required

to be removed for proper single-supply operation. See the respective device data sheet for additional

power-supply decoupling information.

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3 EVM Components

3.1 Power

Power is applied to the INA with test points TP1 and TP11. For the unpopulated operation amplifier used for the

reference voltage circuitry (U1), power is applied using test points TP2 and TP12.

3.2 Inputs

Inputs are applied to the INA using test points TP14 and TP17 for channel A, and TP20 and TP22 for channel

B. The inputs for the op amp are applied through test points TP3 and TP13 for REFA, and TP16 and TP19

for REFB. To maintain linear operation, the INA must remain within the common mode voltage range with

respect to the power supplies and differential inputs. A useful tool to calculate whether the INA is operating

within safe limits can be found in the TI’s Analog Engineer’s Calculator. Click the + symbol next to Amplifier and

Comparators and then click on INA VCM v VOUT.

3.2.1 Input Filtering

Components R12, R17, and C16, C18, C21 provide the ability to apply common-mode and differential-mode

filtering to the inputs. The cutoff frequencies for the filters are shown in Equation 1 and Equation 2. Make C18

approximately ten times larger than C16 and C21. These calculations presume R12 = R17 and C16 = C21. The

correlating resistors and capacitors provide input filtering for channel B.

Common-mode cutoff frequency:

(1)

Differential-mode cutoff frequency:

(2)

3.3 Output

Access the output of the device, with test point TP15 for channel A, and TP21 for channel B.

3.3.1 Output Filtering

Components R14 and C20 provide the ability to apply a single-pole RC output filter. The cutoff frequency of the

output filter is calculated as shown in Equation 3. The correlating resistor and capacitor provide output filtering

for channel B.

(3)

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3.4 Reference

There are multiple methods of applying a reference voltage to the device. A straightforward approach is to apply

a voltage to test point TP10 (TP18) with U1 and R5 (R25) not populated. If a buffered voltage is desired, U1

can be populated with an operational amplifier in an appropriate SOIC-8 (D) package and pinout. If the reference

voltage is GND, R5 (R25) is populated with a 0-Ω resistor.

Reference voltage circuitry on the board provides numerous options for biasing the corresponding reference

pins. The EVM layout allows for many configurations to bias the reference pin, such as:

•Sallen-Key 2nd-order filter

• Buffer configuration

• Inverting and noninverting gain configurations

• 1st-order filtering at the noninverting input and feedback path

•RISO + dual feedback stability compensation scheme

3.5 Miscellaneous

C1, C2, C6, and C7 are the populated bypass capacitors for the device, U2 and U3.

Similarly, C3, C4, C8 and C9 are populated to provide supply bypassing for U1.

C19 and C29 can be used with an X2Y® capacitor.

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INA-DUAL-2AMP-EVM 9

4 Schematic, PCB Layout, and Bill of Materials

4.1 Schematic

The schematic for the PCB for the INA-DUAL-2AMP-EVM is shown in Figure 4-1.

OUTA

INA-

INA+

VS- INB+

INB-

OUTB

VS+

4 5

TP14

TP17 R17



R12



R13

GND GND

R19

C21

C18

C16 R11

V+

R10

V-

V+

R21

R22

V-

GND

C15

V+

0.1µF



GND GND

R29

R26

R14



GND

R16 C20

TP15

TP3

GND

C14

OAV-

0.1µF

TP13

GND

C12

GND

C13

R15

VINA-

VINA+

RGA

RefA

VOA

SenseA

V-

VINB-

VINB+

RGB

RefB

VOB

SenseB

V+

GND

C22

V-

0.1µF

R32

GND

GNDGND

R38 C32

C30

C27R31

V+

R30

V-

V+

R39

R40

V-

R35

R37

R33

R34



GND GND

R36

C31

TP21

C10

OAV+

0.1µF

GND

TP19

TP16

GND

C11

GND GND

C19

R28

C29

TP20

TP22





R5 R25

C24

C17

R9 R27

R23

C25C26

R20

C28

R18

C23

R24





TP10 TP18

VOBVOA

VINA-

VINA+

VINB-

VINB+

REFA REFB

GND

V-

V+

TP1

10µF

1µF

10µF

1µF

TP11

GND

OAV-

OAV+

TP2

10µF

1µF

10µF

1µF

TP12

J1 J2

Instrumentation Amplifier

Power Supply

Operational Amplifier Power

Supply

TP8 TP9 TP23TP24

TP4 TP5 TP6 TP7

GND

OAVinA-

OAVinA+

OAVinB-

OAVinB+

Figure 4-1. INA-DUAL-2AMP-EVM Schematic

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