Intersil ISL73847SEHEV2Z Manual de usuario

Evaluation Board Manual

R34UZ0010EU0100 Rev.1.00 Page 1

The ISL73847SEHEV2Z evaluation board

benchmarks the performance of the ISL73847SEH

dual-phase buck controller. The evaluation board is

optimized for a 4.5V to 15V input operation to

generate a 50A max, 1V output. Input and output

connections, test points, and jumper settings on the

board provide customers an easy-to-use evaluation

platform for point-of-load power applications.

Specifications

▪Buck Power Supply input (PVIN): 4.5V to 15V

▪Controller Analog Supply input (VDD): 4.5V to 19V

▪Preset output voltage: 1V

▪Preset Switching Frequency: 500kHz

▪Maximum dual-phase output current: 50A

▪Maximum single-phase output current: 25A

▪Preset droop regulation

Features

▪Power-Good LED indicator

▪On-board transient load current generator

▪Integrated LDO (VCC)

▪External Clock Synchronization (SYNCI & SYNCO)

▪Droop regulation set by a single resistor

Figure 1. ISL73847SEHEV2Z Block Diagram

Half Bridge

Driver

ISL73041SEH

VFB+

VFB-

COMP

FLT

PWM1

SLP

ISEN1+

ISEN1-

ISEN2+

ISEN2-

GND

SYNC-I

SYNC-O

PWM2

IMON

DROOP

VREF

VDD

Half Bridge

Driver

ISL73041SEH

VDD

FLT

PVIN

VOUT

100kΩ

FPGA

LOAD

SLOPE

GEN

CSA1

VCC

UVLO

LDO

VDD

CSA2

OSC

600mV

PWM

3.6mS

20µA/50mV

DROOP

VREF

VFB+

VCC

CurrentFeedback

RemoteVoltageFeedback

680Ω

604Ω

22µF

0.1µF

100nF

22µF

1µF

638µF

0.22µH

30.1Ω

2mΩ

0.22µH 2mΩ

680pF

30.1Ω

10kΩ

94.2kΩ

4.22kΩ

330pF

8.2nF

22nF

56nF

PVIN

5.28mF

3.24kΩ

4.99kΩ

100pF

34.8kΩ22µF

ISL73847SEHEV2Z

R34UZ0010EU0100 Rev.1.00 Page 2

Nov 21, 2022

ISL73847SEHEV2Z Evaluation Board Manual

Contents

1. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Quick-Start Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Changing the Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.4 External Clock Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.5 Clock Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.6 Soft-Start Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.7 Droop Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.8 IMON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.9 Enabling/Disabling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.10 Using the On-Board Load Transient Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2. Board Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.3 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3. Typical Performance Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

R34UZ0010EU0100 Rev.1.00 Page 3

Nov 21, 2022

ISL73847SEHEV2Z Evaluation Board Manual

1. Functional Description

1.1 Operating Range

The ISL73847SEHEV2Z evaluation board requires two supply rails to operate properly. One for the ISL73847SEH

controller analog supply input (VDD) and one for the on-board buck power supply input (PVIN). The VDD rail

accepts an input voltage range of 4.5V to 19V. The PVIN should be set from 4.5V to 15V. The buck regulator

circuit is preset for a 1V output voltage and a switching frequency of 500kHz with a 0.22µH output inductor and

2.64mF output capacitance per phase with the option of being synchronized to an external clock using SYNCI.

1.2 Quick-Start Guide

See Table 1 to get an overview of all the default jumper settings and their different configurations.

1. Ensure JP1, JP4, and JP5 is connected to position 2-3.

2. Ensure JP2 and JP3 is removed.

3. Ensure JP6 is connected.

4. Apply a 4.5V to 15V voltage to PVIN metal banana plug connectors as shown in Figure 2.

5. Apply a 4.5V to 19V voltage to the VDD banana connectors as shown in Figure 2.

6. If required, a resistor or electronic load can be connected to the VOUT metal banana plug connectors as shown

in Figure 2. If using an electronic load, you can add 4w sense lines on the TP29 test jumper.

Figure 2. ISL73847SEHEV2Z Board Setup

PVIN

Supply

VDD

Supply

Electronic

Load

External

SYNC-I

Input

Transient Generator

Pulse Input

Used for remote sense

or monitoring VOUT.

R34UZ0010EU0100 Rev.1.00 Page 4

Nov 21, 2022

ISL73847SEHEV2Z Evaluation Board Manual

1.3 Changing the Switching Frequency

The ISL73847SEHEV2Z is configured for a 500kHz switching frequency by a JP1 connecting a 94.2kΩpull-down

resistor (R2) on the FS pin. The evaluation board includes a 0.22µH inductor and an array of output bypass

capacitors for a 2.64mF output capacitance per phase, which makes up the LC filter. If you need to select a

different switching frequency, see Figure 3 for selecting the appropriate R2value on FS. An alternate on-board

configuration is to connect JP1 to position 1-2, which ties FS to VCC. This setting defaults the switching frequency

to 500kHz. For more information on the FS pin, refer to the ISL73847SEH datasheet.

Table 1. Default Jumper Settings and Alternate Configurations

Jumper Function/Description Default Configuration Alternate Configuration

JP1 Sets the frequency of the

ISL73847SEH Controller

Jumper in 2-3 position connects a

94.2kΩpull-down from FS to GND,

which sets the oscillator frequency to

1MHz.

Jumper in 1-2 position ties FS to

VCC, which sets the oscillator

frequency to 1MHz.

JP2

Powers the ISL70040SEH FET driver,

which is part of the load transient

generator circuit

Remove Jumper to disconnect VDD and

disable the FET driver.

Populate Jumper to connect VDD

to enable the FET driver.

JP3 Sets the output of the SYNCO pin

Populate Jumper and connect a 100kΩ

pull-down from SYNC-O to GND (R4),

and remove the SYNC-O to VCC pull-up

(R59). This outputs the internal oscillator

or SYNC-l external oscillator.

Populate Jumper and remove the

100kΩpull-down from SYNC-O to

GND (R4), and populate the

SYNC-O to VCC pull-up (R59) with

a 100kΩ. This outputs 1/2 of the

frequency of the internal oscillator

or SYNC-l external oscillator.

JP4 Disables the phase 1 output of the

buck regulator

Jumper in 2-3 position ties PWM of the

ISL73041SEH FET Driver (U2) to PWM1

of the ISL73847SEH controller, which

enables phase 1 output of the buck

regulator.

Jumper in 1-2 position ties PWM of

the ISL73041SEH FET Driver (U2)

to VCC, which disables phase 1

output of the buck regulator.

JP5 Disables the phase 2 output of the

buck regulator

Jumper in 2-3 position ties PWM of the

ISL73041SEH FET Driver (U3) to PWM2

of the ISL73847SEH controller, which

enables phase 2 output of the buck

regulator.

Jumper in 1-2 position ties PWM of

the ISL73041SEH FET Driver (U3)

to VCC, which disables phase 2

output of the buck regulator.

JP6 Disables or enables LED lights driven

by PG

Populate jumper to enable LED PG

indication.

Remove Jumper to disable LED

PG indication.

Figure 3. RFS vs Frequency

100

150

200

250

0 500 1000 1500 2000 2500 3000

3500

FS Resistor (kΩ)

Oscillator Frequency (kHz)

R34UZ0010EU0100 Rev.1.00 Page 5

Nov 21, 2022

ISL73847SEHEV2Z Evaluation Board Manual

1.4 External Clock Synchronization

If you need to synchronize the buck switching frequency to an external clock, a SMA female connector (BNC1) is

available on the board. TP3 can be used to monitor the external clock signal on SYNC-I. For the external oscillator

to be used in place of the internal oscillator, the external oscillator frequency needs to be 15% greater than the

internal oscillator frequency. For more information on the external clock synchronization, refer to the

ISL73847SEH datasheet.

1.5 Clock Output

The SYNC-O pin is configured to output the internal oscillator frequency (1MHz) through a jumper (JP2)

connecting a 100kΩpull-down (R4) to GND. The SYNC-O pin can be monitored using the TP26 test jumper.

Note: If you are using an external clock signal on the SYNC-I pin, that external clock is output on SYNC-O in place

of the internal clock if the external oscillator frequency is 15% greater than the internal oscillator frequency. If you

need to output half of the internal or external oscillator frequency, move the 100kΩresistor from R4to R59. For

more information on SYNC-O, refer to the ISL73847SEH datasheet.

1.6 Soft-Start Adjustment

The ISL73847SEHEV2Z is configured for a 2ms soft-start time by a 22nF bypass capacitor (C2) connected to the

SS pin. The SS time can be adjusted from 2ms to 200ms by changing the C2capacitor. If you need to select a

different soft-start time use Equation 1 below which shows how to calculate the capacitance given the desired

soft-start time. For more information on SS, refer to the ISL73847SEH datasheet.

where:

▪CSS is the soft-start capacitance in Farads

▪tSS is the required soft-start time in seconds

▪VREF is the reference voltage, which is nominally 0.6V

1.7 Droop Regulation

The ISL73847SEHEV2Z is configured to minimize peak-to-peak transient response excursions by using a 604Ω

resistor (R1) connected between VREF and DROOP pin. If droop regulation is not needed, replace the 604Ωwith

a 0Ωresistor to short VREF and DROOP pin together. For more information on the droop regulation, refer to the

ISL73847SEH datasheet.

1.8 IMON

The ISL73847SEHEV2Z is configured to monitor the average current though the inductor as a voltage on the

IMON pin. A 10kΩpull-down resistor (R10) is connected to this pin. TP29 test jumper is provided to monitor the

IMON pin voltage. If required, a bypass capacitor (C9) can be added in parallel to R10 to improve the averaging.

For more information on the IMON pin, refer to the ISL73847SEH datasheet.

1.9 Enabling/Disabling

The ISL73847SEHEV2Z is configured to automatically enable when VDD reaches a certain voltage on power-up

by 4.99kΩresistor (R6) connected between EN and VDD. To disable the part in this default configuration, apply 0V

or ground to the TP8 test point. To disable automatic enabling on power-up and to control EN by an external

supply, remove R6and connect another external supply to TP8. For more information on the enabling and

disabling the controller, refer to the ISL73847SEH datasheet.

(EQ. 1)

CSS

tSS 15–

10

VREF

----------------------------------=

R34UZ0010EU0100 Rev.1.00 Page 6

Nov 21, 2022

ISL73847SEHEV2Z Evaluation Board Manual

1.10 Using the On-Board Load Transient Generator

An on-board load transient generator is made available to evaluate the buck-regulator output. The circuit is shown

in Figure 8. The circuit comprises an NMOS FET load switch driven by a Renesas ISL70040SEH Rad-Hard, GAN

FET driver requiring 0-5V logic signals. Logic HIGH drives the load ON and logic LOW turns the load OFF. The

load current is preset by six parallel 220mΩresistors on each output phase (25A) for a total load current of 50A.

Complete the following steps to properly set-up and operate the load transient generator.

1. Connect an external pulse generator to the on-board SMA connector (BNC2).

2. To monitor the pulse generator signal, use the TP37 test jumper.

3. Connect jumper to JP2 to connect VDD to power the FET driver.

4. Monitor the output voltage using TP29.

2. Board Design

Figure 4. ISL73847SEHEV2Z Evaluation Board (Top)

Figure 5. ISL73847SEHEV2Z Evaluation Board (Bottom)

R34UZ0010EU0100 Rev.1.00 Page 7

Nov 21, 2022

ISL73847SEHEV2Z Evaluation Board Manual

2.1 Schematic Diagrams

Figure 6. ISL73847SEHEV2Z Schematic (Page 1)

UPDATED BY:

TITLE:

DATE:

REV.MASK#

FILENAME

TESTER

DATE:

HRDWR

SHEET

DRAW N

BY:

RELEASED BY:

ENGINEER:

01/11/2022

EVALUATION BOARD

ISL73847SEH

SCHEMATIC

TIM KLEMANN

THEJU BERNARD

TO INPUT CAPS

FROM INPUT CAPS

TO OUTPUT CAPS

ISEN1-

TO OUTPUT CAPS

ISEN2-

OUT

R22

TP15

1 2

JP3

1 2

R70

4.99K

R19

10K

TP11

1 2

BA1

Default

571-0500

R50

C13

1UF

R62

30.1

C16

1UF

TP13

TP3

R54

C69

0.01UF

TP8

TP18

C10

1UF

R69

3.24K

TP21

TP5

TP24

1 2

EP2

EP1

AVCC

RDL

RDU

FLTB

PWM

BOOT

UGH

UGL

PHS

LGH

LGL

EP4

EP3

PGND

PVCC

VDD

ISL73041SEHVL

EP2

EP1 EP4

EP3

OPEN

R49

C12

1UF

0.1UF

TP17

1 2

TP36

22UF

R53

R18

3.65K

TP26

1 2

0.056UF

TP20

R61

100K

EP2

EP1

AVCC

RDL

RDU

FLTB

PWM

BOOT

UGH

UGL

PHS

LGH

LGL

EP4

EP3

PGND

PVCC

VDD

ISL73041SEHVL

EP2

EP1 EP4

EP3

R48

R16 2.1K

R59

DNP

R56

0.002

TP25

1 2

TP35

4.99K

SUB

ISL70020SEHML

R17

3.65K

SUB

ISL70020SEHML

C32

1UF

TP2

R24

R15 2.1K

2N7002-7-F

R55

0.002

TP34

ISL73847SEHVF

VDD

SYNC-I

SYNC-O

VCC

COMP

VREF

DROOP

VFB-

VFB+

PWM2

ISEN2+

ISEN2-

IMON

FLT

SLOPE

GND

ISEN1-

ISEN1+

PWM1

SUB

R47

C86

100PF

680

0.22UH

1 2

TP1

R23

R14

2.1K

C61

680PF

TP33

TP4

604

SUB

ISL70020SEHML

C68

0.01UF

4.99K

R52

TP22

1 2

C17

1UF

R10

10K

R28 0

R13

2.1K

TP7

C60

680PF

TP32

4.22K

SUB

ISL70020SEHML

R26

10K

TP9

8200PF

SUB

ISL70020SEHML

JP5

1 2 3

R51

TP6

C15

0.1UF

TP12

0.1UF

R27 0

R11

34.8K

100K

TP23

1 2

R25

10K

TP10

BNC1

JP4

1 2 3

94.2K

R30

RED

GRN

PG_LED1

0.22UH

1 2

TP16

1 2

330PF

SUB

R21

C11

1UF

R33

680

R60

100K

JP6

1 2

TP19

1 2

R20

10K

R12

4.99K

BA2

571-0100

Default

R29

1UF

R63

30.1

C14

0.1UF

TP14

0.022UF

SUB

ISL70020SEHML

JP1

AVCC1

AVCC2

BOOT1

BOOT2

COMP

DROOP

FLTB

GND

IMON

ISEN1+

ISEN2+

PHS1

PHS2

PVIN

PWM1

PWM2

SLOPE

SYNC-O

UGATE1

UGATE2

UNNAMED_1_ISL70020SEH_I355_4

UNNAMED_1_ISL70020SEH_I 357_4

UNNAMED_1_ISL70020SEH_I429_4

UNNAMED_1_ISL70020SEH_I 430_4

UNNAMED_1_ISL70020SEH_I 431_4

UNNAMED_1_ISL70020SEH_I 432_4

UNNAMED_1_ISL73041SEH_I199_1

UNNAMED_1_ISL73041SEH_I 199_11

UNNAMED_1_ISL73041SEH_I 199_12

UNNAMED_1_ISL73041SEH_I 199_14

UNNAMED_1_ISL73041SEH_I 199_15

UNNAMED_1_ ISL7 3041 SEH_I1 99_2

UNNAMED_1_ISL73041SEH_I199_4

UNNAMED_1_ISL73041SEH_I199_5

UNNAMED_1_ISL73041SEH_I 199_8 UNNAMED_1_I SL73041SEH_I199_9

UNNAMED_1_ISL73041SEH_I277_1

UNNAMED_1_ISL73041SEH_I 277_11

UNNAMED_1_ISL73041SEH_I 277_12

UNNAMED_1_ISL73041SEH_I 277_14

UNNAMED_1_ ISL73041SEH_I277_15

UNNAMED_1_ISL73041SEH_I 277_2

UNNAMED_1_ISL73041SEH_I277_4

UNNAMED_1_ISL73041SEH_I277_5

UNNAMED_1_ISL73041SEH_I 277_8 UNNAMED_1_I SL73041SEH_I277_9

UNNAMED_1_ISL73847SEH_I16_2

UNNAMED_1_JU MPER2_I453_IN1

UNNAMED_1_JU MPER2_I463_IN2

UNNAMED_1_JUMPER3_I378_IN3

UNNAMED_1_NCHANNEL_I347_D

UNNAMED_1_POWERI ND_I212_B

UNNAMED_1_POWERI ND_I253_B

UNNAMED_1_SMCAP_I 22_A

UNNAMED_1_SMRES_I342_A

UNNAMED_1_SMRES_I345_A

UNNAMED_1_SMRES_I346_A

VCC

VDD

VFB+

VFB-

VOUT

VREF

R34UZ0010EU0100 Rev.1.00 Page 8

Nov 21, 2022

ISL73847SEHEV2Z Evaluation Board Manual

Figure 7. ISL73847SEHEV2Z Schematic (Page 2)

FROM OUTPUT

1V 50A

12V - 15V

TO TRANSIENT LOAD BANK1

TO TRANSIENT LOAD BANK2

TO INPUT

OUT

C47

220UF

C46

100UF

C49

220UF

C48

100UF

C51

220UF

C50

100UF

C53

220UF

C52

100UF

C55

220UF

C28

4.7UF

C54

100UF

C26

4.7UF

C57

220UF

C56

100UF

C59

220UF

C36

4.7UF

C58

100UF

C30

4.7UF

C63

220UF

C75

4.7UF

C62

100UF

C18

1000PF

TP31

C74

4.7UF

C64

220UF

C19

1000PF

C65

220UF

C20

1000PF

C66

220UF

C76

4.7UF

C67

220UF

C77

4.7UF

TP27

C21

1000PF

TP28

C22

0.01UF

C70

220UF

C80

4.7UF

C71

220UF

C81

4.7UF

TO PIN 2

TIE PIN 1

MUST

TERM2

B2C-PCB

C23

0.01UF

TO PIN 2

TIE PIN 1

MUST

TERM1

B2C-PCB

C24

0.01UF

C73

220UF

C82

4.7UF

C72

220UF

C83

4.7UF

C25

0.01UF

TP29

C84

4.7UF

C85

4.7UF

TO PIN 2

TIE PIN 1

MUST

TERM4

B2C-PCB

C27

220UF

TO PIN 2

TIE PIN 1

MUST

TERM3

B2C-PCB

C29

220UF

C78

4.7UF

C31

220UF

C37

220UF

C79

4.7UF

C39

220UF

C38

100UF

C41

220UF

C40

100UF

C43

220UF

C42

100UF

C45

220UF

C44

100UF

PVIN

VOUT

R34UZ0010EU0100 Rev.1.00 Page 9

Nov 21, 2022

ISL73847SEHEV2Z Evaluation Board Manual

Figure 8. ISL73847SEHEV2Z Schematic (Page 3)

TRANSIENT TEST CIRCUIT

FROM CAPACITORS BANK 1

FROM CAPACITORS BANK 2

BNC2

JP2

1 2

C33

10UF

C34

0.1UF

R31

DNP

TP37

VDRV

OUTL

VSS

INB

VDD

OUTHIN

VSSP

ISL70040SEHVL

4 5

C35

10UF

R58

R57

R34

R32

SUB

ISL70020SEHML

SUB

ISL70020SEHML

R36

0.22

R35

0.22

R38

0.22

R37

0.22

R40

0.22

R39

0.22

R42

0.22

R41

0.22

R44

0.22

R43

0.22

R46

0.22

R45

0.22

TP38

TP30

C88

0.1UF

C87

0.1UF

U5_DRAIN

U6_DRAIN

UNNAMED_4_ISL70020SEH_I17_4

UNNAMED_4_ISL70020SEH_I32_4

UNNAMED_4_ISL70040SEH_I18_PIN1

UNNAMED_4_ISL70040SEH_I18_PIN2

UNNAMED_4_ISL70040SEH_I18_PIN6

UNNAMED_4_ISL70040SEH_I18_PIN7

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R34UZ0010EU0100 Rev.1.00 Page 10

Nov 21, 2022

ISL73847SEHEV2Z Evaluation Board Manual

2.2 Bill of Materials

Qty Reference Designator Description Manufacturer Manufacturer Part

PWB-PCB,

ISL73847SEHEV2Z, REVB,

ROHS

Imagineering Inc ISL73847SEHEV2ZREVBPCB

2C87,C88

CAP-BOARDFLEX, SMD,

0603, 0.1µF, 25V, 10%,

X7R, ROHS

Kemet C0603X104K3RACTU

1C6

CAP, SMD, 0603, 0.056µF,

50V, 10%, X7R, ROHS Kemet C0603X563K5RAC7867

3 C8, C10, C11 CAP, SMD, 0805, 1.0µF,

25V, 10%, X7R, ROHS TDK C2012X7R1E105K

C26, C28, C30, C36, C74,

C75, C76, C77, C78, C79,

C80, C81, C82, C83, C84,

C85

CAP, SMD, 1206, 4.7µF,

25V, 10%, X7R, ROHS TDK C3216X7R1E475K

1C5

CAP, SMD, 1210, 22µF,

25V, 10%, X7R, ROHS Murata GRM32ER71E226KE15L

1C86

CAP, SMD, 0603, 100pF,

25V, 10%, X7R, ROHS Kemet C0603C101K3RAC7867

4 C18-C21 CAP, SMD, 0603, 1000pF,

16V, 10%, X7R, ROHS Venkel C0603X7R160102KNE

4 C22-C25 CAP, SMD, 0603, 0.01µF,

16V, 10%, X7R, ROHS Venkel C0603X7R160-103KNE

2C68,C69

CAP, SMD, 0603, 0.01µF,

25V, 10%, X7R, ROHS Venkel C0603X7R250-103KNE

4 C4, C14, C15, C34 CAP, SMD, 0603, 0.1µF,

25V, 10%, X7R, ROHS Yageo CC0603KRX7R8BB104

1C7

CAP, SMD, 0603, 0.1µF,

50V, 10%, X7R, ROHS AVX 06035C104KAT2A

1C2

CAP, SMD, 0603, 0.022µF,

16V, 10%, X7R, ROHS Venkel C0603X7R160-223K

1C3

CAP, SMD, 0603, 330pF,

50V, 5%, NP0, ROHS Panasonic ECJ-1VC1H331J

2C60,C61

CAP, SMD, 0603, 680pF,

50V, 10%, X7R, ROHS Murata GRM188R71H681KA01D

0C9

CAP, SMD, 0603, DNP-

PLACE HOLDER, ROHS

5 C12, C13, C16, C17, C32 CAP, SMD, 0805, 1.0µF,

25V, 10%, X5R, ROHS AVX 08053D105KAT4A

2C33,C35

CAP, SMD, 1206, 10µF,

25V, 10%, X7R, ROHS Venkel C1206X7R250-106KNE

C38, C40, C42, C44, C46,

C48, C50, C52, C54, C56,

C58, C62

CAP-TANT, SMD,

7.3x4.3mm, 100µF, 25V,

20%, 30mΩat 100MHz,

ROHS

Kemet T521X107M025ATE030

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