Intersil ISL32740EVAL1Z Manual de usuario

Rev 1.00 Aug 2017

User’s Manual

ISL32740EVAL1Z

User’s Manual: Evaluation Board

Industrial Precision

UG119 Rev.1.00 Page 2 of 10

Aug 24, 2017

UG119

Rev.1.00

Aug 24, 2017

ISL32740EVAL1Z

Evaluation Board

USER’S MANUAL

1. Overview

The ISL32740EVAL1Z board enables the evaluation of the ISL32740EIBZ isolated, half-duplex RS-485 transceiver in

a typical bus node application, used in isolated industrial networks.

1.1 Features

• Drive capability of up to 160x1/5UL-transceivers

• Isolated 3.3V to 5V DC/DC converter with regulated output

1.2 Specifications

This board has been configured and optimized for the following operating conditions:

• Up to 40Mbps data rate

•V

CC = 3.3V

1.3 Related Literature

• For a full list of related documents, visit our website

•ISL32740E product page

1.4 Ordering information

1.5 Block Diagram

Figure 1. Block Diagram

Part Number Description

ISL32740EVAL1Z ISL32740EIBZ evaluation board

LOGIC

I/O

RS-485

I/O

3.3V

SUPPLY

J5J2

ISL32740EIBZ

ISOLATED

RS-485

TRANSCEIVER

ISOLATED

DC-DC

CONVERTER

UG119 Rev.1.00 Page 3 of 10

Aug 24, 2017

ISL32740EVAL1Z 2. Functional Description

2. Functional Description

The ISL32740EIBZ is an isolated, 40Mbps, half-duplex RS-485 transceiver. The device incorporates a patented

refresh circuit to maintain the correct output state with respect to data input. At power-up, the bus outputs follow the

truth tables shown in Tables 1 and 2.

The DE input should be held low during power-up to prevent false drive data pulses on the bus. This is accomplished by

connecting DE using a 10kΩ pull-down resistor to GND1.

This transceiver uses a differential input receiver for maximum noise immunity and common-mode rejection. Input

sensitivity is ±200mV, as required by the RS-485 specification.

The receiver input resistance is 54kΩ minimum. The receiver includes a “fail-safe if open” function that ensures a

high-level receiver output if the receiver inputs are unconnected (floating). The receiver output is tri-statable through

the active low RE input.

The RS-485 driver is a differential output device that delivers at least 2.1V across a 54Ω purely differential load. The

driver features low propagation delay skew to maximize bit width and to minimize EMI.

The driver in the ISL32740E is tri-statable through the active high DE input. The outputs of the ISL32740E driver are

not slew rate limited, so faster output transition times allow data rates of at least 40Mbps.

Important Notice:

For convenience, an isolated DC/DC converter is used to provide the power supply across the isolation barrier. Its

isolation ratings however, are lower than those of the transceiver. Therefore, it must be ensured that the ground

potential difference between the left side (GND1, GND2) and the right side (GND3, GND4) of the board remain below

50VAC (see Figure 2.1 on page 4).

2.1 Truth Tables

Note: *Transceiver shutdown mode.

Table 1. Truth Table - Receiving

Receiving

Inputs Output

RE DE A-B RO

00 V

AB ≥ -0.05V 1

0 0 -0.05V > VAB > -0.2V Undetermined

00 V

AB ≤ -0.2V 0

0 0 Inputs Open/Shorted 1

1 1 X High-Z

10 X High-Z*

Table 2. Truth Table - Transmitting

Transmitting

Inputs Outputs

RE DE D ISODE B A

X11101

X10110

0 0 X 0 High-Z High-Z

1 0 X 0 High-Z* High-Z*

UG119 Rev.1.00 Page 4 of 10

Aug 24, 2017

ISL32740EVAL1Z 3. PCB Layout Guidelines

3. PCB Layout Guidelines

Both supplies, VDD1 and VDD2, must be bypassed with 100nF ceramic capacitors. These should be placed as close as

possible to the supply pins for proper operation.

3.1 ISL32740EVAL1Z Evaluation Board

Figure 2. Top Side

Figure 3. Bottom Side

UG119 Rev.1.00 Page 5 of 10

Aug 24, 2017

ISL32740EVAL1Z 3. PCB Layout Guidelines

3.2 ISL32704EVAL1Z Circuit Schematic

Figure 4. ISL32740EVAL1Z Schematic

UG119 Rev.1.00 Page 6 of 10

Aug 24, 2017

ISL32740EVAL1Z 3. PCB Layout Guidelines

3.3 Bill of Materials

Manufacturer Part Qty

Reference

Designator Description Manufacturer

ISL32740EVAL1ZREVAPCB 1 PWB-PCB, ISL32740EVAL1Z, REVA, ROHS Imagineering Inc

ISL32740EIBZ 1 U1 ISOLATED, 40Mbps, HALF-DUPLEX RS-485

TRANSCEIVER, ROHS

Intersil

R1Z-3.305/P 1 U2 ISOLATED 3.3V-TO-5V DC/DC CONVERTER WITH

REGULATED OUTPUT, ROHS

RECOM Power

CR0805-8W-1002FT

(Pb-FREE)

4 R1 - R3, R7 RES, SMD, 0805, 10k, 1/8W, 1%, TF, ROHS Venkel

RK73H2AT1330F 1 R5 RES, SMD, 0805, 133Ω, 1/8W, 1%, TF, ROHS KOA

RC0805FR-07549RL 2 R4, R6 RES, SMD, 0805, 549Ω, 1/8W, 1%, TF, ROHS Yageo

C0805X5R160-106KNE 2 C1, C3 CAP, SMD, 0805, 10µF, 16V, 10%, X5R, ROHS Venkel

ECJ-2VB1E104K 2 C2, C4 CAP, SMD, 0805, 0.1µF, 25V, 10%, X7R, ROHS Panasonic

1725656 1 J1 CONN-TERMINAL BLK, TH, 2P, 6A, 125V, 20-30AWG,

2.54mm, ROHS

Phoenix Contact

1725672 2 J2, J5 CONN-TERMINAL BLOCK, 4POS, 0.1, 26-20AWG,

63V, 6A, ROHS

Phoenix Contact

5001 4 GND1 - GND4 CONN-MINI TEST PT, VERTICAL, BLK, ROHS Keystone

5003 6 A, B, D, R, DE, RE# CONN-MINI TEST POINT, VERTICAL, ORG, ROHS Keystone

S-2261 1 Place assy in bag BAG, STATIC, 4x6, ZIPLOC, ROHS ULINE

LABEL-DATE CODE 1 Affix to back of PCB LABEL-DATE CODE_LINE 1: YRWK/REV#, LINE 2:

BOM NAME

Intersil

UG119 Rev.1.00 Page 7 of 10

Aug 24, 2017

ISL32740EVAL1Z 3. PCB Layout Guidelines

3.4 Board Layout

Figure 5. Silkscreen Top Figure 6. Top Layer

Figure 7. Silkscreen Bottom Figure 8. Bottom Layer

UG119 Rev.1.00 Page 8 of 10

Aug 24, 2017

ISL32740EVAL1Z 4. Performance Curves

4. Performance Curves

Figure 9. Transmit Mode (DR = 4Mbps) Figure 10. Receive Mode (DR = 4Mbps)

Figure 11. Transmit Mode (DR = 40Mbps) Figure 12. Receive Mode (DR = 40Mbps)

TIME: 80ns/DIV

SIGNAL: 2V/DIV

TIME: 80ns/DIV

SIGNAL: 2V/DIV

TIME: 10ns/DIV

SIGNAL: 2V/DIV

TIME: 10ns/DIV

SIGNAL: 2V/DIV

ISL32740EVAL1Z 5. Revision History

Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the

reader is cautioned to verify that the document is current before proceeding.

For information regarding Intersil Corporation and its products, see www.intersil.com

All trademarks and registered trademarks are the property of their respective owners.

UG119 Rev.1.00 Page 9 of 10

Aug 24, 2017

5. Revision History

Rev. Date Description

1.00 Aug 24, 2017 Updated Truth Tables on page 3.

0.00 Apr 3, 2017 Initial release

ISL32740EVAL1Z

UG119

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