AZZA PT-5IH Manual de usuario

PT-5IH

( VER. 1.x )

SYSTEM BOARD

OPERATION MANUAL

PT-5IH SYSTEM BOARD TABLE OF CONTENTS

TABLE OF CONTENTS

Chapter & Section Page

1. INTRODUCTION 1-1

1.1 SYSTEM OVERVIEW 1-1

1.2 FEATURES 1-1

2. SPECIFICATIONS 2-1

3. SYSTEM BOARD LAYOUT 3-1

3.1 5IH (VER. 1.x) 3-1

4. HARDWARE SETUP 4-1

4.1 UNPACKING 4-1

4.2 HARDWARE CONFIGURATION 4-1

4.2.1 DRAM INSTALLATION 4-1

4.2.2 L2 CACHE MEMORY INSTALLATION 4-3

4.2.3 CONNECTORS 4-4

4.2.4 JUMPERS 4-7

5. AWARD BIOS SETUP 5-1

5.1 GETTING STARDED 5-1

5.2 MAIN MENU 5-2

5.3 CONTROL KEYS 5-2

5.4 STANDARD CMOS SETUP 5-3

5.5 BIOS FEATURES SETUP 5-4

5.6 CHIPSET FEATURES SETUP 5-5

5.7 POWER MANAGEMENT SETUP 5-6

5.8 PNP/PCI CONFIGURATION 5-7

5.9 INTEGRATED PERIPHERALS 5-9

THE OTHER SETUPS 5-10

PT-5IH SYSTEM BOARD

TRADEMARKS

All trademarks used in this manual are the property of their respective owners.

NOTE

The "LOAD SETUP DEFAULTS" function loads the default settings directly from

BIOS default table, these default settings are the best-case values that should optimize

system performance. This function will be necessary when you accept this system

board, or the system CMOS data is corrupted.

By pressing "Enter" key, while "LOAD SETUP DEFAULTS" is highlighted, then

presses "Y" and "Enter" key. the SETUP default values will be loaded. (Please refer to

the Chapter 5 AWARD BIOS SETUP procedures in this maulal.)

NOTICE

Information presented in this manual has been carefully checked for reliability;

however, no responsibility is assumed for inaccuracies. The information contained in

this manual is subject to change without notice.

PT-5IH SYSTEM BOARD INTRODUCTION

1. INTRODUCTION

1.1 SYSTEM OVERVIEW

ThePT-5IHPentium PCI Local Bus system board is designed based on the Intel 82430HX PCIset system

chipset and Winbond (or SMC, UMC) I/O chipset, which built-in two channels PIO and Bus Master Enhanced

PCI IDE port, one Floppy Disk control port, two high speed Serial ports (UARTs) and one multimode Parallel

prot and also supports IR and USB ports. It is designed to fit a high performance, Pentium 75 MHz to 200 MHz

(ideally) based solution for high-end and true GREEN-PC computer systems.

This system board supports the Peripheral Component Interconnect (PCI) Local Bus standard (PCI Spec. Rev.

2.1 compliant). It not only breaks through the I/O bottlenecks of the traditional ISA main board, but also

provides the performance needs for networking and multi-user environments.

1.2 FEATURES

The PT-5IH system board contains the following features:

Pentium P54C/P54CT/P54CS/P55C, Cyrix 6x86 & AMD 5k86 based, PC/AT compatible

system board with ISA Bus and PCI Local Bus.

Supports the most part of "586" level CPUs designed by Intel, Cyrix and AMD.

Built-in 2 sets voltage regulator circuit to support multi-spec. CPU I/O voltage (includes

Standard, VR and VRE specification) and CPU CORE voltage (+2.5V DC and +2.8V DC).

DRAM Memory : Supports both fast page mode (FPM) and Extended Data Out (EDO).

Supports memory Parity or ECC (optional)

Cache Memory : Supports pipelined burst SRAMs. Cacheability main memory size up to

512MB.

BIOS : Supports Plug and Play BIOS.

IDE ports : Supports two channels PIO and Bus Master Enhanced PCI IDE port, up

to Mode 4 timing, and up to 22 MBytes/s transfer rates.

I/O ports : Supports two high speed serial ports (UARTs), One multimode parallel

port for standard (SPP), enhanced (EPP) and high speed (ECP) modes.

One Floppy Disk Control port.

IR Port (option) : Supports IR (Infrared Rays) functions. Both HPSIR and ASKIR are

supported.

USB Ports : Supports two Universal Serial Bus (USB) ports. (in the future)

Software : MS-DOS, WindowsNT, OS2, XENIX, UNIX, NOVELL, CAD/CAM,

compatibility Windows, Windows 95....etc.

1-1

PT-5IH SYSTEM BOARD SPECIFICATIONS

2. SPECIFICATIONS

CPU

Intel : Pentium processor and OverDrive processor (P54C/P54CS/P54CT/P55C/P55CT)

75/90/100/120/133/150/166 MHz and 180/200 MHz. (ideally)

Cyrix : 6x86-P120+(100MHz) / P133+(110MHz) / P150+(120MHz) / P166+(133MHz).

AMD : 5k86-P75(SSA/5-66)/ P75(SSA/5-75)/ P90(SSA/5-83)/ P90(SSA/5-90)/ P100(SSA/5-100)

CPU VCC

(1). CPU I/O voltage : Supports Standard, VR and VRE specification.

(2). CPU CORE voltage : Supports "egual to CPU I/O voltage", "+2.5V " and "+2.8V" DC

WORD SIZE

Data Path : 8-bit, 16-bit, 32-bit, 64-bit

PC System Chipset

Intel 82430HX PCIset (82439HX, 82371SB)

I/O Chipset

Winbond W83877F (or SMC FDC37C669 or UMC UM8669F).

System Clock

50/55/60/66.6 MHz adjustable.

Memory

DRAM : Two banks, each bank could be single or double sided, 8MB up to 256 MB.

Supports both fast page mode (FPM) and Extended Data Out (EDO) memory

(Using 72-pin SIMM module). 8 Qword deep merging DRAM write buffer.

Optional Parity or ECC (Error Checking and Correction).

SRAM : Two banks, 256/512KB Direct-Mapped wirte back cache memory, supports on-

board 256KB or 512KB pipelined burst SRAM. One SRAM Module Slot for

upgrading to 512KB. Cacheability main memory size up to 512 MB.

BIOS

AWARD or AMI System BIOS. 128KBx8, Flash ROM. (Plug & Play BIOS)

Expansion Slots

PCI Slots : 32-bit x 4 (All Master/Slave, PCI Spec. Rev. 2.1 Compliant)

ISA Slots : 16-bit x3

IDE Ports

Two channels PIO and Bus Master PCI IDE port, maximum could be connected 4 IDE Hard

Disk and ATAPI CD-ROM device.

2-1

PT-5IH SYSTEM BOARD SPECIFICATIONS

Super I/O Ports

1. Two high speed NS16C550 compatible serial prots (UARTs).

2. One parallel port, supports SPP/EPP/ECP mode.

3. One Floppy Disk Control port.

IR Port (option)

One HPSIR and ASKIR compatible IR transmission connector (5-pin).

Mouse and Keyboard

Supports PS/2 mouse connector, PS/2 keyboard connector (option) and AT keyboard connector.

USB Ports (in the future)

Two Universal Serial Bus (USB) ports.

DIMENSION

Width & Length : 220 mm x 270 mm.

Height : 3/4 inches with components mounted, but without expansion

boards and cables.

PCB Thickness : 4 layers, 0.05 inches normal.

Weight : 20.5 ounces.

ENVIRONMENT

Operating Temperature : 10*C to 40*C. (50*F to 104*F)

Required Airflow : 50 linear feet per minute across 80486 CPU.

Storage Temperature : - 40*C to 70*C. (- 40*F to 158*F)

Humidity : 0 to 90% noncondensing.

Altitude : 0 to 10,000 feet.

2-2

PT-5IH SYSTEM BOARD SYSTEM BOARD LAYOUT

3. SYSTEM BOARD LAYOUT

3.1 PT-5IH Ver. 1.x

Explanation : All connectors, jumpers and components which marks by a black point on the corner

means the pin-1 side of the connector, jumper and component.

K/B BIOS

Winbond

W83877F

PCI 1

PCI 2

PCI 3

SL2

CN1 POWER CON.

CN3

AT K/B

SIMM 1

SIMM 2

SIMM 3

SIMM 4

Intel

82371SB

Intel

82439HX

BAT 1

CPU

SYS. BIOS

CN12 IDE1

CN13 IDE2

CN8 FDC

CN4 LPT

COM B

CN7

PS/2

MS.

CN5

JP17

CN9

U4/U3 TAG 1

SPEAKER

KEYLOCK

HLTL

SSTS

SMC/UMC

669

PCI 4

SL1

SL3

JP16

JP11

JP12

RTC

MODULE

Socket 7

CN6

COM A

U7 U5

Pipeline

Burst

SRAM

32K/64K

Pipeline

Burst

SRAM

32K/64K

*32

U2/U1 TAG 0

CN11

PBSRAM MODULE

JP5

JP4

JP13

JP14

JP15

JP18

JP1

JP2

JP3

CN10

USB 2 USB 1

JP6

JP7

JP8

JP9

3-1

PT-5IH SYSTEM BOARD HARDWARE SETUP

4. HARDWARE SETUP

4.1 UNPACKING

The system board package should contain the following parts :

The PT-5IH system board.

OPERATION MANUAL.

Cable set for IDE and I/O device.

4.2 HARDWARE CONFIGURATION

Before the system board is ready to operate, the hardware must be configured to allow for various functions

within the system. To configure the PT-5IH system board is a simple task, only a few jumpers, connectors,

cables and sockets needs to be selected and installed. For the detailed locations of each component please refer

to the system board layout figure which appears in page 3-1.

4.2.1 DRAM INSTALLATION

The PT-5IH system board will support two banks main memory (bank0 and bank 1) on board, (using four 72-

Pin SIMM socket, SIMM 1 - 4), each bank could be single or double sided. With the use of 1MBx36(32)-S,

2MBx36(32)-D, 4MBx36(32)-S or 8MBx36(32)-D and 16MBx36(32)-S SIMM modules, 8MB up to 256 MB of

local memory can be attained. Both standard fast page mode (FPM) and Extended Data Out (EDO) memory are

supported, but they cannot be mixed within the same memory bank. The speed of FPM DRAMs must be used

70ns or faster than 70ns and the speed of EDO DRAMs must be used 60ns or faster than 60ns.

(Note : S = Single sided , D = Double sided)

There is no jumper needed for DRAM configuration, DRAMs' type and size will be detected by system BIOS

automatically.

In DRAM memory subsystem, ECC and Parity can be checked on the DRAM interface (selected by BIOS via

CMOS setup, please refer to Chapter 5). The defult status is parity selected. The DRAM SIMMs must be

populated with 72-bit wide memory (with parity bit) to implement ECC or Parity functions.

ECC is an optional data integrity feature provided by the system. This feature provides single-error correction,

double-error detection, and detection of all errors confined to single nibble for DRAM memory subsystem.

4-1

PT-5IH SYSTEM BOARD HARDWARE SETUP

The following table provides all possible DRAM memory combination.

Total Bank 0 Bank 1 Total Bank 0 Bank 1

Size SIMM1, SIMM2 SIMM3, SIMM4 Size SIMM1, SIMM2 SIMM3, SIMM4

8 MB 1MBx36(32)-S Empty 64 MB 8MBx36(32)-D Empty

16 MB 1MBx36(32)-S 1MBx36(32)-S 72 MB 8MBx36(32)-D 1MBx36(32)-S

24 MB 1MBx36(32)-S 2MBx36(32)-D 80 MB 8MBx36(32)-D 2MBx36(32)-D

40 MB 1MBx36(32)-S 4MBx36(32)-S 96 MB 8MBx36(32)-D 4MBx36(32)-S

72 MB 1MBx36(32)-S 8MBx36(32)-D 128 MB 8MBx36(32)-D 8MBx36(32)-D

136 MB 1MBx36(32)-S 16MBx36(32)-S 192 MB 8MBx36(32)-D 16MBx36(32)-S

16 MB 2MBx36(32)-D Empty 128 MB 16MBx36(32)-S Empty

24 MB 2MBx36(32)-D 1MBx36(32)-S 136 MB 16MBx36(32)-S 1MBx36(32)-S

32 MB 2MBx36(32)-D 2MBx36(32)-D 144 MB 16MBx36(32)-S 2MBx36(32)-D

48 MB 2MBx36(32)-D 4MBx36(32)-S 160 MB 16MBx36(32)-S 4MBx36(32)-S

80 MB 2MBx36(32)-D 8MBx36(32)-D 192 MB 16MBx36(32)-S 8MBx36(32)-D

144 MB 2MBx36(32)-D 16MBx36(32)-S 256 MB 16MBx36(32)-S 16MBx36(32)-S

32 MB 4MBx36(32)-S Empty

40 MB 4MBx36(32)-S 1MBx36(32)-S (Note : S = Single sided , D = Double sided)

48 MB 4MBx36(32)-S 2MBx36(32)-D

64 MB 4MBx36(32)-S 4MBx36(32)-S

96 MB 4MBx36(32)-S 8MBx36(32)-D

160 MB 4MBx36(32)-S 16MBx36(32)-S

4-2

PT-5IH SYSTEM BOARD HARDWARE SETUP

4.2.2 L2 CACHE MEMORY INSTALLATION

The PT-5IH system board will support one or two bank(s) direct-mapped second level cache and provides either

256KB or 512KB cache memory using synchronous pipeline-burst SRAMs. (Note that this system board does

not support asynchronous or burst SRAMs for the cache memory) Both Write Back and Write Through cache

update policy are supported.

If the on-board cache memory size is 256KB, a COAST (Cache-On-A-STick) module (256KB) will be use for

upgrade the cache memory size from 256KB to 512KB. There is no jumper needed for end-user while upgrade

cache memory size, just insert the COAST module into the SRAM module slot (CN11), then the cache memory

size will be detected by system BIOS automatically.

Note : The COAST modules design must comply with Intel COAST (Cache-On-A-STick)

module specification revision 2.0 or later.

The following table lists the detalied combination about cache memory installation.

Cache Data SRAMs Tag SRAMs COAST

Size U5 ,U7 U2 (or U1) U4 (or U3) SRAM module

(optional) (CN11)

256 KB 32KB x 32 8KB or 16KB or 32KB x 8 8KB or 16KB or 32KB x 8Empty

512 KB 32KB x 32 8KB or 16KB or 32KB x 8 8KB or 16KB or 32KB x 8256 KB

512 KB 64KB x 32 16KB or 32KB x 8 16KB or 32KB x 8Empty

This system board supports the memory space cacheability limit for the second level cache is 64MB of main

memory base, and also supports an optional extended memory space cacheability limit of 512MB, but for this

feature an additional Tag SRAM ( TAG1, U4 or U3) is needed. (Note that the specification of the additional

Tag SRAM must same as TAG 0 ). Insert a SRAM into TAG1, then execute the CMOS setup procedure change

the "L2 Cache Cacheable Size" item (in the CHIPSET FEATURE SETUP) from 64MB to 512 MB. (Please

refer to Chapter 5)

The following table shows the sizes and quantities of Tag SRAM needed to support different memory sizes of

cacheability.

Cache Size TAG Size Memory size of

TAG 0 (U2 or U1) TAG 1 (U4 or U3) Cacheability

256 KB 8KB or 16KB or 32KB x 8Empty 64 MB

256 KB 8KB or 16KB or 32KB x 8 8KB or 16KB or 32KB x 8512 MB

512 KB 16KB or 32KB x 8Empty 64 MB

512 KB 16KB or 32KB x 8 16KB or 32KB x 8 512 MB

4-3

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