Xilinx KCU105 Manual de usuario

KCU105 Board

User Guide

UG917 (v1.4) September 25, 2015

KCU105 Board User Guide www.xilinx.com 2

UG917 (v1.4) September 25, 2015

Revision History

The following table shows the revision history for this document.

Date Version Revision

09/25/2015 1.4 Updated FMC HPC Connector J22. Revised Figure 1-23. Updated the binary format for

I2C EEPROM in Table 1 -19. Updated the clocks constraints file listing in Appendix D,

Master Constraints File Listing.

06/27/2015 1.3 Updated connectivity information for Quad 226, Quad 227, and Quad 228 in GTH

Transceivers. Updated Figure 1-21 and Figure 1-36. Updated HDMI Video Output,

including updating Figure 1-22 and Table 1- 18.

05/20/2015 1.2.1 Made typographical edits.

05/07/2015 1.2 Updated Tabl e 1-17, Ta b l e 1-21, and Figure 1-22.

04/07/2015 1.1 Changed the Si5328C clock multiplier/jitter attenuator to Si5328B throughout,

including updating the frequency range. Added impedance and insertion loss

information to GTH SMA Clock Input, GTH TX and RX SMA Differential Pairs, PCI

Express Endpoint Connectivity, SFP/SFP+ Module Connectors, FMC HPC Connector

J22, and FMC LPC Connector J2. Updated Figure 1-2, Figure 1-8, Figure 1-9,

Figure 1-22, Figure 1-23, Figure 1-29, Figure 1-34, Figure 1-36, Figure A-1,

Figure C-1, and Figure C-2. Changed IIC to I2C throughout. Updated Table 1-4 and

Table 1-25. Added Table 1- 26, Maxim Power Tool GUI Regulator Settings. Updated

information for J11, J47, and J49 in Table A-2. Updated callout number in KCU105

Board Zynq-7000 AP SoC XC7Z010 System Controller. Added instructions for

accessing the system controller main menu in Appendix C, System Controller.

Updated Clock Menu section. Updated the KCU105 Board Constraints File Listing in

Appendix D. Updated the KCU105 evaluation kit master answer record number.

12/18/2014 1.0 Initial Xilinx release.

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UG917 (v1.4) September 25, 2015

Table of Contents

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Chapter 1: KCU105 Evaluation Board Features

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

KCU105 Evaluation Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

Board Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

Feature Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Kintex UltraScale XCKU040-2FFVA1156E Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

DDR4 Component Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

Dual Quad-SPI Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Micro-SD Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

USB JTAG Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

FMC Connector JTAG Bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

GTH Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

PCI Express Endpoint Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

SFP/SFP+ Module Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45

10/100/1000 Mb/s Tri-Speed Ethernet PHY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47

Ethernet PHY Status LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49

Dual USB-to-UART Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50

HDMI Video Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52

I2C Bus, Topology, and Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55

Status and User LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57

User I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58

Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66

FPGA Mezzanine Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68

KCU105 Board Power System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77

FMC VADJ_1V8 Power Rail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79

Monitoring Voltage and Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80

SYSMON Power System Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80

Cooling Fan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86

KCU105 Board Zynq-7000 AP SoC XC7Z010 System Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86

Appendix A: Default Switch and Jumper Settings

Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Appendix B: VITA 57.1 FMC Connector Pinouts

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

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UG917 (v1.4) September 25, 2015

Appendix C: System Controller

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

Power-On and Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

KCU105 On-board Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

Clock Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96

PMBus Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

PMBus Menu Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101

SYSMON Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

SYSMON Menu Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .104

FMC Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

FMC Menu Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107

GPIO Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

GPIO Menu Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .114

EEPROM Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

EEPROM Menu Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115

CONFIG Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

CONFIG Menu Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116

UltraScale FPGA User Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

Appendix D: Master Constraints File Listing

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

KCU105 Board Constraints File Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

Appendix E: Board Setup

Installing the KCU105 Board in a PC Chassis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

Appendix F: Board Specifications

Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137

Environmental . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137

Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137

Humidity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137

Operating Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137

Appendix G: Regulatory and Compliance Information

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Declaration of Conformity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Electromagnetic Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139

Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139

Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

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Appendix H: Additional Resources and Legal Notices

Xilinx Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

Solution Centers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

Please Read: Important Legal Notices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142

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UG917 (v1.4) September 25, 2015

Chapter 1

KCU105 Evaluation Board Features

Overview

The KCU105 evaluation board for the Xilinx®Kintex®UltraScale™FPGA provides a hardware

environment for developing and evaluating designs targeting the UltraScale

XCKU040-2FFVA1156E device. The KCU105 evaluation board provides features common to

many evaluation systems, including a DDR4 component memory, a high definition

multimedia interface (HDMI™), two small form-factor pluggable (SFP+) connectors, an

eight-lane PCI Express®interface, an Ethernet PHY, general purpose I/O, and two UART

interfaces. Other features can be added by using VITA-57 FPGA mezzanine cards (FMCs)

attached to the low pin count (LPC) FMC and high pin count (HPC) FMC connectors.

KCU105 Evaluation Board Features

The KCU105 evaluation board features are listed here. Detailed information for each feature

is provided in Feature Descriptions.

• Kintex UltraScale XCKU040-2FFVA1156E device

•Zynq

®AP SoC XC7Z010 based system controller

• 2 GB DDR4 component memory (four [256 Mb x 16] devices)

• Dual 256 Mb Quad serial peripheral interface flash memory (Dual Quad SPI)

• Micro secure digital (SD) connector

• USB JTAG interface via Digilent module with micro-B USB connector

• Clock sources:

°Si5335A quad fixed frequency clock generator (300 MHz, 125 MHz, 90 MHz,

33.333 MHz)

°Si5328B clock multiplier and jitter attenuator (8 kHz - 808 MHz)

°Si570 I2C programmable LVDS clock generator (10 MHz - 810 MHz)

°Subminiature version A (SMA) connectors (differential)

• 20 GTH transceivers (five Quads)

°FMC HPC connector (eight GTH transceivers)

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UG917 (v1.4) September 25, 2015

Chapter 1: KCU105 Evaluation Board Features

°FMC LPC connector (one GTH transceiver)

°8-Lane PCI Express (eight GTH transceivers)

°Two SFP+ connectors (two GTH transceivers)

°TX and RX pair SMA connectors (one GTH transceiver)

• PCI Express endpoint connectivity

°Gen1 8-lane (x8)

°Gen2 8-lane (x8)

°Gen3 8-lane (x8)

• Two SFP+ connectors

• Ethernet PHY SGMII interface with RJ-45 connector

• Dual USB-to-UART bridge with micro-B USB connector

• HDMI codec with HDMI connector

•I2Cbus

•StatusLEDs

•UserI/O

•Program_Bpushbutton

•PmodHeaders

• VITA 57.1 FMC HPC connector J22

• VITA 57.1 FMC LPC connector J2

• Power on/off slide switch SW1

• Power management with PMBus voltage monitoring through Maxim power controllers

and GUI, current monitoring via the FPGA SYSMON block

• Single 10-bit 0.2 MSPS SYSMON analog-to-digital converter

• Configuration options:

°Dual Quad-SPI flash memory

°USB JTAG configuration port (Digilent module)

°Platform cable header J3 JTAG configuration port

°System controller micro-SD card

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UG917 (v1.4) September 25, 2015

Chapter 1: KCU105 Evaluation Board Features

Board Diagram

The KCU105 board diagram is shown in Figure 1-1

X-Ref Target - Figu re 1-1

Figure 1-1: KCU105 Evaluation Board Block Diagram

-7$*0RGXOH

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DQG

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DQG

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DQG

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8*BB

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UG917 (v1.4) September 25, 2015

Chapter 1: KCU105 Evaluation Board Features

Feature Descriptions

Figure 1-2 shows the KCU105 board. Each numbered feature that is referenced in Figure 1-2

is described in Table 1 -1 with a link to detailed information provided under Feature

Descriptions.

IMPORTANT: Figure 1-2 is for visual reference only and might not reflect the current revision of the

board.

CAUTION! The KCU105 board can be damaged by electrostatic discharge (ESD). Follow standard ESD

prevention measures when handling the board.

X-Ref Target - Figu re 1-2

Figure 1-2: KCU105 Evaluation Board Components

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KCU105 Board User Guide www.xilinx.com 10

UG917 (v1.4) September 25, 2015

Chapter 1: KCU105 Evaluation Board Features

Table 1-1: KCU105 Board Component Descriptions

Callout Component Description Notes

Schematic(1)

0381556

Page Number

Kintex UltraScale XCKU040-2FFVA1156E Device XCKU040-2FFVA1156E

With fan-sink on top of the FPGA soldered on

the board

Radian FB95+K52B+T710

2DDR4 Component Memory,

DDR4 Memory 2GB (4x512M U60-U63)

Micron MT40A256M16HA-083E 17-20

3Dual Quad-SPI Flash Memory,

Dual Quad-SPI Flash (2x256Mb) (U35-U36)

Micron N25Q256A11ESF40F

U35 on top, U36 on bottom of board 39

4Micro-SD Card Interface,

Micro SD Card Interface Connector (J83)

Molex 5025700893 33

5USB JTAG Interface,

w/Micro-B Connector

Digilent USB JTAG Module 16

6Clock Generation,

SYSCLK and other clocks, 1.8V LVDS (U122)

Si5335A-B02436-GM, 4 outputs:

300MHz, 125MHz, 90MHz, 33.33MHz 34

Programmable User Clock Source,

I2C Prog. User Clock 3.3V LVDS (U32) with 1-to-2

LVDS buffer (U104)

Silicon Labs Si570BAB0000544DG

(default 156.250MHz) with Si53340

buffer

8Jitter Attenuated Clock,

Jitter Attenuated Clock (U57)

Silicon Labs Si5328B-C-GM 37

9User SMA Clock Input,

User Differential SMA Clock P/N (J34/J35)

Rosenberger 32K10K-400L5 36

10 GTH SMA Clock Input,

SMA_MGT_REFCLK_P/N (J33/J32)

Rosenberger 32K10K-400L5 36

11 User SMA GPIO,

User SMA GPIO Connectors P/N (J36/J37)

Rosenberger 32K10K-400L5 36

12 GTH TX and RX SMA Differential Pairs,

User SMA TX and RX_P/N (J31/J30, J29/J28)

Rosenberger 32K10K-400L5 36

13 GTH Transceivers Embedded within FPGA U1 10

14 PCI Express Endpoint Connectivity,

PCI Express Connector (P1)

8-lane card edge connector 26

15 SFP/SFP+ Module Connectors,

SFP/SFP+ Module Connector SFP0(P5)

Molex 74441-0010 27

16 SFP/SFP+ Module Connectors,

SFP/SFP+ Module Connector SFP1 (P4)

Molex 74441-0010 28

17 10/100/1000 Mb/s Tri-Speed Ethernet PHY,

SGMII Mode Only (U58,P3)

Marvell M88E1111-BAB1C000 with

Halo HFJ11-1G01E-L12RL RJ45 38

18 Ethernet PHY Status LEDs,

LEDs are integrated into P3 bezel

Halo HFJ11-1G01E-L12RL RJ45

integrated Status LEDs (Rev B) 38

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Otros manuales para KCU105

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Gigabyte GA-9IVDT Manual de usuario

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IBT Technologies MB860 Manual de usuario

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