Texas Instruments LMG1205HBEVM Manual de usuario

Using the LMG1205HBEVM

User's Guide

Literature Number: SNVU552

March 2017

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Table of Contents

Contents

Preface ........................................................................................................................................ 4

1 Description.......................................................................................................................... 6

1.1 EVM Features ............................................................................................................ 6

1.2 Typical Applications...................................................................................................... 7

2 EVM Kit Contents................................................................................................................. 7

3 Electrical Performance Specifications .................................................................................... 7

4 EVM Schematic.................................................................................................................... 8

5 Test Setup........................................................................................................................... 9

5.1 Test Equipment........................................................................................................... 9

5.2 List of Test Points....................................................................................................... 10

5.3 List of Terminals ........................................................................................................ 11

5.4 EVM Connections ...................................................................................................... 11

6 Test Procedure................................................................................................................... 12

6.1 Power-Up Procedure................................................................................................... 12

6.2 Shutdown Procedure................................................................................................... 13

7 Switching Waveforms ......................................................................................................... 13

8 EVM Assembly Drawing and PCB Layout.............................................................................. 15

9 List of Materials ................................................................................................................. 16

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SNVU552–March 2017

List of Figures

1 LMG1205HBEVM Schematic .............................................................................................. 8

2 LMG1205HBEVM Board Top View ....................................................................................... 9

3 LMG1205HBEVM Board Bottom View ................................................................................... 9

4 HI Test Point (TP8) ........................................................................................................ 10

5 LI Test Point (TP9)......................................................................................................... 10

6 HS Test Point (TP12)...................................................................................................... 10

7 HB Test Point (TP4) ....................................................................................................... 10

8 HO Test Point (TP3) ....................................................................................................... 10

9 LO Test Point (TP11)...................................................................................................... 10

10 LMG1205HBEVM Test Setup Connections ............................................................................ 11

11 Input and Output Waveforms Showing the Dead Time ............................................................... 13

12 Zoom in of the SW Node Running at 50% Duty Cycle................................................................ 14

13 48-V to 5-V Synchronous Buck Converter Operation Showing Inputs, SW Node, and VOUT ..................... 14

14 LMG1205HBEVM-10 Top Layer and Components.................................................................... 15

15 LMG1205HBEVM-10 Bottom Layer and Components ................................................................ 15

List of Tables

1 LMG1205HBEVM Electrical Performance Specifications .............................................................. 7

2 Test Point Functional Descriptions....................................................................................... 10

3 List of Terminals............................................................................................................ 11

4 LMG1205HBEVM List of Materials ...................................................................................... 16

WARNING

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Preface

SNVU552–March 2017

General TI High Voltage Evaluation User Safety Guidelines

Always follow TI’s setup and application instructions, including use of all interface components within their

recommended electrical rated voltage and power limits. Always use electrical safety precautions to help

ensure your personal safety and the safety of those working around you. Contact TI’s Product Information

Center http://support/ti./com for further information.

Save all warnings and instructions for future reference.

Failure to follow warnings and instructions may result in personal injury, property damage, or

death due to electrical shock and/or burn hazards.

The term TI HV EVM refers to an electronic device typically provided as an open-framed, unenclosed

printed-circuit board assembly. It is intended strictly for use in development laboratory environments,

solely for qualified professional users having training, expertise, and knowledge of electrical safety risks in

development and application of high-voltage electrical circuits. Any other use and/or application are strictly

prohibited by Texas Instruments. If you are not suitably qualified, you should immediately stop from further

use of the HV EVM.

•Work Area Safety:

– Maintain a clean and orderly work area.

– Qualified observer(s) must be present anytime circuits are energized.

– Effective barriers and signage must be present in the area where the TI HV EVM and its interface

electronics are energized, indicating operation of accessible high voltages may be present, for the

purpose of protecting inadvertent access.

– All interface circuits, power supplies, evaluation modules, instruments, meters, scopes and other

related apparatus used in a development environment exceeding 50 VRMS/75 VDC must be

electrically located within a protected Emergency Power Off (EPO) protected power strip.

– Use a stable and non-conductive work surface.

– Use adequately insulated clamps and wires to attach measurement probes and instruments. No

freehand testing whenever possible.

•Electrical Safety:

As a precautionary measure, it is always a good engineering practice to assume that the entire

EVM may have fully accessible and active high voltages.

– De-energize the TI HV EVM and all its inputs, outputs, and electrical loads before performing any

electrical or other diagnostic measurements. Confirm that TI HV EVM power has been safely de-

energized.

– With the EVM confirmed de-energized, proceed with required electrical circuit configurations, wiring,

measurement equipment hook-ups and other application needs, while still assuming the EVM circuit

and measuring instruments are electrically live.

– When EVM readiness is complete, energize the EVM as intended.

WARNING: While the EVM is energized, never touch the EVM or its electrical circuits as they

could be at high voltages capable of causing electrical shock hazard.

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SNVU552–March 2017

General TI High Voltage Evaluation User Safety Guidelines

•Personal Safety:

– Wear personal protective equipment, for example, latex gloves and/or safety glasses with side

shields or protect EVM in an adequate lucent plastic box with interlocks from accidental touch.

•Limitation for Safe Use:

– EVMs are not to be used as all or part of a production unit.

Safety and Precautions

The EVM is designed for professionals who have received the appropriate technical training, and is

designed to operate from an AC power supply or a high-voltage DC supply. Please read this user guide

and the safety-related documents that come with the EVM package before operating this EVM.

CAUTION

Do not leave the EVM powered when unattended.

WARNING

Hot surface! Contact may cause burns. Do not touch!

WARNING

Hot surface! Contact may cause burns. Do not touch!

WARNING

High Voltage! Electric shock is possible when connecting board to

live wire. Board should be handled with care by a professional.

For safety, use of isolated test equipment with overvoltage and

overcurrent protection is highly recommended.

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Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM

User's Guide

SNVU552–March 2017

Using the LMG1205HBEVM

GaN Half-Bridge Power Stage EVM

The LMG1205HBEVM is designed to evaluate the LMG1205 100-V half-bridge driver for enhancement-

mode GaN FETs. The main circuit in this EVM consists of two Gallium Nitride (GaN) FETs connected in a

half-bridge configuration, driven by an LMG1205.

This EVM guide describes correct operation and measurement of the EVM, as well as the EVM

construction and typical performance. Additionally, setup instructions, including power up, are described to

achieve DC-DC conversion at a certain regulation voltage. The EVM board is designed to accelerate the

evaluation of the LMG1205.

This board is not intended to be used as a standalone product, but rather is intended for use to evaluate

the switching performance of the LMG1205.

1 Description

The LMG1205HBEVM evaluation module is a small, easy-to-use power stage with an external PWM

signal. The board can be configured as a buck converter, boost converter, or other converter topology

using a half bridge.

Because this is an open-loop board with an external PWM signal, it is not intended for evaluation of

transient response. This EVM can be used to evaluate the performance of the LMG1205 in a hard-

switched converter to sample measurements such as efficiency, switching speed, and slew rate.

The EVM features an LMG1205 half-bridge driver coupled with two 100-V, 7-mΩGaN FETs in a half-

bridge configuration. The module can deliver up to 10 A of current if the application includes adequate

thermal management (monitor case temperature and ensure adequate airflow is present, if required). The

thermal management considerations include forced air, heat sink, and lower operating frequency to

minimize the power dissipation in the module.

1.1 EVM Features

LMG1205HBEVM features include:

• Input voltage operates up to 80 VDC

• Optimized PCB layout minimizes gate and power loop inductances to mitigate ringing effects

• Single-input, onboard for PWM signal with 8-ns dead time

• Configurable onboard dead-time adjustment by simple resistance change

• Onboard LDO for generating 5-V VCC supply from a poorly regulated supply between 5.5 V and 10 V

• Convenient test points for DC and switching signal evaluation

• Kelvin sense capability for efficiency measurements for input and output voltage

CAUTION

High-voltage levels may be present on the evaluation module whenever it is

energized. Proper precautions must be taken when working with the EVM.

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Description

SNVU552–March 2017

Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM

1.2 Typical Applications

The LMG1205 is suited for use in high frequency DC-DC converters. It is simple to use and requires few

external components. Typical applications include:

• High-speed, synchronous buck converters

• Class D amplifiers for audio

• 48-V point-of-load converters for industrial, computing, and telecom

2 EVM Kit Contents

The kit contains the following:

• Safety instructions

• LMG1205HBEVM PCB assembly

3 Electrical Performance Specifications

Table 1. LMG1205HBEVM Electrical Performance Specifications

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

VBUS Half-bridge input voltage Connected to drain of high-side FET 80 V

VOUT Half-bridge output voltage Connected through inductor L1 to SW 80 V

VIN Input voltage for 5-V VDD LDO 5.5 10 V

VPWM PWM input voltage 0 5 V

IOUT Half-bridge output current 10 A

POUT Half-bridge output power LMG1205 and GaN FETs TJ≤125ºC 160 W

fSW Switching frequency 0.1 1 5 MHz

EVM Schematic

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Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM

4 EVM Schematic

Figure 1 shows the schematic of the evaluation module.

Figure 1. LMG1205HBEVM Schematic

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Test Setup

SNVU552–March 2017

Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM

5 Test Setup

This section describes the EVM hardware and outlines the procedure to set it up for evaluation. Figure 2

and Figure 3 show the top and bottom views of the LMG1205HBEVM, respectively.

Figure 2. LMG1205HBEVM Board Top View Figure 3. LMG1205HBEVM Board Bottom View

WARNING

High voltages that may cause injury exist on this evaluation

module (EVM). Please ensure all safety procedures are followed

when working on this EVM. Never leave a powered EVM

unattended.

5.1 Test Equipment

•DC Voltage Source: capable of supplying the input of the EVM up to 80 V as desired. Capable of

supplying 10 A and supports current limiting

•DC Bias Source: capable of 5.5-V to 10-V output at up to 500 mA

•Oscilloscope: capable of at least 200-MHz operation ( ≥500 MHz preferred), using oscilloscope

probes with a spring-type ground connection

•DC Multimeter(s): Capable of 80-V measurement, suitable for determining operation and efficiency (if

desired)

•DC Load: Capable of 100-V operation at up to 10 A in constant current-mode operation

•Function Generator: single output for PWM operation, dual synchronous output for Independent mode

(requires EVM modification), capable of at least 0-V to 3-V signal (operating maximum digital input is 5

Test Setup

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5.2 List of Test Points

The test points for switching voltage signals on this EVM have been designed for use with oscilloscope

probes with the included spring-type ground connections (often called pigtails). Using the small pigtails

instead of the ground clips will minimize measurement error and produce a cleaner signal with the fast

switching GaN devices used on this EVM. Refer to Figure 4 through Figure 9 to see the intended probe

usage for each of the switching signals. The switching voltage data shown in this user guide has been

obtained using such a measurement method.

Table 2. Test Point Functional Descriptions

TEST POINT NAME DESCRIPTION

TP1 5V_VDD 5-V VDD onboard generated supply

TP2 GND GND

TP3 HO High-side GaN FET gate signal

TP4 HB High-side Floating Bias Supply

TP5 Vbus sense + High-sense connection for Vbus input voltage

TP6 Vbus sense – Low-sense connection for Vbus input voltage (PGND)

TP7 Vout sense + High-sense connection for Vout output voltage

TP8 HI High-side GaN FET control input signal

TP9 LI Low-side GaN FET control input signal

TP10 Vout sense – Low-sense connection for Vbus output voltage (PGND)

TP11 LO Low-side GaN FET gate signal

TP12 HS High-side GaN FET source signal (that is, SW node)

J5 Iout sense Output current sense through 5-mΩshunt resistor (1V:20A)

Figure 4. HI Test Point (TP8) Figure 5. LI Test Point (TP9) Figure 6. HS Test Point (TP12)

Figure 7. HB Test Point (TP4) Figure 8. HO Test Point (TP3) Figure 9. LO Test Point (TP11)

Tabla de contenidos

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