Texas Instruments UCC27332Q1EVM Manual de usuario
EVM User's Guide: UCC27332Q1EVM
UCC27332-Q1 Evaluation Module
Description
The UCC27332Q1EVM is designed to provide an
easy to use tool to evaluate the UCC27332-Q1
performance. The UCC27332-Q1 is a 20-V, single
channel low-side driver with 9-A peak source and
9-A peak sink current for driving Si/IGBTs and GaN
FETs. The UCC27332Q1EVM board can be used
to evaluate other pin-to-pin compatible parts in the
3x3mm MSOP package.
Get Started
1. Order the EVM on ti.com.
2. Review the user's guide.
3. Download the comprehensive reference design
files from the product folder.
4. See the latest data sheet (SLUSEW3).
Features
• EVM for the low-voltage features of the
UCC27332-Q1 gate driver.
• 4.5-V to 18-V VCC power supply range.
• 9-A source, 9-A sink current.
• -5V input voltage capability on IN input pin.
• TTL-compatible inputs.
• PCB layout optimized for bias supply bypassing
capacitors placement, gate-drive resistance
network selection.
• Evaluate capacitive load, external gate drive
resistor network.
• Available in 3 mm x 3 mm MSOP8 package.
• Test points allow probing all the key pins of the
UCC27332-Q1.
Applications
• Automotive DC-DC converters
•Automotive on-board charger
• Telecom DC-DC converters
• Power factor correction (PFC) circuits
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UCC27332-Q1 Evaluation Module 1
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1 Evaluation Module Overview
1.1 Introduction
The UCC27332Q1EVM is designed to primarily evaluate the UCC27332-Q1 performance. The
UCC27332Q1EVM board can be used to evaluate other pin-to-pin compatible parts in the 3x3mm MSOP
package.
This user's guide describes the characteristics, operation, and use of the UCC27332-Q1 Evaluation Module
(EVM). A complete schematic diagram, PCB layouts, and BOM are included in this document. This family of
devices provides high source and sink current drivers for driving Si MOSFETs and IGBTs.
1.2 Kit Contents
Quantity
1 UCC27332Q1EVM
1.3 Specification
For the full range of recommended operating specifications and design guidelines for driving loads, see the
UCC27332 20-V, 9-A single channel low-side driver data sheet (SLUSEW3).
1.4 Device Information
The UCC27332-Q1 is a 20-V, single channel low-side driver with 9-A peak source and 9-A peak sink current for
driving Si FET's, IGBTs and GaN FETs. The UCC27332-Q1 has low propagation delays and fast rise (13 ns)
and fall (9 ns) times driving a 10 nF load for reliable timing of the gate drive signals. The high drive strength can
effectively drive high Qg MOSFET loads in a variety of end equipment applications. The wide operating voltage
range of 4.5V to 18 V allows for driving power devices including GaN FET's, Si FET's and IGBT's.
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2.2 Hardware Description
The UCC27332Q1EVM is designed to primarily evaluate the UCC27332-Q1. The driver's performance can
be evaluated while driving capacitive loads and/or power devices with provisions for TO-220 footprints. The
UCC27332Q1EVM evaluation board has surface-mount test points allowing connection to IN, EN, VDD and
OUT pins to evaluate the UCC27332-Q1 in the 3x3 MSOP package. The EVM is set up to evaluate the
UCC27332-Q1 DGN in a non-inverting configuration to drive various capacitive and resistive loads with a default
configuration using a 1.8nF capacitive load.
The UCC27332-Q1 has low propagation delays and fast rise (13 ns) and fall (9 ns) times driving a 10 nF load
for reliable timing of the gate drive signals. For detailed device information, see the UCC27332 20-V, 9-A single
channel low-side driver data sheet (SLUSEW3).
2.2.1 I/O Description
Table 2-1 details the connection descriptions.
Table 2-1. Connection Descriptions
Pins Description
VCC VCC positive input test point. Powers IC VDD pin, use 4.5-V to 18-V range
VDD VDD positive input of UCC27332-Q1 IC
GND Multiple test points. VCC negative input, IN, EN, OUT and Gate ground reference, and ground at UCC27332-Q1
IC
IN_IN IN PWM signal
EN_IN EN PWM signal
IN IN input pin
EN EN input pin
Gate OUT output at capacitive load
OUT OUT output at driver's pin
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3 Implementation Results
3.1 Electrical Specifications
For the full range of recommended operating specifications and design guidelines for driving loads, see the
UCC27332 20-V, 9-A single channel low-side driver data sheet (SLUSEW3).
CAUTION
The UCC27332Q1EVM is designed for low-voltage evaluation only, and is not certified for evaluation
with voltages beyond the absolute maximum listed in the electrical specifications. Do not evaluate
high-voltage parameters with this board.
3.2 Test Summary
3.2.1 Definitions
This procedure details how to configure the UCC27332Q1EVM evaluation board. Within this test procedure, the
following naming conventions are applied. See the UCC27332Q1EVM Bench Setup Diagram and Configuration,
Figure 3-1, for details.
DMM: Digital multimeter
EVM: Evaluation module
3.2.2 Equipment
3.2.2.1 Power Supply
DC power supply with voltage and current above 20 V and 1 A, for example: Agilent E3634A.
3.2.2.2 Function Generator
Two-channel function generator over 10 MHz, for example: Tektronics AFG3252.
3.2.2.3 DMM
DMM with voltage and current above 30 V and 1 A, for example: Fluke 187.
3.2.2.4 Oscilloscope
Four channel oscilloscope with 500 MHz or greater bandwidth, for example: DPO 7054.
3.2.3 Equipment Setup
3.2.3.1 DC Power Supply Settings
• DC power supply #1
– Voltage setting: 12 V
– Current limit: 0.05 A
3.2.3.2 Digital Multi-Meter Settings
• DMM #1
– DC current measurement, auto-range. Expected current is within 1 mA to 15 mA.
3.2.3.3 Two-Channel Function Generator Settings
The UCC27332Q1EVM requires one function generator setting while grounding EN.
Table 3-1. Two-Channel Function Generator Settings
Mode Frequency Width Delay High Low Output
Impedance
Channel A Pulse 100 kHz 2.5 µs 0 us 5 V 0 V High Z
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3.2.3.4
3.2.3.5 Oscilloscope Settings
Table 3-2 details the oscilloscope settings.
Table 3-2. Oscilloscope Settings
Bandwidth Coupling Termination Scale Settings Inverting
Channel A 500 MHz or above DC 1 MΩ or automatic 10 × or automatic OFF
Channel B
3.2.3.6 Bench Setup Diagram
The bench setup diagram includes the function generator and oscilloscope connections.
Use the following connection procedure and refer to Figure 3-1.
For the UCC27332Q1EVM, the connection procedure is as follows:
• First, make sure the output of the function generator and power supplies are disabled before connection.
• Apply function generator channel-A positive on IN and negative to GND.
See in Figure 3.1.
• Power supply #1: positive node connected to input of DMM #1 and DMM #1 output connected to test point
marked as VCC, negative node of Power Supply #1 connected directly to test point marked as GND; see in
Figure 3-1.
• Connect oscilloscope Ch-1 probes to test points marked as Gate and GND, smaller measurement loop is
preferred; see in Figure 3-1.
+
Power
Supply #1
12 V: 0.05 A
EVM
+
Oscilloscope
Function Generator
CHA
DMM #1
DC Current
Figure 3-1. Bench Setup Diagram and Configuration
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3.3 Power Up and Power Down Procedure
3.3.1 Power Up
1. Before beginning the power up test procedure, verify the connections with Figure 3-1.
2. Enable supply #1, if the current on DMM1 is more than 0.05 mA and less than 0.3 mA, everything is set
correctly.
3. Turn on Channel A of function generator.
4. The following behavior should be observed:
a. Stable pulse output on channel-1 and channel-2 of the oscilloscope, refer to Figure 3-2.
b. Frequency measurement is 100 kHz, ±5 kHz or equal to the programmed function generator frequency.
c. DMM #1 displays around 2.9 mA, ±0.75 mA with the default load capacitance of 1.8 nF. For more
information about operating current, see the UCC27332Q1 Single Channel 20 V 9 A High Speed Low
Side Gate Driver Data Sheet.
Figure 3-2. Example Input and Output Waveforms (Blue is the PWM Input, Red is the Driver Output)
3.3.2 Power Down
Use the following steps to power down the EVM:
1. Disable function generator.
2. Disable power supply #1.
3. Disconnect cables and probes.
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3.4 Typical Performance Waveforms (CL = 1800 pF)
3.4.1 Propagation Delays
The following waveforms illustrate the IN input and OUT output.
To evaluate propagation delays and rising and falling details, TI recommends to have scope probe connections
with short ground leads.
Figure 3-3. Rise Time and Rising Propagation Delay
Note
To evaluate data sheet timing parameters, change C6 to 10 nF.
Figure 3-4. Fall Time and Falling Propagation Delay
Note
To evaluate data sheet timing parameters, change C6 to 10 nF.
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4 Hardware Design Files
4.1 Schematic
Figure 4-1 shows the UCC27332Q1EVM schematic diagram.
VCC
GND
47uF
C1
49.9
R3
TP7
IN
GND
IN_IN
TP1
VDD
D1
30V
0
R4
TP12
GND
TP9
GND
TP5
OUT
TP10
Gate
TP11
GND
TP2
VCC
TP3
GND
GND
12V50mA
TP14
GND
EN_IN
GND
TP13
EN
10pF
C4
10pF
C7
GND
1
2
3
1
2
3
J2
EN
VDD
GND
100
R7
1.8nF
C6
1
2
J1
100nF_Load
1uF
C2
0.1uF
C3
0
R2
10.0k
R5
Gate
EN
VDD
IN
GND
OUT
0
R1
100nF
C5
GND
TP4
GND
VDD
1
VDD
8OUT 6
OUT 7
EN
3
EP 9
IN
2GND 4
GND 5
UCC27332QDGNRQ1
U1
10.0k
R6
GND
TP6
IN
GND
TP8
GND
Figure 4-1. UCC27332Q1EVM Schematic
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4.2 PCB Layouts
Figure 4-2 through Figure 4-5 show the PCB layout information for the UCC27332Q1EVM.
Figure 4-2. Top Overlay Figure 4-3. Top Layer
Figure 4-4. Bottom Layer Figure 4-5. Bottom Overlay
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