Texas Instruments Serial Programming Adapter MSP430 Manual de usuario

SLAU550M–January 2014–Revised February 2018

MSP430™ FRAM Devices Bootloader (BSL)

User's Guide

SLAU550M–January 2014–Revised February 2018

MSP430™ FRAM Devices Bootloader (BSL)

The bootloader (BSL) on MSP430™ microcontrollers (MCUs) lets users communicate with embedded

memory in the MSP430 MCU during the prototyping phase, final production, and in service. Both the

programmable memory (FRAM memory) and the data memory (RAM) can be modified as required.

Do not confuse the bootloader with programs found in some digital signal processors (DSPs) that

automatically load program code (and data) from external memory to the internal memory of the DSP.

These programs are often referred to as bootloaders as well.

Contents

1 Introduction ................................................................................................................... 2

1.1 BSL Limitations ..................................................................................................... 2

1.2 Other Useful Documentation ...................................................................................... 2

2 Overview of BSL Features.................................................................................................. 4

3 BSL Architecture............................................................................................................. 5

3.1 Communication Interface .......................................................................................... 5

3.2 BSL Memory......................................................................................................... 5

3.3 BSL Invocation...................................................................................................... 6

3.4 BSL Time-out Feature.............................................................................................. 8

3.5 BSL Version Number............................................................................................... 8

4 BSL Protocol ................................................................................................................. 9

4.1 BSL Data Packet.................................................................................................... 9

4.2 BSL Security ....................................................................................................... 23

5 Common BSL Use Cases................................................................................................. 24

5.1 Overview and Flow Chart ........................................................................................ 24

5.2 Establishing a Connection ....................................................................................... 25

5.3 Erasing the Device................................................................................................ 25

5.4 Downloading the Application..................................................................................... 25

5.5 Verifying the Application.......................................................................................... 25

5.6 Executing the Application ........................................................................................ 26

6 Customizing the BSL ...................................................................................................... 26

7 Bootloader Versions ....................................................................................................... 27

7.1 FR2xx BSL Versions.............................................................................................. 27

7.2 FR4xx BSL Versions.............................................................................................. 27

7.3 FR57xx BSL Versions ............................................................................................ 28

7.4 FR58xx and FR59xx BSL Versions............................................................................. 28

7.5 FR6xx BSL Versions.............................................................................................. 29

List of Figures

1 Standard RESET Sequence ............................................................................................... 7

2 BSL Entry Sequence at Shared JTAG Pins.............................................................................. 7

3 Example BSL Version....................................................................................................... 9

4 Flowchart.................................................................................................................... 24

List of Tables

1 BSL Overview................................................................................................................ 4

2 BSL Data Packet............................................................................................................. 9

Introduction

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3 UART BSL Command....................................................................................................... 9

4 UART BSL Response....................................................................................................... 9

5 I2C BSL Command......................................................................................................... 10

6 I2C BSL Response ......................................................................................................... 10

7 UART Error Messages .................................................................................................... 10

8 BSL Core Response Structure (Has the BSL Core Message Byte)................................................. 11

9 BSL Core Messages....................................................................................................... 11

10 BSL Core Commands ..................................................................................................... 12

Trademarks

MSP430 is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

1 Introduction

The MSP430 BSL lets users communicate with embedded memory in the MSP430 microcontroller (MCU)

during the prototyping phase, final production, and in service. Both the programmable memory (FRAM

memory) and the data memory (RAM) can be modified as required. Do not confuse the bootloader with

programs found in some digital signal processors (DSPs) that automatically load program code (and data)

from external memory to the internal memory of the DSP. These programs are often referred to as

bootloaders as well.

To start the bootloader, a specific BSL entry sequence must be applied to dedicated pins. BSL is also

callable by the application code sets the PC pointer to the BSL start address in Z-area. On FR26xx,

FR24xx, and FR23xx MCUs, an empty reset vector (for example, as on a unprogrammed device) also

invokes the BSL. After the BSL has started, a sequence of commands can be sent to the BSL to execute

the desired functions (for example, unlocking the device, programming or reprogramming the memory,

and verifying the written data). The bootloader session can be exited by continuing operation at a defined

user program address or by the reset condition.

Even if the device is secured by disabling JTAG, it is still possible to use the BSL. To avoid accidental

overwriting of the BSL code, the code is stored in a secure ROM memory location. To prevent unwanted

memory readout, any BSL command that directly or indirectly allows data reading or writing is password

protected. Using this method, access to the device memory through the BSL is protected against misuse

by the BSL password. The BSL password is equal to the content of Interrupt Vector table on the device.

For more information about password-protected commands, see Section 4.2.

1.1 BSL Limitations

Compared to the BSL on MSP flash-based devices, the BSL on MSP FRAM-based devices bootlader is

programmed in the read-only memory (ROM). See MSP430FRBoot – Main Memory Bootloader and Over-

the-Air Updates for MSP430 FRAM for informaion on how to to customize a bootloader in FR5xx and

FR6xx devices. UART and I2C communication protocols are available. For FR4xx, FR21xx, and FR20xx

devices, only UART is available at a rate of 9600 baud.

1.2 Other Useful Documentation

The device-specific data sheets include information on the pins used for BSL communication and the

supported protocols.

Data Sheets

MSP430FR573x Mixed-Signal Microcontrollers

MSP430FR572x Mixed-Signal Microcontrollers

MSP430FR59xx Mixed-Signal Microcontrollers

MSP430FR58xx Mixed-Signal Microcontrollers

MSP430FR698x(1), MSP430FR598x(1) Mixed-Signal Microcontrollers

MSP430FR21xx, MSP430FR2000 Mixed-Signal Microcontrollers

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Introduction

SLAU550M–January 2014–Revised February 2018

MSP430™ FRAM Devices Bootloader (BSL)

Family User Guides

MSP430FR58xx, MSP430FR59xx, and MSP430FR6xx Family User's Guide

MSP430FR57xx Family User's Guide

MSP430FR4xx and MSP430FR2xx Family User's Guide

Tools and Application Notes

MSP BSL Tool Folder

Training Videos

MSP BSL Overview

MSP BSL Options

MSP Crypto Bootlaoder Training Series

Overview of BSL Features

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2 Overview of BSL Features

Table 1 summarizes the BSL features of the MSP devices, organized by device family.

(1) All BSL software collateral (application, examples, source code, and firmware images) is available in the BSL tool folder.

The MSP430 USB developers package includes additional USB BSL sample applications.

(2) BSL in flash memory allows to replace the BSL with a custom version.

(3) MSP-FET supports UART and I2C BSL communication only.

(4) F543x (non A) has a 16-byte password.

(5) Some devices can disable mass erase on incorrect password. See the device family user's guide.

(6) The decryption of the payload is performed by the device bootcode.

(7) Firmware validation through CRC.

Table 1. BSL Overview

MSP430 MSP432

G2xx0,

G2xx1,

G2xx2,

I20xx

F1xx,

F2xx,

F4xx,

G2xx3

F5xx, F6xx FR5xx, FR6xx FR2x33,

FR231x FR413x,

FR211x P401R

Non-

USB USB Factory Crypto-

Boot-

loader(1)

General

BSL memory type No BSL ROM Flash(2) Flash(2) ROM FRAM ROM ROM Flash(2)

BSL memory size N/A 1 KB 2 KB 2 KB 2 KB 4 KB 3 KB 1 KB 8 KB

Peripheral configured by TLV ✔ ✔ ✔

User configuration ✔

UART ✔✔ ✔✔✔✔✔

I2C✔ ✔ ✔ ✔ ✔

SPI ✔

USB ✔

Protocol

'1xx, 2xx, 4xx' protocol ✔

'5xx, 6xx' protocol ✔✔✔✔✔✔✔

Invoke mechanism

Entry sequence

on I/Os

Sequence on TEST/RST ✔ ✔ ✔ ✔ ✔ ✔

PUR pin tied to VUSB ✔

Sequence on defined I/O ✔ ✔

Empty reset vector invokes BSL ✔ ✔ ✔ ✔

Calling BSL from software application ✔✔✔✔✔✔✔✔

Invalid or incomplete application ✔

Tools Support

Hardware

MSP-BSL 'Rocket' ✔✔ ✔✔✔✔✔

MSP-FET ✔ ✔ ✔ ✔ ✔ ✔ ✔(3)

USB cable ✔

Software(1)

BSL Scripter ✔✔✔✔✔✔✔

BSLDEMO ✔

MSPBSL library ✔UART

only ✔UART

only ✔

Security

Password protection 32 byte 32 byte(4) 32 byte 32 byte 32 byte 32 byte 256 byte

Mass erase on incorrect password(5) ✔✔✔✔ ✔✔✔

Completely disable the BSL using signature or

erasing the BSL ✔✔✔✔✔✔✔

BSL payload encryption ✔ ✔(6)

Update of IP protected regions through boot

code ✔

Authenticated encryption ✔

Additional security ✔(7)

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BSL Architecture

SLAU550M–January 2014–Revised February 2018

MSP430™ FRAM Devices Bootloader (BSL)

3 BSL Architecture

3.1 Communication Interface

As Table 1 shows, the communication protocols available for the BSL in FRAM devices are UART and

I2C. Information regarding the available communication protocol and the hardware pins used for the BSL is

available in the Bootloader (BSL) section of each device-specific data sheet.

3.1.1 UART BSL

UART protocol used by BSL is defined as:

• Baud rate is configured to start at 9600 baud. The FR4xx, FR21xx, and FR20xx devices work at 9600

baud only, while other devices can change the baud rate to a higher speed after initialization.

• Works in half-duplex mode (one sender at a time)

• Handshake is performed by an acknowledge character

• The minimum time delay before sending new character after characters have been received from the

MSP430 BSL is 1.2 ms.

NOTE: Applying a baud rate other than 9600 baud at initialization may result in communication

problems.

3.1.2 I2C BSL

I2C protocol used by BSL is defined as:

• The MSP430 BSL is the slave, and the master must request data from the BSL slave.

• 7-bit addressing mode is used, and the slave address is 0x48.

• Handshake is performed by an acknowledge character in addition to the hardware ACK.

• The minimum time delay before sending new character after characters have been received from

MSP430 BSL is 1.2 ms.

• Repeated starts are not required by the BSL but can be used.

3.2 BSL Memory

3.2.1 BSL Memory Layout

BSL application is factory programmed in the read-only memory area of the MSP430 devices and cannot

be customized. The size of the BSL application differs among the device families:

• FR4xx, FR21xx, and FR20xx BSL size is 1KB at address 0x1000 to 0x13FF.

• FR26xx, FR25xx, FR24xx, and FR23xx BSL size totals 3KB at address 0x1000 to 0x17FF for the first

2KB and 0xFFC00 to 0xFFFFF for the remaining 1KB.

• FR5xx and FR6xx BSL size is 2KB at address 0x1000 to 0x17FF.

3.2.2 BSL Z-Area

When protected, the BSL memory cannot be read or jumped into from a location external to BSL memory.

This makes the BSL more secure and prevents erroneous BSL execution. However, if the entire BSL

memory space were protected in this way, it would also mean that user application code could not call the

BSL in any way, such as an intentional BSL startup or using certain public BSL functions.

The Z-Area is a special section of memory designed to allow for a protected BSL to be publically

accessible in a controlled way. The Z-Area is a section of BSL memory between addresses 0x1000 and

0x100F that can be jumped to and read by external application code. It functions as a gateway from which

a jump can be performed to any location within the BSL memory. The default TI BSL uses this area for

jumps to the start of the BSL and for jumps into BSL public functions.

BSL Architecture

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3.2.3 BSL Memory Consideration

The BSL partially clear RAM contents at the beginning of BSL initialization to prevent reading out any

application data or code that may reside there. After initialization, the BSL uses RAM for data buffer and

local variables. When invoking the BSL from a main application, any RAM contents may be lost. The

range of RAM that is cleared is listed in the tables in Section 7.

3.3 BSL Invocation

The following methods can be used to invoke the BSL application on the MSP430 FRAM devices:

• The BSL can be called by application software (see Section 3.3.1)

• The BSL can be called by the device boot code by applying a hardware entry sequence on TEST and

RESET pins on the device (see Section 3.3.2)

• The BSL can be invoked at start up if the device is blank (see Section 3.3.3). This is applicable only for

FR26xx, FR25xx, FR24xx, and FR23xx devices

3.3.1 Software BSL Invocation

The BSL Z-Area is a small section of memory that can be read and invoked from application code. It is

located at memory addresses 0x1000 to 0x100F.

3.3.1.1 Starting the BSL From an External Software Application

Memory location 0x1000 contains a jump instruction pointing to the BSL start and can be used to invoke

the BSL from a running application by setting the program counter to 0x1000. The stack is always reset,

and RAM is cleared. Interrupts are not disabled by the BSL and should be disabled by the application

before invoking the BSL.

TI recommends clearing the configuration of any module registers that are used in the BSL application,

because the configuration for the external application can interrupt the BSL application and cause

unexpected behavior. One example is that in the FR23xx and FR26xx MCUs, the Timer_B module

executes the time-out calculation of the BSL. If Timer_B is also used in the external application and is not

cleared before jumping to the BSL application, it could cause unexpected behavior.

The location 0x1000 may be called as a C function, as in the following example code:

__disable_interrupt(); // disable interrupts

((void (*)())0x1000)(); // jump to BSL

NOTE: The BSL on FR5xx and FR6xx devices must be executed with a maximum frequency of 8

MHz. If the device operates at frequencies higher than 8 MHz, the MCLK frequency must be

set to 8 MHz or lower before calling the BSL.

3.3.1.2 BSL Action

Memory location 0x1002 contains a jump to the "BSL Action" function. To invoke the action function, three

parameters are needed. The first parameter is a number describing which function, and the other two

parameters are known values that indicate that the function was called intentionally.

R12: The function number

R13: 0xDEAD

R14: 0xBEEF

The BSL on FR5xx and FR6xx devices always executes BSL Action function 2, regardless of the function

number argument.

Bootloader Starts

RST DTR/NMI ( )

TEST ( )RTS

tSBW,en

RST DTR/NMI ( )

TEST ( )RTS

User Program Starts

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BSL Architecture

SLAU550M–January 2014–Revised February 2018

MSP430™ FRAM Devices Bootloader (BSL)

3.3.1.2.1 BSL Action Function 2

Function number: 2

Function Name: Return to BSL

Description: Any supplied function number calls the return to BSL function. This function can be

used if the BSL has written a program into FRAM or RAM, started that program by

"Set PC", and then the program needs to return to the BSL. This function executes

the following code:

RETURN_TO_BSL

POP.W RET_low ; remove first word from return addr

POP.W RET_high ; remove second word from return addr

RETA ; should now return to the BSL location

3.3.2 Hardware BSL Invocation

Applying an appropriate entry sequence on the RST/NMI and TEST pins forces the MSP430 to start

program execution at the BSL RESET vector instead of at the RESET vector located at address FFFEh.

If the application interfaces with a computer UART, these two pins may be driven by the DTR and RTS

signals of the serial communication port (RS232) after passing level shifters. See the Hardware

Description section of MSP430 Programming With the Bootloader (BSL) for hardware schematics. The

standard user reset vector at 0xFFFE is used if TEST is kept low while RST/NMI rises from low to high

(standard method, see Figure 1).

Figure 1. Standard RESET Sequence

The BSL program execution starts when the TEST pin has received a minimum of two positive transitions

and if TEST is high while RST/NMI rises from low to high (BSL entry method, see Figure 2). This level

transition triggering improves BSL startup reliability. The first high level of the TEST pin must be at least

tSBW, En (see device-specific data sheet for tSBW, En parameter).

NOTE: The recommended minimum time for pin states is 250 ns.

Figure 2. BSL Entry Sequence at Shared JTAG Pins

The TEST signal is typically used to switch the port pins between their application function and the JTAG

function. In devices with BSL functionality, the TEST and RST/NMI pins are also used to invoke the BSL.

To invoke the BSL, the RST/NMI pin must be configured as RST and must be kept low while pulling the

TEST pin high and while applying the next two edges (falling, rising) on the TEST pin. The BSL is started

after the TEST pin is held low after the RST/NMI pin is released (see Figure 2).

BSL Architecture

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3.3.2.1 Factors That Prevent Hardware BSL Invocation

The BSL is not started by the BSL RESET vector if:

• There are fewer than two negative edges at TCK pin while RST/NMI is low.

• TCK is high if RST/NMI rises from low to high.

• JTAG has control over the MSP430 MCU resources.

• The supply voltage, VCC, drops below its threshold, and a power-on reset (POR) is executed.

• The RST/NMI pin is configured for NMI functionality (the NMI bit is set).

3.3.3 Blank Device Detection

The boot code on the FR26xx, FR25xx, FR24xx, and FR23xx MCUs supports blank device detection to

avoid the BSL entry sequence. This saves time and also eliminates the need for two additional wires

(TEST, RST) for the BSL invocation sequnce. The BSL entry sequence can be bypassed when the blank

detection is enabled. The device jumps directly to the BSL and bypasses the entry sequence only when

the reset vector has a value of 0xFFFF.

3.4 BSL Time-out Feature

The BSL on the FR26xx, FR25xx, FR24xx, and FR23xx MCUs implements a low-power time-out feature

for the automatic detection of the BSL interface. If no communication has been established within ten

seconds, the device enters LPM4 mode. To invoke the BSL again, the device power must be cycled, or a

reset or NMI must be received.

3.5 BSL Version Number

The BSL version number can be requested by a host programmer using the TX BSL Version command

(see Section 4.1.5.7 for more information).

Byte1: BSL Vendor information

TI BSL is always 0x00. Non-TI BSLs may use this area in another manner.

Byte 2: Command Interpreter Version

The version number for the section of code that interprets BSL core commands.

Byte 3: API Version

The version number for the section of code that reads and writes to MSP430 memory.

Reserved bits:

0x00 to 0x0F: Indicates that this BSL API interfaces with flash.

0x30 to 0x3F: Indicates that this BSL API interfaces with FRAM.

0x80 to 0x8F: Indicates that this BSL can execute only the following commands:

RX Data Block Fast (and can only write to RAM), RX Password, Set PC

Byte 4: Peripheral Interface Version

The version number for the section of code that manages communication.

Reserved numbers:

0x00 to 0x2F: Indicates a Timer_A-based UART

0x30 to 0x4F: Indicates USB

0x50 to 0x6F: Indicates USCI-based UART

0x70 to 0x8F: Indicates eUSCI-based UART

0x90 to 0x9F: Indicates USCI-based I2C

0xA0 to 0xAF: Indicates eUSCI-based I2C

0xB0 to 0xBF: Indicates combined eUSCI I2C and UART

00.07.34.B2

FRAM-based API

Version 4

TI BSL 07

Command Interpreter

Version 7

Combined eUSCI-based

I2C and UART

Version 2

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BSL Protocol

SLAU550M–January 2014–Revised February 2018

MSP430™ FRAM Devices Bootloader (BSL)

Figure 3. Example BSL Version

4 BSL Protocol

4.1 BSL Data Packet

The BSL data packet has a layered structure. The BSL core command contains the actual command data

to be processed by the BSL. In addition the standard BSL commands, there can be wrapper data before

and after each core command known as the peripheral interface code (PI Code). This wrapper data is

information that is specific to the peripheral and protocol being used, and it contains information that

allows for correct transmission of the BSL core command. Taken together, the wrapper and core

command constitute a BSL data packet (see Table 2). See Section 4.1.5 for details of the BSL Core

Commands.

Table 2. BSL Data Packet

PI Code BSL Core Command PI Code

The PI Code depends on the protocol in use, either UART or I2C. The following sections describe the

UART and I2C peripheral interface wrappers.

4.1.1 UART Peripheral Interface Wrapper

The UART BSL protocol interface is implemented in multiple packets. The first packet is transmitted to the

BSL device and contains the BSL Core Command and its wrapper. Table 3 summarizes the packet

format.

Table 3. UART BSL Command

Header Length Length BSL Core Command CKL CKH

0x80 NL NH See Section 4.1.5 CKL CKH

The second packet is received from the BSL device and contains the BSL acknowledgment and the BSL

Core Response. Table 4 lists the BSL response data packet structure.

(1) BSL Core Response is not always included.

Table 4. UART BSL Response

Acknowledgment Header Length Length BSL Core Response(1) CKL CKH

ACK from BSL 0x80 NL NH See Section 4.1.4 CKL CKH

BSL Protocol

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4.1.2 I2C Peripheral Interface Wrapper

The I2C BSL protocol interface is implemented in multiple packets. The first packet is sent as a write

request to the BSL slave address and contains the BSL Core Command and its wrapper. Table 5 shows

this format.

Table 5. I2C BSL Command

I2C Header Length Length BSL Core Command CKL CKH

S/A/W 0x80 NL NH See Section 4.1.5 CKL CKH

The second packet is sent as a read request to the BSL slave address and contains the BSL

acknowledgment and the BSL Core Response. Table 6 shows the format of this BSL response.

(1) BSL Core Response is not always included.

Table 6. I2C BSL Response

I2C ACK Header Length Length BSL Core Response(1) CKL CKH I2C

S/A/R ACK from

BSL 0x80 NL NH See Section 4.1.4 CKL CKH STOP

4.1.3 BSL Acknowledgment

The peripheral interface section of the BSL software parses the wrapper section of the BSL data packet. If

there are errors with the data transmission, an error message is sent immediately. An ACK is sent after all

data has been successfully received and does not mean that the command has been correctly executed

(or even that the command was valid) but, rather, that the data packet was formatted correctly and passed

on to the BSL core software for interpretation.

The BSL protocol dictates that every BSL data packet sent is responded to with a single byte

acknowledgment in addition to any BSL data packets that are sent. Table 7 lists the acknowledgment

responses from the BSL. If an acknowledgment byte other than ACK is sent, the BSL does not send any

BSL data packets. The host programmer needs to check the acknowledgment error and retry

transmission.

(1) Not supported for FR4xx, FR21xx, and FR20xx.

Table 7. UART Error Messages

Data Meaning

0x00 ACK

0x51 Header incorrect. The packet did not begin with the required value of 0x80.

0x52 Checksum incorrect. The packet did not have the correct checksum value.

0x53(1) Packet size zero. The size for the BSL core command was given as 0.

0x54(1) Packet size exceeds buffer. The packet size given is too big for the RX buffer.

0x55 Unknown error

0x56(1) Unknown baud rate. The supplied data for baud rate change is not a known value.

0x57 Packet Size Error.

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