Texas Instruments TPS65912xEVM-081 Instrucciones de funcionamiento

Preface

SLVU750A–July 2012–Revised May 2013

TPS65912xEVM-081 User's Guide

Abstract

This user’s guide provides a detailed account of the TPS65912x Evaluation Module (EVM) including a

general overview, schematic diagram, board layout, setup instructions, graphical user interface (GUI) and

bill of materials (BOM). Use this EVM for integrated circuit (IC) evaluation and also for design reference.

The TPS65912x is a power management unit (PMU) for processor power.

How to Use This Manual

This document is formatted in order of operation; become familiar with the schematic and layout before

proceeding to the setup section.

Notational Conventions

• EVM – Evaluation Module

• PMU – Power Management Unit

• IC – Integrated Circuit

• PMIC – Power Management Integrated Circuit

• BOM – Bill of Materials

• PCB – Printed-circuit board

• GUI – Graphical User Interface

Information About Cautions and Warnings

This book may contain cautions and warnings.

CAUTION

Please read this document thoroughly.

Not following this document in detail could potentially damage your software or

equipment.

WARNING

Please take all possible safety precautions.

Improper use of this evaluation module could potentially cause

physical harm.

The information in a caution or a warning is provided for protection. Please read each caution and warning

carefully.

SLVU750A–July 2012–Revised May 2013 TPS65912xEVM-081 User's Guide

Related Documentation From Texas Instruments

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Related Documentation From Texas Instruments

Refer to the data sheet, SWCS054, for detailed information on the TPS65912x IC features and operating

specifications.

If You Need Assistance

Visit the TI E2E Forums: http://e2e.ti.com

FCC Warning

This equipment is intended for use in a laboratory test environment only. It generates, uses, and can

radiate radio frequency energy and has not been tested for compliance with the limits of computing

devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable

protection against radio frequency interference. Operation of this equipment in other environments may

cause interference with radio communications, in which case the user, at his/her own expense, is required

to take whatever measures necessary to correct this interference.

2TPS65912xEVM-081 User's Guide SLVU750A–July 2012–Revised May 2013

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User's Guide

SLVU750A–July 2012–Revised May 2013

TPS65912xEVM-081

1 TPS65912xEVM-081 Overview

The TPS65912xEVM-081 allows evaluation of the IC and serves a reference design.

1.1 Introduction to Using the TPS65912xEVM-081

Make a copy of this user’s guide available to the operator of this EVM.

SLVU750A–July 2012–Revised May 2013 TPS65912xEVM-081

CLOCKS

Components with no values are not installed.

DEF_SPI_I2C

GPIO1_MISO

GPIO2_CE

LEDA_GPIO3

LEDB_GPIO4

LEDC_GPIO5

GND

VLDO7

VINLDO67

VLDO6

VDCDC4

PGND4

SW4

VINDCDC4

LSO

B1 LEDC_GPIO5

B2 LEDB_GPIO4

B3 LEDA_GPIO3

VDCDC4_GND

PGND4

SW4

VINDCDC4

LSI

VINDCDC3

C2 EN_LS1

C3 EN_LS0

C4 GPIO2_CE

C5 EN4_DCDC4_SEL

C6 EN3_DCDC3_SEL

C7 AGND

C8 VINDCDC_ANA

VINDCDC2

SW3

D2 CONFIG2

D3 PWRON

D4 GPIO1_MISO

D5 SCLK_SCK

D6 POWERHOLD_ON

VDCDC2

D8 EN2_DCDC2_SEL

SW2

PGND3

E2 CONFIG1

E3 DGND

E4 SDA_MOSI

E5 SCL_AVS_CLK_REQ1

E6 SDA_AVS_CLK_REQ2

E7 DEF_SPI_I2C-GPIO0

E8 EN1_DCDC1_SEL

PGND2

VINLDO4

VDCDC3

F3 AGND

F4 VCON_PWM

F5 VCON_CLK

F6 OMAP_WDI_32K_OUT

F7 VDDIO

VINLDO3

VLDO3

VLDO4

G2 VCCS_VIN_MON

G3 LDOAO

G4 SLEEP_PWR_REQ

G5 INT1

G6 ~RESPWRON_VSUP_OUT

G7 CPCAP_WDI

VINLDO5

VLDO5

VLD02

H2 VCC

H3 VREF1V25

VDCDC1_GND

PGND1

SW1

VINDCDC1

VINLDO8

VLDO8

VLDO10

VINLDO1210

VLDO1

VDCDC1

PGND1

SW1

VINDCDC1

VINLDO9

VLDO9

TPS65912YFF

L3 1.0uH

L4 1.0uH

C1 22uF

10uF

L1 1.0uH

10uF

C7 10uF

10uF

C9 10uF

L2 1.0uH

C10

10uF

C11 2.2uF C12 2.2uF

C13 2.2uF

C14 2.2uF

C15 2.2uF

C16 2.2uF

C17 2.2uF

C18 2.2uF

C19 2.2uF

C20 2.2uF

C21 2.2uF

C22 2.2uF

C23 2.2uF

C24 4.7uF

C25 4.7uF

C26 4.7uF

C27 4.7uF

LTST-C190YKT

LTST-C190GKT

LTST-C190CKT

C28 220nF

C29 2.2uF

C30 2.2uF

R1 0

R13 0

C4 22uF

C31 2.2uF

J40

R10

R11 3.30k

R12

R14 3.30k

R15 3.30k

R19 J1

4 5

Y2 R2

R16 0

R5 0

R6 0

R7 0

R17 0

C53

R20 0

R21 0

R22 0

R24 0

VDCDC4

VDCDC1

VDCDC4_SENSE

VDCDC4_GND_SENSE

VDCDC3

VDCDC2

LSI

LSO

VINLDO3

VLDO3

VINLDO1210

VLDO1

VLDO2

VINLDO4

VLDO4

VINLDO5

VLDO5

VINLDO67

VLDO6

VLDO7

VINLDO8

VLDO8

VINLDO9

VLDO9

VLDO10

VCC

SCL_CLK

SDA_MOSI

GPIO1_MISO

GPIO2_CE

SCL_AVS

SDA_AVS

EN2_DCDC2

EN3_DCDC3

EN4_DCDC4

PWRHOLD

VBAT

LDOAO

VREF1V25

LEDA_GPIO3

LEDB_GPIO4

LEDC_GPIO5

VBAT

CONFIG1

CONFIG2

CPCAP_WDI

DEF_SPI_I2C

EN1_DCDC1

EN_LS0

EN_LS1

INT1

NRESPWRON

OMAP_WDI

PWRON

SLEEP

VCCS_VIN_MON

VCON_CLK

VCON_PWM

VDCDC1_GND_SENSE

VDCDC1_SENSE

VDDIO

VDCDC3_SENSE

VDCDC2_SENSE

VBAT

VDDIO

DEF_SPI_I2C

GPIO1_MISO

GPIO2_CE

LEDA_GPIO3

LEDB_GPIO4

LEDC_GPIO5

GND

TXCOUT

SCL_CLK

SDA_MOSI

INTA

INTA INTA

SQW_INTB

VLDO3

VCLKS

GND

Schematic Diagram

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2 Schematic Diagram

The following figures represent the schematic diagram for the EVM:

Figure 1. TPS65912xEVM-081 Schematic Page 1/2

4TPS65912xEVM-081 SLVU750A–July 2012–Revised May 2013

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SPI

ENABLE

CONFIG

I2C

AVS-I2C

DCDC OUTPUT

LOAD SWITCH

VDCDC1

VDCDC2

VDCDC3

VDCDC4

LSI

LSO

LDO SUPPLY

VINLDO1210

VINLDO3

VINLDO4

VINLDO5

VINLDO67

VINLDO8

VINLDO9

LDO OUTPUT

VLDO1

VLDO2

VLDO3

VLDO4

VLDO5

VLDO6

VLDO7

VLDO8

VLDO9

VLDO10

SUPPLY INPUT

CLK_REQ1

CLK_REQ2

PWR_REQ

3V to 5V

GND

S+

S-

S+

S-

VREF1V25

GND

VDDIO

GND

SLEEP

GND

INT1

GND

NRESPWRON

GND

SCL_AVS

GND

SDA_AVS

GND

VCON_CLK

GND

VCON_PWM

GND

CPCAP_WDI

LDOAO

OMAP_WDI

VDDIO

EN_LS1

GND

VDDIO

EN_LS0

GND

VDDIO

EN4

GND

VDDIO

EN3

GND

VDDIO

EN2

GND

VDDIO

EN1

GND

LDOA0

CONFIG1

GND

LDOA0

CONFIG2

GND

LDOA0

DEF_SPI_I2C

GND

LSI

VCCS_VIN_MON

VBAT

VCCS_VIN_MON

GND

LDOA0

PWRON

VDDIO

(JP12)

PWRHOLD

GND

PWRON

GND

Components with no values are not installed.

VDDIO

VBAT

GND

PWRHOLD

JP8

JP9

JP1

JP2

JP3

JP4

JP5

J28

J29

JP6

JP7

J30

J31

J35

J36

J37

J38

3 4

J39

J32

R30

3.30k

R31

3.30k

R32

3.30k

R33

3.30k

J34

J3 C32 10uF

R26

R27

J4 C33 10uF

R28

J5 C34 10uF

R29

J6 C35 10uF

R34

R35

J26

J27

J10

J11

J12

C36 2.2uF

C37 2.2uF

C38 2.2uF

C39 2.2uF

R36

R37 0

R38

R39

R40

R41 0

R42

R43 0

R44

R45 0

J13

C40 2.2uF

R46

R47 0

J14

C41 2.2uF

R48

R49 0

J15

C42 2.2uF

R50

R51 0

J16 C43 2.2uF

J17 C44 2.2uF

J18 C45 2.2uF

J19 C46 2.2uF

J20 C47 2.2uF

J21 C48 2.2uF

J22 C49 2.2uF

J23 C50 2.2uF

J24 C51 2.2uF

J25 C52 2.2uF

J7 C54 10uF

R53

R54

R56

R57

R58

JP11

R18

10.0k

J33

C55

4.7uF

R23

3.30k

J41

J42

R60

R61

C56

22uF

R4 0

JP10

R25

R52

R55

R59

R62

JP12

LDOAO

CONFIG1

CONFIG2

DEF_SPI_I2C

EN1_DCDC1

EN2_DCDC2

EN3_DCDC3

EN4_DCDC4

CPCAP_WDI

NRESPWRON

LDOAO

EN_LS0

EN_LS1

VREF1V25

VDDIO

SLEEP

INT1

SDA_MOSI

SCL_CLK

SDA_AVS

GPIO2_CE

SDA_MOSI SCL_CLK

GPIO1_MISO

VDDIO

OMAP_WDI

VDDIO

VCON_CLK

VCON_PWM

VDDIO

SCL_AVS

VCCS_VIN_MON

VBAT

LSI

VDCDC1

VDCDC1_SENSE

VDCDC1_GND_SENSE

VDCDC2

VDCDC2_SENSE

VDCDC3

VDCDC3_SENSE

VDCDC4

VDCDC4_SENSE

VDCDC4_GND_SENSE

LSI

LSO

VINLDO1210

VINLDO3

VINLDO4

VINLDO5

VDCDC3

VBAT

VDCDC2

VDCDC3

VDCDC2

VBAT

VDCDC2

VBAT

VDCDC3

VBAT

VINLDO67

VDCDC3

VBAT

VINLDO8

VDCDC3

VBAT

VINLDO9

VDCDC3

VBAT

VLDO1

VLDO2

VLDO3

VLDO4

VLDO5

VLDO6

VLDO7

VLDO8

VLDO9

VLDO10

VBAT

LSI

VBAT

LSI

LSO

VBAT

VDCDC2

LDOAO

VDDIO

PWRHOLD

PWRON

SCL_AVS

SDA_AVS

VDDIO

VCC

VDCDC2

VDCDC3

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Schematic Diagram

Figure 2. TPS65912xEVM-081 Schematic Page 2/2

SLVU750A–July 2012–Revised May 2013 TPS65912xEVM-081

Layout

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3 Layout

The EVM board layout is detailed in the following images:

Figure 3. TPS65912xEVM-081 Layout Top

6TPS65912xEVM-081 SLVU750A–July 2012–Revised May 2013

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Layout

Figure 4. TPS65912xEVM-081 Layout Layer 2

SLVU750A–July 2012–Revised May 2013 TPS65912xEVM-081

Layout

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Figure 5. TPS65912xEVM-081 Layout Layer 3

8TPS65912xEVM-081 SLVU750A–July 2012–Revised May 2013

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Layout

Figure 6. TPS65912xEVM-081 Layout Layer 4

SLVU750A–July 2012–Revised May 2013 TPS65912xEVM-081

Layout

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Figure 7. TPS65912xEVM-081 Layout Layer 5

10 TPS65912xEVM-081 SLVU750A–July 2012–Revised May 2013

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