Terasic DE10-Agiles Manual de usuario

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

1.1. Q

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

Contents

Chapter 1 Overview ...................................................................................6

1.1 General Description ..............................................................................6

1.2 Key Features.........................................................................................6

1.3. Block Diagram.......................................................................................8

1.4. Board Power On....................................................................................9

1.5. Board Protection .................................................................................11

Chapter 2 Board Component..................................................................12

2.1 Board Overview...................................................................................12

2.2 Configuration.......................................................................................13

2.3 Status and Setup Components ...........................................................16

2.4 General User Input/Output..................................................................22

2.5 Clock Circuit........................................................................................26

2.6 DDR4 SO-DIMM .................................................................................29

2.7 QSPF-DD Ports...................................................................................52

2.8 PCI Express........................................................................................58

2.9 System Status Interface......................................................................63

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

Chapter 3 System Builder .......................................................................66

3.1 Introduction .........................................................................................66

3.2 General Design Flow...........................................................................67

3.3 Using System Builder..........................................................................68

Chapter 4 CFI-Flash Programming.........................................................77

4.1 FPGA Configure Operation .................................................................79

4.2 CFI Flash Memory Map.......................................................................81

4.3 Programming Bit Stream File Into CFI Flash.......................................82

4.4 Restore Factory Settings.....................................................................85

4.5 Flash_Factory Example ......................................................................86

4.6 Flash_User Example...........................................................................88

Chapter 5 Peripheral Reference Design.................................................89

5.1 Configure Si5340A in RTL...................................................................89

5.2 Clock_Controller demo for Si5340 ......................................................96

5.3 Nios II control for SI5340/ Temperature/ Power/Fan ...........................98

5.4 Board Information IP .........................................................................103

Chapter 6 Memory Reference Design ..................................................108

6.1 DDR4 SDRAM Test...........................................................................108

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

6.2 DDR4 SDRAM Test by Nios II...........................................................110

Chapter 7 PCI Express Reference Design for Windows.....................116

7.1 PCI Express System Infrastructure...................................................116

7.2 PC PCI Express Software SDK.........................................................117

7.3 PCI Express Software Stack.............................................................118

7.4 PCI Express Library API....................................................................125

7.5 PCIe Reference Design - Fundamental ............................................130

7.6 PCIe Reference Design - DDR4........................................................139

Chapter 8 PCI Express Reference Design for Linux...........................151

8.1 PCI Express System Infrastructure...................................................151

8.2 PC PCI Express Software SDK.........................................................152

8.3 PCI Express Software Stack.............................................................153

8.4 PCI Express LibraryAPI....................................................................155

8.5 PCIe Reference Design - Fundamental ............................................155

8.6 PCIe Reference Design - DDR4........................................................162

Chapter 9 Transceiver Verification.......................................................172

9.1 Transceiver Test Code ......................................................................172

9.2 Loopback Fixture...............................................................................172

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

9.3 Testing by Transceiver Test Code .....................................................173

9.4 100G Ethernet Example (E-Tile FPGA).............................................176

9.5 Serial Lite IV IP Example...................................................................182

Chapter 10 Dashboard GUI..................................................................193

10.1 Driver Installed on Host.....................................................................194

10.2 Run Dashboard GUI..........................................................................196

Chapter 11 Additional Information......................................................208

11.1 Getting Help......................................................................................208

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

Chapter 1

Overview

his chapter provides an overview of the DE10-Agilex Development Board and

installation guide.

1.1 General Description

Targeting the compute and acceleration needs from the edge to the core to the cloud,

Terasic’s DE10-Agilex accelerator is purpose-designed to meet the ever-increasing

demands for acceleration, compute, and fast data movement.

The DE10-Agilex is based on the powerful Intel® Agilex™ FPGA to obtain speed and

power breakthrough, with 40% higher performance, 40% lower power for equivalent

performance. The accelerator includes PCI Express Gen 4.0 x16, two 200G

QSFP-DD connectors and offers 32GB of DDR4 up to 680Gbps bandwidth to provide

adaptable acceleration, maximum throughput and highly customizable processing of

data for compute intensive applications.

The DE10-Agilex fully supports Intel® Open VINO™ toolkit, OpenCL™ BSP and

Intel® oneAPI Toolkits to provide optimal Computer Vision and Deep Learning

solutions. Our clients' systems can achieve highest computing performance and

lowest cost for their Data Center and AI applications by leveraging the Agilex® FPGA

on DE10-Agilex accelerator.

1.2 Key Features

The following hardware is implemented on the DE10-Agilex board:

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

Intel® Agilex™ F-Series

AGFB014R24A2E2VR0

1,437K logic elements (LEs)

139 Mbits embedded memory(M20K)

9,020 18-bit x 19-bit multipliers

4,510 Variable-precision DSP blocks

1x PCIe Gen4 x16 Hard IP blocks

Transceivers

16 x 28 Gbps NRZ transceivers (E-tile)

8 of them can run 58 Gbps PAM4

16 x 17.4 Gbps NRZ transceivers (P-tile)

JTAG Header and FPGA Configuration

On-board USB Blaster II or JTAG header for use with the Quartus

Prime Programmer

MAX10 FPGA 10M04SCU169 System Controller and Avalon-ST x16 for

configuration

AS x4 configuration via EPCQ-L configuration device (DNI)

Memory devices

4 DDR4 SO-DIMM sockets, each supports up to 16GB ECC DDR4 SDRAM

128MB Flash

General user I/O

4 user controllable LEDs

2 user push buttons

2 user dip switches

Clock interface

50MHz, 100Mhz and 125MHz Oscillators

Programming PLL providing clock for QSFP-DD interface

Dual clocks oscillators for DDR4 SDRAM SO-DIMM

U.FL connector for external differential clock input

One 2x5 GPIO timing expansion header

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

Communication Ports

Two QSFP-DD Cages

Each can run up to 200Gbps

Compatible with QSFP and QSFP28

PCI Express x16 edge connector

Support for PCIe x16 Gen4

Edge connector for PC motherboard with x16 PCI Express slot

4-Pin UART to USB (Integrated with USB-Blaster with USB Hub)

System Monitor and Control

Dashboard System for System Management (Implement by System M

AX10 FPGA)

Temperature sensor

Fan control

Power monitor

Power Source

PCI Express 8-pin DC 12V power

PCI Express edge connector power

Mechanical Specification

PCI Express full-height and 3/4-length

1.3. Block Diagram

Figure 1-1 shows the block diagram of the DE10-Agilex board. To provide maximum

flexibility for the users, all key components are connected to the Agilex™ FPGA

device. Thus, users can configure the FPGAto implement any system design.

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

Figure 1-1 Block diagram of the DE10-Agilex board

1.4. Board Power On

The DE10-Agilex board can be used in stand-alone or be installed to the Host through

PCIe slot. This section will introduce how to power on the board and the information

that user should notice in these two modes.

Stand-alone Mode

When the DE10-Agilex board is used in stand-alone mode, users can use the 12V

ATX power provided in the kit to connect to the 8-pin 12V ATX power connector (See

Figure 1-2) of the DE10-Agilex board. To power up the board, user need to turn the

power switch SW2 to “ON”position.

DE10-Agilex

User Manual

www.terasic.com

January 29,

2021

Figure 1-2 Board Power Control Switch

Install to Host

When the DE10-Agilex is installed on the Host via PCIe slot. Although the Host can

provide power to DE10-Agilex board via PCIe slot, but Terasic strongly recommends

that users connect an external power (through the 2x4 ATX power connector) to the

board. This can prevent the power provided from Host unable to meet the power

requirement of DE10-Agilex. If the power supply to the board is insufficient, it may

cause some components to be abnormal.

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