NXP Semiconductors HRPNUG Manual de usuario
HRPNUG
Harpoon User's Guide
Rev. 2.2 — 16 December 2022 User guide
Document information
Information Content
Keywords i.MX 8M device family, Arm Cortex-A53 processor (Armv8-A architecture),
RTOS, Linux, hardware partitioning, Jailhouse hypervisor, NXP Linux Yocto,
Zephyr RTOS, FreeRTOS, MCUXpresso SDK
Abstract This document presents the Harpoon release 2.2 for i.MX 8M device family,
using the Arm Cortex-A53 processor (Armv8-A architecture).
NXP Semiconductors HRPNUG
Harpoon User's Guide
1 Overview
This document presents the Harpoon release 2.2 for i.MX 8M device family, using the
Arm Cortex-A53 processor (Armv8-A architecture).
Harpoon provides an environment for developing real-time demanding applications on
an RTOS running on one (or several) Cortex-A core(s) in parallel of a Linux distribution,
leveraging the 64-bit Arm architecture for higher performance.
The system starts on Linux and the Jailhouse hypervisor partitions the hardware to run
both Linux and the guest RTOS in parallel.
The hardware partitioning is configurable and depends on the use case. This release
includes an audio application, an industrial application and a real-time latency
measurement application, all available both for FreeRTOS as well as Zephyr (some
application feature limitations exist depending on the selected platform and RTOS).
This release supports the following software and hardware:
•NXP Linux Yocto
–i.MX LF 5.15.71-2.2.0: For more information, see the i.MX Yocto Project User's
Guide.
–Real-time Edge SW v2.4: For more information, see the Real-time Edge Yocto
Project v2.4 User Guide.
•i.MX 8M Series (EAR support)
–i.MX 8M Mini LPDDR4 EVKB
–i.MX 8M Nano LPDDR4 EVK
–i.MX 8M Plus LPDDR4 EVK
•Jailhouse hypervisor
•FreeRTOS V10.4.3 kernel
–Cortex-A53 port, uniprocessor
–Guest OS running on Jailhouse cell
•Zephyr RTOS 3.2.0
–Cortex-A53 port, SMP
–Guest OS running on Jailhouse cell
•MCUXpresso SDK 2.12
–GIC, Timer and MMU Cortex-A53 drivers
–CAN, ENET, ENET_QOS, GPT, I2C, SAI, and UART SoC drivers
–Audio Codec drivers
–PHY drivers
•RTOS applications
–Audio reference application
–Industrial reference application
–Real-time latency measurement application
1.1 Architecture
The following figure shows the architecture of the Harpoon solution.
HRPNUG All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User guide Rev. 2.2 — 16 December 2022
2 / 54
NXP Semiconductors HRPNUG
Harpoon User's Guide
Figure 1. Harpoon solution architecture
The i.MX 8M box shows the hardware partitioning between Jailhouse cells.
The boxes in dark orange (group 1) show the main hardware blocks allocated to the
Linux OS.
The boxes in blue (group 3) show the main hardware blocks allocated to the RTOS.
The boxes in light orange (group 2) show the main hardware blocks shared between
Linux and the RTOS.
Harpoon-apps is the real-time application running on Jailhouse's inmate cell. It is built on
top of Zephyr or FreeRTOS, using MCUXpresso drivers.
1.2 Hardware resource partitioning
Jailhouse hypervisor is used to run an RTOS in parallel with Linux: FreeRTOS and
Zephyr are supported in this release.
Jailhouse is a simple hypervisor that assigns hardware resources to a guest OS instead
of virtualising them. For instance, a CPU core is statically assigned to a specific guest
and is not shared with other guests.
In Jailhouse terms, the RTOS (inmate) runs in a cell. A configuration file describes which
hardware resources are assigned to this cell. This configuration file contains descriptions
of the following:
HRPNUG All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User guide Rev. 2.2 — 16 December 2022
3 / 54
NXP Semiconductors HRPNUG
Harpoon User's Guide
•CPU cores assigned to the cell
•Interrupt lines assigned to the cell
•Memory regions assigned to the cell
•Virtual PCI devices used for communication between cells
There is also a root cell configuration that describes the hardware prior to the hardware
partitioning.
The source files of the cell configurations are embedded through patches in the Jailhouse
recipe of the Harpoon meta-layer, at the following locations:
•configs/arm64/imx8m*-freertos.c for the cell configuration of the FreeRTOS
rt_latency use case
•configs/arm64/imx8m*-zephyr.c for the cell configuration of the Zephyr
rt_latency use case
•configs/arm64/imx8m*-freertos-audio.c for the cell configuration of the
FreeRTOS audio use case
•configs/arm64/imx8m*-freertos-avb.c for the cell configuration of the
FreeRTOS audio (AVB) use case
•configs/arm64/imx8m*-zephyr-audio.c for the cell configuration of the Zephyr
audio use case
•configs/arm64/imx8m*-freertos-industrial.c for the cell configuration of
the FreeRTOS industrial use case
•configs/arm64/imx8m*-zephyr-industrial.c for the cell configuration of the
Zephyr industrial use case
•configs/arm64/imx8m*.c for the root cell configuration
The CPU core allocated to the RTOS forms a bitmap in the cpu structure. Here, CPU
core 3 is assigned to the cell:
.cpus = {
0b1000,
},
For a multicore (SMP) cell, two cores can be used, for instance:
.cpus = {
0b1100,
},
Memory regions assigned to the inmate cell are listed in the mem_regions structure.
Memory regions can be reserved for the inmate cell or shared with the Linux root cell.
Memory regions can be DDR chunks for the inmate cell use as well as device memory
mapped regions such as UART or SAI.
Interrupts are mapped to the cell with the irqchips structure.
Virtual PCI devices are defined with the pci_devices structure. These virtual devices
are used by Jailhouse to implement IVSHMEM v2 communication channels.
2 Building Harpoon Yocto images
As mentioned in the overview section, Harpoon is compatible with both i.MX Yocto and
Real-Time Edge Yocto. Each distribution is addressed in a separate section below.
HRPNUG All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User guide Rev. 2.2 — 16 December 2022
4 / 54
NXP Semiconductors HRPNUG
Harpoon User's Guide
2.1 i.MX Yocto
To build this release, fetch its Yocto manifest and get the meta-layers:
$ mkdir yocto
$ cd yocto
$ repo init -u https://github.com/nxp-imx/imx-manifest -b imx-
linux-kirkstone -m imx-5.15.71-2.2.0_harpoon-v2.xml
$ repo sync
Then, prepare the environment with the following command:
$ DISTRO=fsl-imx-xwayland MACHINE=<machine> source imx-harpoon-
setup-release.sh -b build.<machine>
Where, <machine> is one of the following:
•imx8mm-lpddr4-evk for i.MX 8M Mini EVKB board
•imx8mn-lpddr4-evk for i.MX 8M Nano EVKB board
•imx8mp-lpddr4-evk for i.MX 8M Plus EVK board
The end user license agreement must be accepted to continue.
Then build the image with the following command:
$ bitbake imx-image-core
The image is then available in subdirectory tmp/deploy/images/<machine>/.
Copy the disk image to a micro-SD card. For example, assuming the card is recognized
as /dev/mmcblk0 by your host machine:
$ zstdcat imx-image-core-<machine>.wic.zst | sudo dd of=/dev/
mmcblk0 bs=1M
The micro-SD card now contains the release.
2.2 Real-Time Edge Yocto
See the Real-time Edge Yocto Project User Guide to build Harpoon and prepare an SD
card for supported boards.
3 Hardware Setup
3.1 i.MX Reference Boards
This Harpoon release supports the following development boards.
HRPNUG All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User guide Rev. 2.2 — 16 December 2022
5 / 54
NXP Semiconductors HRPNUG
Harpoon User's Guide
Figure 2. i.MX 8M Mini EVK
Note: For more information to order the board, see https://www.nxp.com/design/
development-boards/i-mx-evaluation-and-development-boards/evaluation-kit-for-the-i-
mx-8m-mini-applications-processor:8MMINILPD4-EVK
Figure 3. i.MX 8M Nano EVK
Note: For more information to order the board, see https://www.nxp.com/design/
development-boards/i-mx-evaluation-and-development-boards/evaluation-kit-for-the-i-
mx-8m-nano-applications-processor:8MNANOD4-EVK.
HRPNUG All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User guide Rev. 2.2 — 16 December 2022
6 / 54
NXP Semiconductors HRPNUG
Harpoon User's Guide
Figure 4. i.MX 8M Plus EVK
Note: For more information to order the board, see https://www.nxp.com/design/
development-boards/i-mx-evaluation-and-development-boards/i-mx-8m-plus-evaluation-
kit-enabling-power-measurement:8MPLUSLPD4-PEVK.
3.2 Audio use case hardware
Harpoon audio application uses the I2S HiFiBerry audio card DAC+ ADC Pro.
Figure 5. HiFiBerry DAC+ ADC Pro (picture from HiFiBerry's website)
Note: For more information to order the board, see https://www.hifiberry.com/shop/
boards/hifiberry-dac-adc-pro/.
The HiFiBerry DAC+ ADC Pro is an audio card designed for the Raspberry Pi, but it can
be connected to EVK boards using the 40-pin connector, provided a few adaptations are
made.
The following pins on the EVK's 40-pin connector must be connected to the following
HiFiBerry's pins.
EVK HiFiBerry Function
2 2 5V
Table 1. EVK - HiFiBerry transposition
HRPNUG All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User guide Rev. 2.2 — 16 December 2022
7 / 54
NXP Semiconductors HRPNUG
Harpoon User's Guide
EVK HiFiBerry Function
3 3 I2C SDA
5 5 I2C SCK
6 6 GND
35 40 I2S TX
36 12 I2S clock
37 35 I2S word select for RX and TX
38 38 I2S RX
Table 1. EVK - HiFiBerry transposition...continued
Figure 6. Handmade transposer
A complete setup, with a handmade transposer to respect above pinout, is shown as
follows.
HRPNUG All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User guide Rev. 2.2 — 16 December 2022
8 / 54
NXP Semiconductors HRPNUG
Harpoon User's Guide
Figure 7. i.MX 8M Mini EVK with HiFiBerry audio card
The audio card has both an ADC (PCM1863) to record audio and a DAC (PCM5122) for
audio playback.
Record is done through the audio jack (connector highlighted in 1 in the following figure)
and playback is done through the RCA connectors (highlighted in 2).
Figure 8. HiFiBerry audio connectors (picture from HiFiBerry's website)
Note: For more information to order the board, see https://www.hifiberry.com/shop/
boards/hifiberry-dac-adc-pro/.
Control of the PCM1863 is done through I2C3, at address 0x4a.
Control of the PCM5122 is done through I2C3, at address 0x4d.
HRPNUG All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User guide Rev. 2.2 — 16 December 2022
9 / 54
NXP Semiconductors HRPNUG
Harpoon User's Guide
Both the PCM1863 and PCM5122 use i.MX I2S5. The I2S5 is the I2S clock master.
Two oscillators (one for sampling frequencies multiple of 44,100 Hz, one for sampling
frequencies multiple of 48,000 Hz) are present on the HiFiBerry card, and controlled by
PCM5122 GPIOs.
The following diagram shows the HiFiBerry architecture.
Figure 9. HiFiBerry architecture
The PCM1863 and the PCM5122 use the same signal for I2S word select by using SAI
synchronous mode.
3.3 Industrial use case hardware
Harpoon's industrial application may use the following hardware depending on the use
case.
HRPNUG All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User guide Rev. 2.2 — 16 December 2022
10 / 54
Tabla de contenidos
Otros manuales de Hardware de computadora de NXP Semiconductors
NXP Semiconductors
NXP Semiconductors OM13488 Manual de usuario
NXP Semiconductors
NXP Semiconductors MSC8113 Manual de usuario
NXP Semiconductors
NXP Semiconductors freescale MED-GLU Manual de usuario
NXP Semiconductors
NXP Semiconductors QorIQ LS1028A Manual de usuario
NXP Semiconductors
NXP Semiconductors PCA9600 OM6293 Manual de usuario
NXP Semiconductors
NXP Semiconductors KS22 Series Manual de usuario
NXP Semiconductors
NXP Semiconductors FRDM-MCXA153 Manual de usuario
NXP Semiconductors
NXP Semiconductors FRDM-MCXN947 Manual de usuario
NXP Semiconductors
NXP Semiconductors S32K344 Manual de usuario
NXP Semiconductors
NXP Semiconductors OM13489 Manual de usuario
NXP Semiconductors
NXP Semiconductors QorIQ T2080 Manual de usuario
NXP Semiconductors
NXP Semiconductors QorIQ LX2160A Manual de usuario
NXP Semiconductors
NXP Semiconductors QorIQ LS1046A Manual de usuario
NXP Semiconductors
NXP Semiconductors OM15080-K32W Manual de usuario
NXP Semiconductors
NXP Semiconductors UM11653 Manual de usuario
NXP Semiconductors
NXP Semiconductors MCX-N5 EVK Series Manual de usuario
NXP Semiconductors
NXP Semiconductors SLN-VIZNLC-IOT Manual de usuario
NXP Semiconductors
NXP Semiconductors i.MX 6Dual Manual de usuario
NXP Semiconductors
NXP Semiconductors MCIMX93-EVKCM Manual de usuario
NXP Semiconductors
NXP Semiconductors LPC288 Series Manual de usuario
Manuales populares de Hardware de computadora de otras marcas
EMC2
EMC2 VNX Series Manual del propietario
Panasonic
Panasonic DV0PM20105 Manual de usuario
Mitsubishi Electric
Mitsubishi Electric Q81BD-J61BT11 Manual de usuario
Gigabyte
Gigabyte B660M DS3H AX DDR4 Manual de usuario
Raidon
Raidon iT2300 Manual de usuario
National Instruments
National Instruments PXI-8186 Manual de usuario
