Intel CHIPS HiQVideo Series Manual de usuario

ABHiQV

for B65555 & B69000

(Fab. Rev. C)

HiQVideoSeries ABHiQV

Daughtercard (Fab. Rev. C

)

User’s Guide

Revision 1.1

July 1998

This manual is copyrighted by Chips and Technologies, Inc., a subsidiary of Intel Corporation. You may not reproduce, transmit,

transcribe, store in a retrieval system, or translate into any language or computer language, in any form or by any means - elec-

tronic, mechanical, magnetic, optical, chemical, manual, or otherwise - any part of this publication without the express written

permission of Chips and Technologies, Inc., a subsidiary of Intel Corporation.

Restricted Rights Legend

Use, duplication, or disclosure by the Government is subject to restrictions set forth in subparagraph (c)(1)(ii) of the Rights in

Technical Data and Computer Software clause at 252.277-7013.

Trademark Acknowledgment

CHIPS Logo is a registered trademark of Chips and Technologies, Inc., a subsidiary of Intel Corporation.

HiQVideo, is a trademark of Chips and Technologies, Inc., a subsidiary of Intel Corporation.

All other trademarks are the property of their respective holders.

Disclaimer

This document provides general information for the customer. Chips and Technologies, Inc., a subsidiary of Intel Corporation

reserves the right to modify the information contained herein as necessary and the customer should ensure that it has the most

recent revision of the document. CHIPS makes no warranty fortheuse of its products and bears no responsibility for any errors

which may appear in this document. The customer should be on notice that many different parties hold patents on products,

components, and processes within the personal computer industry. Customers should ensure that their use of the products

does not infringe upon anypatents. CHIPS respects thepatentrights of third parties and shallnot participate in direct orindirect

patent infringement.

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ABHiQV (Fab Rev. C)

Subject to Change Without Notice

Revision 1.1 7/15/98

Revision History

Revision Date By Comment

0.1 9/15/97 RG/lnc Internal draft (first Frame document)

1.0 10/22/97 RG/lnc Initial Release

1.1 6/22/98 RG/lnc Amended to highlight B65555 and B69000

Delete reference to 65560

Fab Rev. C

User’s Guide 1

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ABHiQV (Fab Rev. C)

Subject to Change Without Notice

Revision 1.1 7/15/98

Table of Contents

1.0 Product Description........................................................................................................................... 2

2.0 Daughtercard Features..................................................................................................................... 2

3.0 Installation......................................................................................................................................... 2

3.1 General Overview of the Setup Process........................................................................................... 2

3.2 Installation Procedure ....................................................................................................................... 3

4.0 ABHiQV (Fab Rev. C) Configuration Components ........................................................................... 9

4.1 Configuration Switch (S1) and Jumpers (W1 and W3) .....................................................................11

4.2 Top Assembly Check Boxes.............................................................................................................12

4.3 W1 Jumper........................................................................................................................................12

4.4 W2 Jumper........................................................................................................................................12

4.5 W3 Jumper........................................................................................................................................12

4.6 W4 and W5 Test Configuration Jumpers..........................................................................................12

4.7 W6 Jumper........................................................................................................................................13

4.8 Miscellaneous ...................................................................................................................................13

5.0 DKHiQV-PCI DK Board Configuration Components.........................................................................14

6.0 Operation ..........................................................................................................................................14

6.1 Memory Interface..............................................................................................................................14

6.2 STN-DD Buffer..................................................................................................................................15

6.3 Clock.................................................................................................................................................15

6.4 Utilities and Drivers...........................................................................................................................15

7.0 Troubleshooting ................................................................................................................................15

List of Figures

Figure 1: Component Location (Front View)........................................................................................... 9

Figure 2: Component Location (Rear View)............................................................................................ 9

Figure 3: DKHiQV-PCI (Rev. A) Board Jumper Location........................................................................ 10

List of Tables

Table 1: DKHiQV-PCI (Rev. A) Board Configuration Settings for B69000,

TV Out And Multimedia Disabled.................................................................................. 4

Table 2: ABHiQV (Fab. Rev. C) Daughtercard Configuration Settings for B69000,

TV Out And Multimedia Disabled................................................................................... 5

Table 3: DKHiQV-PCI board (Rev. A) Configuration Settings for B65555,

TV out and multimedia disabled..................................................................................... 6

Table 4: ABHiQV (Fab. Rev. C) Daughtercard Configuration Settings for B65555,

TV out and Multimedia Disabled ................................................................................... 7

Table 5: DKHiQV-PCI Jumper configuration settings for Multimedia Enabled on B69000 and B65555. 8

Table 6: DKHiQV-PCI Jumper configuration settings for TV-out Enabled on B69000 and B65555 ....... 8

Table 7: Configuration Settings............................................................................................................... 11

Table 8: Memory Interface Configuration................................................................................................ 14

Table 9: EDO Memory Configuration Types for B65555......................................................................... 15

2 User’s Guide

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Subject to Change Without Notice

Revision 1.1 7/15/98

HiQVideoSeries ABHiQV Daughtercard

(Fab. Rev. C) PCB Design Documentation

1.0 Product Description

The ABHiQV daughtercard is capable of being used with the B65555 and B69000 graphics controllers.

The B65555 is designed to be used with EDO DRAM whereas the B69000 has 2MB of SDRAM embed-

ded within the controller and does not use external DRAM components. Both combinations of controller

and memory can be accommodated by the ABHiQV daughtercard.

The design kits for these products in the PCI bus environment all use a common board known as the

DKHIQV-PCI Board. The ABHiQV daughtercard containing HiQVideo Controller is installed onto the

DKHiQV-PCI board to complete the design kit. This User’s Guide describes the ABHiQV (Fab. Rev. C)

daughtercard.

2.0 Daughtercard Features

• Works with the DKHiQV-PCI DK board

• EDO memory support

• On-board 3.3V 64Kx8 DIP-socketed BIOS

• 8-position DIP switch used to latch configuration bits at power-on

• All voltage sources are 3.3V

• Supports test mode control for the B69000

• Support for two external oscillators for MCLK and DCLK

• Filtered memory power

• On-card test points

• Reset strapping option for AA6 (see Table 7)

3.0 Installation

3.1 General Overview of the Setup Process

The ABHiQV daughtercard is normally shipped with a VGA BIOS EPROM already installed (U2; refer

to Figure 1). This BIOS has been programmed to support a limited set of resolutions and is intended

primarily to allow a CRT monitor to display the system status as the system boots up.

To set the VGA BIOS and drivers for a specific flat panel, the user must use the CHIPS BIOS Modifica-

tion Program (BMP) to configure the VGA BIOS (usually a RAM-loadable BIOS) to match the specifica-

tions of the panel. Refer to the corresponding CHIPS BIOS and driver user’s manual for details of how

to use the BMP. There is no need to remove or modify the pre-installed VGA BIOS EPROM when using

a RAM-loadable BIOS.

It should be verified that the DK board works correctly with a CRT interface using the pre-installed VGA

BIOS ROM before attempting to install a flat panel.

User’s Guide 3

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Revision 1.1 7/15/98

3.2 Installation Procedure

1. Unpack the ABHiQV (Fab Rev. C) daughtercard and visually inspect for any damage that may have

occurred during shipping.

2. Read this ABHiQV (Fab Rev. C) daughtercard User’s Guide to become familiar with the board opera-

tions.

3. Read the DKHiQV-PCI User’s Guide to become familiar with the board operations.

4. Read the MM6555x (Fab. Rev. C) Multimedia Daughtercard User’s Guide to become familiar with

board operations.

5. Read the datasheet applicable to the graphics controller being used.

6. Verify the appropriate settings for the DKHiQV-PCI board and the ABHiQV (Fab Rev. C) daughtercard

as shown in tables one through six. Refer to Figures 1and 3 for jumper locations.

Caution: Check to ensure all voltage sources are set to 3.3V (consult the DKHiQV-PCI schematics).

Note: For TV-out and multimedia settings, refer to Tables 5 and 6.

7. Plug the ABHiQV (Fab Rev. C) daughtercard onto the DKHiQV-PCI board. The connectors/header in

the ABHiQV daughtercard is composed of eight 2X16 header-socket-type pins (P1).

8. Power down the host system and plug the DKHiQV-PCI board into an available PCI slot on the mother-

board.

9. Connect the monitor to the 15-pin VGA connector. The default configuration of the DK board is for CRT

display.

10. Turn on the system and observe the sign-on message. The sign-on message does not appear, turn

off the system and follow the instructions in the troubleshooting section.

11. Load the proper driver, BIOS and utilities to activate the ABHiQV daughtercard.

4 User’s Guide

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ABHiQV

(Fab Rev. C)

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Revision 1.1 7/15/98

Table 1: DKHiQV-PCI (Rev. A) Board Configuration Settings For B69000,

TV Out And Multimedia Disabled

Note: Refer to Figure 3 for jumper locations.

Notes: *Schematic reference and functional category

**’on’ - jumper plug is installed

’off’ - jumper plug is not installed

1. Set potentiometer R59 for panel requirements.

2. Set potentiometer R75 for 3.3V on W24, pin 3.

3. Set potentiometer R76 for 3.3V on W25, pin 3.

4. Set potentiometer R82 for panel requirements.

Jumper Function* State** Jumper Function* State**

W1 sh.2, STANDBY off W33 sh.4, BVCC55X 2-3

W2 sh.5, TV out off W34 sh.4, XVCC55X 2-3

W3 sh.2, 14MHz off W35 sh.4, 3VMAIN 1-2

W4 sh.5, TV out 1-2 W36 sh.2, CVCC 1-2

W5 sh.2, TV out 1-2 W37 sh.5, M/PCLK 2-3

W6 sh.5, TV out off W38 sh.5, Panel VDD 2-3

W7 sh.5, DDC pull up 2-3 W39 sh.5, VEESAFE by R82 off

W8 sh.2, TV out off W40 sh.2, int # on

W9 sh.2, GVCC 2-3 JP1 sh.5, CRTdrive off

W10 sh.3, PCI on JP2 sh.5, CRTdrive off

W11 sh.3, PCI off JP3 sh.5, CRTdrive off

W12 sh.5, VEESAFE off JP4 sh.5, Panel VCC off

W13 sh.5, VEESAFE off JP5 sh.2, I2C All off

W14 sh.5, VEESAFE on JP6 sh.2, I2C All off

W15 sh.5,VDDSAFE on JP7 sh.2, DDC 1-2 & 3-4

W16 sh.5,VDDSAFE off JP8 sh.2, DDC All off

W17 sh.5,VDDSAFE off JP9 sh.2, GPIO All off

W18 sh.5, +12SAVE off JP10 sh.2, GPIO 1-4 & 2-3

W19 sh.5, +12SAVE on JP11 sh.2, GPIO 1-4 & 2-3

W20 sh.5, +12SAVE off JP12 sh.2, GPIO 3-4

W21 sh.5, VEESAFE all off JP13 sh.2, CSYNC/HSYNC off

W23 sh.4, 3VREG2 off JP15 sh.2, P34 on

W24 sh.4, PVCC/SVCC 2-3 JP16 sh.2, P35 on

W25 sh.4, PVCC/SVCC 2-3 JP17 sh.2, P32 on

W26 sh.4, OCSVCC 1-2 JP18 sh.2, P30 on

W27 sh.4, AVCC55X 2-3 JP19 sh.2, P33 on

W28 sh.4, IVCC55X 2-3 JP20 sh.2, P31 on

W29 sh.4, IVCC55X 2-3 R59 sh.5, VEESAFE Note (1)

W30 sh.4, DVCC55X 2-3 R75 sh.4, 3VREG2 Note (2)

W31 sh.4, MVCC55X 2-3 R76 sh.4, 3VMAIN Note (3)

W32 sh.4, RAMVCC 2-3 R82 sh. 5, VEESAFE Note (4)

User’s Guide 5

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ABHiQV (Fab Rev. C)

Subject to Change Without Notice

Revision 1.1 7/15/98

Table 2: ABHiQV (Fab. Rev. C) Daughtercard Configuration Settings for B69000,

TV Out And Multimedia Disabled

Note: Refer to Figure 1 for jumper locations.

Notes: *Schematic reference and functional category

**’on’ - jumper plug is installed

’off’ - jumper plug is not installed

Jumper Function* State**

W1 sh.1, EXT CLK off

W2 sh.1, BVCC55X off

W3 sh.1, ACTI/ENABLK off

W4 sh.1, TMD 0 off

W5 sh.1, TMD1 off

W6 sh.2, MVCC55X 1-2

Switch Position Function* State**

S1[1] sh.1, CFG 15 off

S1[2] sh.1, PID 3 off

S1[3] sh.1, PID 2 off

S1[4] sh.1, PID 1 off

S1[5] sh.1, PID 0 off

S1[6] sh.1, PCI off

S1[7] sh.1, CLK - TST off

S1[8] sh.1, CFG 9 off

6 User’s Guide

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ABHiQV

(Fab Rev. C)

Subject to Change Without Notice

Revision 1.1 7/15/98

Notes: *Schematic reference and functional

category

**’on’ - jumper plug is installed

’off’ - jumper plug is not installed

1. Set potentiometer R59 for panel requirements.

2. Set potentiometer R75 for 3.3V on W24, pin 3.

3. Set potentiometer R76 for 3.3V on W25, pin 3.

4. Set potentiometer R82 for panel requirements.

Table 3: DKHiQV-PCI board (Rev. A) Configuration Settings for B65555,

TV out and multimedia disabled

Note: Refer to Figure 3 for jumper locations.

Jumper Function* State** Jumper Function* State**

W1 sh.2, STANDBY off W33 sh.4, BVCC55X 2-3

W2 sh.5, TV out off W34 sh.4, XVCC55X 2-3

W3 sh.2, 14MHz off W35 sh.4, 3VMAIN 1-2

W4 sh.5, TV out 1-2 W36 sh.2, CVCC 1-2

W5 sh.2, TV out 1-2 W37 sh.5, M/PCLK 2-3

W6 sh.5, TV out off W38 sh.5, Panel VDD 2-3

W7 sh.5, DDC pull up 2-3 W39 sh.5, VEESAFE by R82 off

W8 sh.2, TV out off W40 sh.2, interrupt on

W9 sh.2, GVCC 2-3 JP1 sh.5, CRTdrive off

W10 sh.3, PCI on JP2 sh.5, CRTdrive off

W11 sh.3, PCI off JP3 sh.5, CRTdrive off

W12 sh.5, VEESAFE off JP4 sh.5, Panel VCC off

W13 sh.5, VEESAFE off JP5 sh.2, I2C All off

W14 sh.5, VEESAFE on JP6 sh.2, I2C All off

W15 sh.5,VDDSAFE on JP7 sh.2, DDC 1-2 & 3-4

W16 sh.5,VDDSAFE off JP8 sh.2, DDC All off

W17 sh.5,VDDSAFE off JP9 sh.2, GPIO All off

W18 sh.5, +12SAVE off JP10 sh.2, GPIO 1-4 & 2-3

W19 sh.5, +12SAVE on JP11 sh.2, GPIO 1-4 & 2-3

W20 sh.5, +12SAVE off JP12 sh.2, GPIO 3-4

W21 sh.5, VEESAFE All off JP13 sh.2, CSYNC/HSYNC off

W23 sh.4, 3VREG2 off JP15 sh.2, P34 on

W24 sh.4, PVCC/SVCC 2-3 JP16 sh.2, P35 on

W25 sh.4, PVCC/SVCC 2-3 JP17 sh.2, P32 on

W26 sh.4, OCSVCC 1-2 JP18 sh.2, P30 on

W27 sh.4, AVCC55X 2-3 JP19 sh.2, P33 on

W28 sh.4, IVCC55X 2-3 JP20 sh.2, P31 on

W29 sh.4, IVCC55X 2-3 R59 sh.5, VEESAFE Note (1)

W30 sh.4, DVCC55X 2-3 R75 sh.4, 3VREG2 Note (2)

W31 sh.4, MVCC55X 2-3 R76 sh.4, 3VMAIN Note (3)

W32 sh.4, RAMVCC 2-3 R82 sh. 5, VEESAFE Note (4)

User’s Guide 7

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ABHiQV (Fab Rev. C)

Subject to Change Without Notice

Revision 1.1 7/15/98

Notes:*Schematic reference and functional category

**’on’ - jumper plug is installed

’off’ - jumper plug is not installed

Table 4: ABHiQV (Fab. Rev. C) Daughtercard Configuration Settings for B65555,

TV out and Multimedia Disabled

Note: Refer to Figure 1 for jumper locations

Jumper Function* State**

W1 sh.1, EXT CLK off

W2 sh.1, BVCC55X off

W3 sh.1, ACTI/ENABLK off

W4 sh.1, TMD 0 off

W5 sh.1, TMD1 off

W6 sh.2, MVCC55X 2-3

Switch Position Function* State**

S1[1] sh.1, CFG 15 off

S1[2] sh.1, PID 3 off

S1[3] sh.1, PID 2 off

S1[4] sh.1, PID 1 off

S1[5] sh.1, PID 0 off

S1[6] sh.1, PCI off

S1[7] sh.1, CLK - TST off

S1[8] sh.1, CFG 9 off

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