Epson S5U13705B00C Manual de usuario

Rev. 3.1

S1D13705 Embedded Memory LCD Controller

S5U13705B00C Rev. 2.0

Evaluation Board User Manual

Document Number: X27A-G-014-03.1

NOTICE

No part of this material may be reproduced or duplicated in any form or by any means without the written permission

of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does

not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application

or use in any product or circuit and, further, there is no representation that this material is applicable to products

requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights

is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance

with this material will be free from any patent or copyright infringement of a third party. When exporting the

products or technology described in this material, you should comply with the applicable export control laws and

regulations and follow the procedures required by such laws and regulations. You are requested not to use, to resell,

to export and/or to otherwise dispose of the products (and any technical information furnished, if any) for the devel-

opment and/or manufacture of weapon of mass destruction or for other military purposes.

All brands or product names mentioned herein are trademarks and/or registered trademarks of their respective

companies.

Evaluation Board/Kit and Development Tool Important Notice

1. This evaluation board/kit or development tool is designed for use for engineering evaluation, demonstration, or develop-

ment purposes only. Do not use it for other purposes. It is not intended to meet the requirements of design for finished

products.

2. This evaluation board/kit or development tool is intended for use by an electronics engineer and is not a consumer product.

The user should use it properly and in a safe manner. Seiko Epson does not assume any responsibility or liability of any

kind of damage and/or fire caused by the use of it. The user should cease to use it when any abnormal issue occurs even

during proper and safe use.

3. The part used for this evaluation board/kit or development tool may be changed without any notice.

2Seiko Epson Corporation S5U13705B00C Rev 2.0 PCI Evaluation Board

Rev. 3.1

S5U13705B00C Rev 2.0 PCI Evaluation Board Seiko Epson Corporation 3

Rev. 3.1

Table of Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Installation and Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1 Configuration DIP Switches . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.2 Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 CPU Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.1 CPU Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.2 CPU Bus Connector Pin Mapping . . . . . . . . . . . . . . . . . . . . . . 14

5 LCD Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6 Technical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6.1 PCI Bus Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6.2 Direct Host Bus Interface Support . . . . . . . . . . . . . . . . . . . . . . 17

6.3 S1D13705 Embedded Memory . . . . . . . . . . . . . . . . . . . . . . . . 17

6.4 Adjustable LCD Panel Positive Power Supply (VDDH) . . . . . . . . . . . . . . 17

6.5 Adjustable LCD Panel Negative Power Supply (VLCD) . . . . . . . . . . . . . . 18

6.6 Passive/Active LCD Panel Support . . . . . . . . . . . . . . . . . . . . . . 18

6.7 Power Save Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

6.8 Clock Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7 Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

8 Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

9 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

10 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

11 Change Record . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

12 Sales and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4Seiko Epson Corporation S5U13705B00C Rev 2.0 PCI Evaluation Board

Rev. 3.1

THIS PAGE LEFT BLANK

Introduction

S5U13705B00C Rev 2.0 PCI Evaluation Board Seiko Epson Corporation 5

Rev. 3.1

1 Introduction

This manual describes the setup and operation of the S5U13705B00C Rev. 2.0 Evaluation

Board. The board is designed as an evaluation platform for the S1D13705 Embedded

Memory LCD Controller.

This document is updated as appropriate. Please check for the latest revision of this

document before beginning any development. The latest revision can be downloaded at

vdc.epson.com.

We appreciate your comments on our documentation. Please contact us via email at

vdc-document[email protected]pson.com.

Features

6Seiko Epson Corporation S5U13705B00C Rev 2.0 PCI Evaluation Board

Rev. 3.1

2 Features

Following are some features of the S5U13705B00C Rev. 2.0 Evaluation Board:

• 80-pin TQFP S1D13705F00A Embedded Memory LCD Controller with 80K bytes of

embedded SRAM.

• Headers for connecting to various Host Bus Interfaces.

• Configuration options.

• Adjustable positive LCD bias power supply from +23V to +40V.

• Adjustable negative LCD bias power supply from -23V to -14V.

• 4/8-bit 3.3V or 5V single monochrome or color passive LCD panel support.

• 9/12-bit 3.3V or 5V active matrix TFT LCD panel support.

• Software and hardware initiated power save mode.

• Selectable clock source for bus clock and CLKI.

• External oscillator for CLKI (up to 50MHz with internal clock divider or 25MHz with

no internal clock divider) and BUSCLK.

Installation and Configuration

S5U13705B00C Rev 2.0 PCI Evaluation Board Seiko Epson Corporation 7

Rev. 3.1

3 Installation and Configuration

The S5U13705B00C is designed to support as many platforms as possible. The

S5U13705B00C incorporates a DIP switch and seven jumpers which allow both evaluation

board and S1D13705 LCD controller to be configured for a specified evaluation platform.

3.1 Configuration DIP Switches

The S1D13705 has configuration inputs (CNF[3:0]) and BS# input, which are read on the

rising edge of RESET#. In order to configure the S1D13705 for multiple Host Bus Inter-

faces a six-position DIP switch (SW1) is required. The following figure shows the location

of DIP switch SW1 on the S5U13705B00C.

Figure 3-1: Configuration DIP Switch (SW1) Location

DIP Switch - SW1

Installation and Configuration

8Seiko Epson Corporation S5U13705B00C Rev 2.0 PCI Evaluation Board

Rev. 3.1

The S1D13705 has 4 configuration inputs (CONF[3:0]) and BS# input, which are read on

the rising edge of RESET#. All S1D13705 configuration inputs and BS# input are fully

configurable using a six position DIP switch as described below and a jumper for BS#.

Note

1The selection between Generic #1 and Generic #2 is made with JP3.

Table 3-1: Configuration DIP Switch Settings

Switch S1D13705

Signal

Value on this pin at rising edge of RESET# is used to configure:

Open (Off/1) Closed (On/0)

SW1-[3:1] CNF[2:0]

Select host bus interface as follows:

CNF2 CNF1 CNF0 Host Bus Interface

000 SH-4

001 SH-3

010 Reserved

0 1 1 MC68K #1

100 Reserved

1 0 1 MC68K #2

110 Reserved

1 1 1 Generic #1/Generic #21

Note: The host bus interface is 16-bit.

SW1-4 CNF3 Big Endian bus interface Little Endian bus interface

SW1-5 Not Used Not Used

SW1-6 GPIO0 Hardware Suspend Enable Hardware Suspend Disable

= Required settings when used with PCI Bridge FPGA

Installation and Configuration

S5U13705B00C Rev 2.0 PCI Evaluation Board Seiko Epson Corporation 9

Rev. 3.1

3.2 Configuration Jumpers

The S5U13705B00C has six jumper blocks which configure various setting on the board.

The jumper positions for each function are shown below.

JP1 - IOVDD Selection

JP1 selects the IOVDD voltage for S1D13705.

When the jumper is in position 1-2, IOVDD is 3.3V. This settings must be used for a 3.3V

host CPU system.

When the jumper is in position 2-3, IOVDD is 5.0V. This setting must be used for a 5.0V

host CPU system.

Note

For PCI host, JP1 can be set in either position.

Figure 3-2: Configuration Jumper (JP1) Location

Table 3-2: Jumper Summary

Jumper Function Position 1-2 Position 2-3 No Jumper

JP1 IOVDD Selection +3.3V IOVDD +5.0V IOVDD n/a

JP2 Bus Clock Selection External Oscillator (U7) From Host CPU n/a

JP3 BS# Signal Selection Pulled Down to GND (for

Generic #1 Interface)

Pulled High to IOVDD (for

Generic #2 Interface)

For SH-3, SH-4, MC68k #1

and MC68K #2 bus

JP4 LCD Panel Voltage Selection +3.3V LCDVCC +5.0V LCDVCC n/a

JP5 PCI Bridge FPGA Disabled for non-PCI host n/a Enabled for PCI host

JP6 LCDPWR Polarity Active Low Active High n/a

JP7 CLKI Selection External Oscillator (U2) BCLK n/a

= Required settings when used with PCI Bridge FPGA

JP1

3.3 Volt 5.0 Volt

IOVDD IOVDD

Installation and Configuration

10 Seiko Epson Corporation S5U13705B00C Rev 2.0 PCI Evaluation Board

Rev. 3.1

JP2 - Bus Clock Selection

JP2 selects the source for BCLK input on S1D13705.

When the jumper is in position 1-2, the BCLK source is the external oscillator U7. This

position must be used for PCI-host.

When the jumper is in position 2-3, the BCLK must be provided by the host CPU. This

setting may be used for non-PCI host.

Figure 3-3: Configuration Jumper (JP2) Location

JP3 - BS# Signal Selection

JP3 is used to pull up or down BS# input of S1D13705 for selection of Generic #1 or

Generic #2 interface.

When the jumper is in position 1-2, BS# is pulled down to select Generic #1 interface.

When the jumper is in position 2-3, BS# is pulled high to IOVDD, to select Generic #2

interface.

For SH-3, SH-4, MC68K #1 and MC68K #2 buses, which use BS# line, the jumper should

not be installed.

Figure 3-4: Configuration Jumper (JP3) Location

JP2

BCLK

External

Oscillator (U7) Provided

by Host

JP3

BS# BS#

Pulled Low Pulled High

Otros manuales para S5U13705B00C

Tabla de contenidos

Otros manuales de Placa madre de Epson

Epson

Epson S5U13L02P00C100 Manual de usuario

Epson

Epson SG-WRITERII Instrucciones de uso

Epson

Epson S5U13706B00C Manual de usuario

Epson

Epson S5U13A04B00C Manual de usuario

Epson

Epson S1V30000 Series Guía del usuario

Epson

Epson S5U13U11 Manual de usuario

Epson

Epson S1D13709 Manual de usuario

Epson

Epson S5U13517P00C100 Manual de usuario

Epson

Epson S5U13742P00C100 Manual de usuario

Epson

Epson S5U13781R00C100 Manual de usuario

Epson

Epson S1V30120 Manual de usuario

Epson

Epson S5U13709P00C100 Manual de usuario

Epson

Epson S5U13A05B00C Manual de usuario

Epson

Epson S1D13706 Manual de usuario

Epson

Epson S5U13781R01C100 Manual de usuario

Epson

Epson S5U13A04B00C Manual de usuario

Epson

Epson S1S65010 Manual de usuario

Epson

Epson S5U1C17M03T Manual de usuario

Epson

Epson S5U13L01P00C100 Manual de usuario

Epson

Epson S5U1C17F57T Manual de usuario

Epson

Epson S5U13A05B00C Manual de usuario

Epson

Epson S5U1C31D51T1 Manual de usuario

Epson

Epson S5U13U00P00C100 Manual de usuario

Epson

Epson S1V30333 Manual de usuario

Manuales populares de Placa madre de otras marcas

DFI

DFI SD170 Manual de usuario

ASROCK

ASROCK ROMED8-2T Manual de usuario

Asus

Asus P2L97A Manual de usuario

Winmate

Winmate IC70 Manual de usuario

Asus

Asus MES-B Manual de usuario

Grantech

Grantech SYS8F377VGGA-3OMN Manual de usuario

Telit Wireless Solutions

Telit Wireless Solutions SL869-3DR Manual de usuario

Gigabyte

Gigabyte GA-9IVDT Manual de usuario

Texas Instruments

Texas Instruments ADS8372EVM Manual de usuario

Commell

Commell MS-C73 Manual de usuario

IBT Technologies

IBT Technologies MB860 Manual de usuario

Nvidia

Nvidia TEGRA DG-04927-001_V01 Manual de usuario

Biostar

Biostar M7VIT Bravo Instrucciones de funcionamiento e instalación

Intel

Intel D33217CK Manual de usuario

Asus

Asus F1A55-M LX PLUS R2.0 Manual de usuario

EPC

EPC EPC9147C Manual de usuario

Asus

Asus EX-B760M-V5 D4 Manual de usuario

EPOX

EPOX MU-8KHA0010 Manual de usuario