AMD Xilinx VCU128 Manual de usuario

VCU128 Evaluaon Board

User Guide

UG1302 (v1.2) May 6, 2022

Xilinx is creating an environment where employees, customers, and

partners feel welcome and included. To that end, we’re removing non-

inclusive language from our products and related collateral. We’ve

launched an internal initiative to remove language that could exclude

people or reinforce historical biases, including terms embedded in our

software and IPs. You may still find examples of non-inclusive

language in our older products as we work to make these changes and

align with evolving industry standards. Follow this link for more

information.

Table of Contents

Chapter 1: Introduction.............................................................................................. 4

Overview.......................................................................................................................................4

Additional Resources.................................................................................................................. 4

Block Diagram..............................................................................................................................5

Board Features............................................................................................................................ 5

Board Specifications....................................................................................................................7

Chapter 2: Board Setup and Configuration......................................................8

Standard ESD Measures............................................................................................................. 8

Board Component Location.......................................................................................................9

Default Switch and Jumper Settings....................................................................................... 12

Installing the Board in a PC Chassis........................................................................................13

FPGA Configuration...................................................................................................................15

Chapter 3: Board Component Descriptions................................................... 17

Overview.....................................................................................................................................17

Component Descriptions......................................................................................................... 17

Appendix A: VITA 57.4 FMCP Connector Pinouts......................................... 92

Overview.....................................................................................................................................92

Appendix B: Xilinx Constraints File.................................................................... 93

Overview.....................................................................................................................................93

Appendix C: Regulatory and Compliance Information........................... 94

Overview.....................................................................................................................................94

CE Directives.............................................................................................................................. 94

CE Standards..............................................................................................................................94

Compliance Markings............................................................................................................... 95

Appendix D: Additional Resources and Legal Notices.............................96

Xilinx Resources.........................................................................................................................96

UG1302 (v1.2) May 6, 2022 www.xilinx.com

VCU128 Board User Guide 2

Send Feedback

Documentation Navigator and Design Hubs.........................................................................96

References..................................................................................................................................97

Revision History.........................................................................................................................98

Please Read: Important Legal Notices................................................................................... 99

UG1302 (v1.2) May 6, 2022 www.xilinx.com

VCU128 Board User Guide 3

Send Feedback

Chapter 1

Introduction

Overview

The VCU128 board incorporates the VU37P high bandwidth memory (HBM) FPGA, which uses

stacked silicon interconnect (SSI) technology to add HBM die next to the FPGA die on the

package substrate. The VCU128 evaluaon board for the Xilinx® Virtex® UltraScale+™ FPGA

provides a hardware environment for developing and evaluang designs targeng the

UltraScale+ XCVU37P-2FSVH2892E device. The VCU128 evaluaon board is equipped with

many of the common board-level features needed for design development as listed here:

• DDR4, RLD-3, and QDR-IV component memory

• Ganged small form-factor pluggable (QSFP28) connectors

• Sixteen-lane PCI Express® interface

• Ethernet PHY

• General purpose I/O

• UART interface

Addional features can be supported using modules compable with the VITA-57.4 (FMCP

HSPC) connector on the VCU128 board.

Additional Resources

See Appendix D: Addional Resources and Legal Noces for references to documents, les, and

resources relevant to the VCU128 evaluaon board.

Chapter 1: Introduction

UG1302 (v1.2) May 6, 2022 www.xilinx.com

VCU128 Board User Guide 4

Send Feedback

Block Diagram

A block diagram of the VCU128 evaluaon board is shown in the following gure.

Figure 1: Evaluation Board Block Diagram

233

not used

232

not used

231

not used

230

not used

229

not used

228

not used

227

226

225

224

235

not used

234

not used

70 71 72 75 74 73 135

133

not used

134

132

131

129

130

not used

128

127

126

125

124

0HBM_43_PWR HBM_43_PWR

XCVU37P-FSVH2892

68 HBM_83

Not

used

67 64 HBM_43

Not

used

65 66

36-bit QDR-IV SDRAM

(shown at banks 68, 69)

36-bit DQB-port

FMCP HSPC

LA[00:33]

72-bit RLD-3 (2x32Mx36)

MT44K32M36RB-107E

Not used

QSFP1 TX/RX[1:4]

QSFP1_SI570_CLOCK

QSFP2 TX/RX[1:4]

QSFP2_SI570_CLOCK

SI5328_CLOCK1

QSFP3 TX/RX[1:4]

QSFP3_SI570_CLOCK

SI5328_CLOCK2

QSFP4 TX/RX[1:4]

QSFP4_SI570_CLOCK

SMA_REFCLK_INPUT

FMCP_HSPC_DP[20:23]

FMCP_HSPC_GBTCLK5

FMCP_HSPC_DP[16:19]

FMCP_HSPC_GBTCLK4

FMCP_HSPC_DP[12:15]

FMCP_HSPC_GBTCLK3

FMCP_HSPC_DP[8:11]

FMCP_HSPC_GBTCLK2

FMCP_HSPC_DP[4:7]

FMCP_HSPC_GBTCLK1

FMCP_HSPC_DP[0:3]

FMCP_HSPC_GBTCLK0

72-bit DDR4 Comp. Memory

(4.5X512MX16)

MT40A512M16LY-075E

GPIO 1.8V

ENET

LED[0:7]

PL_I2C0 BUS

UART0, UART1

QSFP1, QSFP4 CTRL

SMA_CLK OUT(P/N)

SYSCTLR_UCA1 (TX/RX)

36-bit DQA-port + common

36-bit QDR-IV SDRAM 4Mx36 Dual-Port

CY7C4142KV13_106FCXC

36-bit DQB-port

Bank 70

PCIE_EP_TX/RX[4:7]

PCIE_EP_TX/RX[0:3]

PCIE_CLK2

PCIE_EP_TX/RX[8:11]

PCIE_CLK1

PCIE_EP_TX/RX[12:15]

INIT LED

DONE LED

PROG_B PB

1.5V BATT.

QSPI 2Gb

System Controller

XC7Z010CLG225

GPIO

X21647-112818

Board Features

The VCU128 evaluaon board features are listed here. Detailed informaon for each feature is

provided in Chapter 3: Board Component Descripons.

• Virtex® UltraScale+™ XCVU37P-2FSVH2892E device

• Zynq®-7000 SoC XC7Z010 based system controller

• 4.5 GB DDR4 72-bit component memory interface (4.5 x [512 Mb x 16])

Chapter 1: Introduction

UG1302 (v1.2) May 6, 2022 www.xilinx.com

VCU128 Board User Guide 5

Send Feedback

• 144 Mb 36-bit dual-port QDR-IV component memory interface (1 x [4M x 36])

• 288 MB 72-bit RLD3 component memory interface (2 x [1.125 Gb x 36])

• 2 Gb Quad SPI ash conguraon memory

• QSFPF28 - Sixteen (16) GTY transceivers are allocated for a 1x4 QSFP cage

• USB JTAG interface (FTDI FT4232HL with a micro-AB USB connector)

• Clock sources:

○SMA I/F clocks:

- FPGA bank 67 SMA clock P/N

○QSFP clocks:

- Four Si570 I2C programmable clock oscillators (156.25 MHz default)

- QSFP clock recovery Si5328 input to GTY132 and GTY134

- QSFP external SMA di. clock input to GTY131

○Memory I/F clocks:

- Three SiT9120A xed 100 MHz LVDS clock oscillators

○PCIe® I/F clock:

- Fixed 100 MHz HCSL clock from PCI Express® edge input to 1-to-2 clock buer wired

to GTY225 and GTY227

○System controller clock:

- SiT8008A 33.33 MHz single-ended clock oscillator

• 96 GTY transceivers (24 Quads)

○FMCP HSPC connector (twenty-four GTY transceivers)

○4x28 Gb/s QSFP+ connectors (eight GTY transceivers)

○PCIe 16-lane edge connector (sixteen GTY transceivers)

○Not used (forty-eight GTY transceivers)

• PCI Express® Endpoint connecvity

○Gen1 (x1, x2, x4, x8, x16)

○Gen2 (x1, x2, x4, x8, x16)

○Gen3 (x1, x2, x4, x8, x16)

○Dual Gen4 (x1, x2, x4, x8)

• Ethernet PHY SGMII interface with RJ-45 connector

• Dual USB-to-UART bridge with micro-B USB connector (shared FTDI FT4232HL)

Chapter 1: Introduction

UG1302 (v1.2) May 6, 2022 www.xilinx.com

VCU128 Board User Guide 6

Send Feedback

• I2C bus

• Status LEDs

• User I/O (1 x push-buon switch, 8 x LED)

• VITA 57.4 FMC+ HSPC connector (DP[0:23], LA[0:33])

• Power management with I2C voltage monitoring through Intersil power controllers and GUI

•Conguraon opons:

○Quad SPI ash memory

○USB JTAG I/F (FTDI FT4232HL)

○Plaorm cable USB II interface 2x7 2 mm keyed connector

Board Specifications

Dimensions

Height: 7.53 inch (19.14 cm)

Length: 9.50 inch (24.13 cm)

Thickness (±5%): 0.061 inch (0.1549 cm)

Note: A 3D model of this board is not available.

IMPORTANT! The VCU128 board height exceeds the standard 4.376-inch (11.15 cm) height of a

PCI Express® card.

Environmental

Temperature

Operang: 0°C to +45°C, Storage: -25°C to +60°C

Humidity

10% to 90% non-condensing

Operating Voltage

+12 VDC

Chapter 1: Introduction

UG1302 (v1.2) May 6, 2022 www.xilinx.com

VCU128 Board User Guide 7

Send Feedback

Chapter 2

Board Setup and Configuration

Standard ESD Measures

CAUTION! ESD can damage electronic components when they are improperly handled, and can result in

total or intermient failures. Always follow ESD-prevenon procedures when removing and replacing

components.

To prevent ESD damage:

•Aach a wrist strap to an unpainted metal surface of your hardware to prevent electrostac

discharge from damaging your hardware.

• When you are using a wrist strap, follow all electrical safety procedures. A wrist strap is for

stac control. It does not increase or decrease your risk of receiving electric shock when you

are using or working on electrical equipment.

• If you do not have a wrist strap, before you remove the product from ESD packaging and

installing or replacing hardware, touch an unpainted metal surface of the system for a

minimum of ve seconds.

• Do not remove the device from the anstac bag unl you are ready to install the device in

the system.

• With the device sll in its anstac bag, touch it to the metal frame of the system.

• Grasp cards and boards by the edges. Avoid touching the components and gold connectors on

the adapter.

• If you need to lay the device down while it is out of the anstac bag, lay it on the anstac

bag. Before you pick it up again, touch the anstac bag and the metal frame of the system at

the same me.

• Handle the devices carefully to prevent permanent damage.

Chapter 2: Board Setup and Configuration

UG1302 (v1.2) May 6, 2022 www.xilinx.com

VCU128 Board User Guide 8

Send Feedback

Board Component Location

The following gure shows the VCU128 board component locaons. Each numbered component

shown in the gure is keyed to the table in Board Component Descripons.

IMPORTANT! The board component locaons gure is for visual reference only and might not reect the

current revision of the board.

IMPORTANT! There could be mulple revisions of this board. The specic details concerning the

dierences between revisions are not captured in this document. This document is not intended to be a

reference design guide and the informaon herein should not be used as such. Always refer to the

schemac, layout, and XDC les of the specic VCU128 version of interest for such details.

Figure 2: Evaluation Board Component Locations

27 38

00 Round callout references a component

on the front side of the board

Square callout references a component

on the back side of the board

26 36

34 34

21 7

20 20

X22144-121718

Chapter 2: Board Setup and Configuration

UG1302 (v1.2) May 6, 2022 www.xilinx.com

VCU128 Board User Guide 9

Send Feedback

Board Component Descriptions

The following table idenes the components, references the respecve schemac page

numbers, and links to a detailed funconal descripon of the components and board features in

Chapter 3: Board Component Descripons.

Table 1: Board Component Descriptions

Callout Feature [U#] = Bottom Notes

Schematic

Page

Number

1Virtex UltraScale+ XCVU37P-2FSVH2892E

Device (with fan-sink on soldered FPGA)

XCVU37P-2FSVH2892E

Cofan 30-4811

2 GTY transceivers, Right-side Quads (twelve

quads)

Embedded within FPGA U1 14-15

3 GTY transceivers, Left-side Quads (twelve

quads)

Embedded within FPGA U1 16-17

4DDR4 Component Memory, 72-bit DDR4

component memory I/F, (U17-U19), [U73,

U74]

5 x Micron MT40A256M16GE-075E 24-26

5RLD3 Component Memory, RLD3 72-bit

component memory I/F (U37, U39)

2 x Micron MT44K32M36RB-107E 29-30

6QDR4 Component Memory (U40) Cypress CY7C4142KV13-106FCXC 27

7Quad SPI Flash Memory (U46) Micron MT25QU02GCBB8E12-0SIT 3

8System Controller, Zynq®-7000 SoC (U42) XC7Z010CLG225 48-50

9 System Controller Quad SPI Flash Memory

[U89]

Micron MT25QU02GCBB8E12-0SIT 49

10 HBM/ DDR4 Component Memory I/F clock,

fixed 100 MHz LVDS [U76]

SiTime SIT9120AI-2D3-33E100.0000 32

11 RLD3 Component Memory I/F clock, fixed

100 MHz LVDS (U45)

SiTime SIT9120AI-2D3-33E100.0000 32

12 QDR4 Component Memory I/F clock, fixed

100 MHz LVDS [U96]

SiTime SIT9120AI-2D3-33E100.0000 32

13 Programmable QSFP1 Clock I2C, LVDS

[U95]

Silicon Labs SI570BAB0000544DG

(default 156.250 MHz)

14 Programmable QSFP2 Clock I2C, LVDS

[U90]

Silicon Labs SI570BAB0000544DG

(default 156.250 MHz)

15 Programmable QSFP3 Clock I2C, LVDS

[U82]

Silicon Labs SI570BAB0000544DG

(default 156.250 MHz)

16 Programmable QSFP4 Clock I2C, LVDS

[U80]

Silicon Labs SI570BAB0000544DG

(default 156.250 MHz)

17 QSFP Jitter Attenuated Clock, [U87] Silicon Labs SI5328B-C-GMR 40

18 User QSFP SMA Clock pair J24(P)/J26(N)

input to XCVU37P U1 GTY131

MGTREFCLK1P/N

Rosenberger 32K10K-400L5 12

19 Four 28 Gb/s zQSFP+ Module Connectors,

QSFP1-4 (J42), (J39), (J35), (J32) + 1x4

ganged cage

4 x TE 1551920-2 connectors with TE 2170745-2

cage with heatsink

38, 39

Chapter 2: Board Setup and Configuration

UG1302 (v1.2) May 6, 2022 www.xilinx.com

VCU128 Board User Guide 10

Send Feedback

Este manual sirve para los siguientes modelos

Tabla de contenidos

Manuales populares de Placa madre de otras marcas

DFI

DFI SD170 Manual de usuario

ASROCK

ASROCK ROMED8-2T Manual de usuario

Asus

Asus P2L97A Manual de usuario

Winmate

Winmate IC70 Manual de usuario

Asus

Asus MES-B Manual de usuario

Grantech

Grantech SYS8F377VGGA-3OMN Manual de usuario

Telit Wireless Solutions

Telit Wireless Solutions SL869-3DR Manual de usuario

Gigabyte

Gigabyte GA-9IVDT Manual de usuario

Texas Instruments

Texas Instruments ADS8372EVM Manual de usuario

Commell

Commell MS-C73 Manual de usuario

IBT Technologies

IBT Technologies MB860 Manual de usuario

Nvidia

Nvidia TEGRA DG-04927-001_V01 Manual de usuario

Biostar

Biostar M7VIT Bravo Instrucciones de funcionamiento e instalación

Intel

Intel D33217CK Manual de usuario

Asus

Asus F1A55-M LX PLUS R2.0 Manual de usuario

EPC

EPC EPC9147C Manual de usuario

Asus

Asus EX-B760M-V5 D4 Manual de usuario

EPOX

EPOX MU-8KHA0010 Manual de usuario