Texas Instruments TPS54202EVM-716 Manual de usuario

SLVUAP3–April 2016

TPS54202EVM-716 2-A Regulator Evaluation Module

User's Guide

SLVUAP3–April 2016

TPS54202EVM-716 2-A Regulator Evaluation Module

This user's guide contains background information for the TPS54202 as well as support documentation for

the TPS54202EVM-716 evaluation module (PWR716-001). Also included are the performance

specifications, the schematic, and the bill of materials for the TPS54202EVM-716.

Contents

1 Introduction ................................................................................................................... 2

2 Test Setup and Results..................................................................................................... 4

3 Board Layout................................................................................................................ 13

4 Schematic and Bill of Materials........................................................................................... 15

List of Figures

1 TPS54202EVM-716 Efficiency............................................................................................. 5

2 TPS54202EVM-716 Low Current Efficiency ............................................................................. 5

3 TPS54202EVM-716 Load Regulation..................................................................................... 6

4 TPS54202EVM-716 Line Regulation...................................................................................... 6

5 TPS54202EVM-716 Transient Response ............................................................................... 7

6 TPS54202EVM-716 Output Ripple, IOUT = 2 A .......................................................................... 8

7 TPS54202EVM-716 Output Ripple, IOUT = 100 mA ..................................................................... 8

8 TPS54202EVM-716 Output Ripple, IOUT = 10 mA ....................................................................... 9

9 TPS54202EVM-716 Output Ripple, IOUT = 0 A ........................................................................... 9

10 TPS54202EVM-716 Input Ripple ........................................................................................ 10

11 TPS54202EVM-716 Startup Relative to VIN ............................................................................ 11

12 TPS54202EVM-716 Startup Relative to Enable ....................................................................... 11

13 TPS54202EVM-716 Shutdown Relative to VIN ......................................................................... 12

14 TPS54202EVM-716 Shutdown Relative to EN......................................................................... 12

15 TPS54202EVM-716 Top-Side Assembly................................................................................ 13

16 TPS54202EVM-716 Bottom-Side Layout ............................................................................... 14

17 TPS54202EVM-716 Schematic .......................................................................................... 15

List of Tables

1 Input Voltage and Output Current Summary............................................................................. 2

2 TPS54202EVM-716 Performance Specification Summary............................................................. 2

3 Recommended Component Values ....................................................................................... 3

4 EVM Connectors and Test Points ......................................................................................... 4

5 TPS54202EVM-716 Bill of Materials..................................................................................... 16

Introduction

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TPS54202EVM-716 2-A Regulator Evaluation Module

1 Introduction

This user's guide contains background information for the TPS54202 as well as support documentation for

the TPS54202EVM-716 evaluation module (PWR716-001). Also included are the performance

specifications, the schematic, and the bill of materials for the TPS54202EVM-716.

1.1 Background

The TPS54202 dc/dc converter is designed to provide up to a 2-A output from an input voltage source of

8 V to 28 V. Rated input voltage and output current range for the evaluation module are given in Table 1.

In order to reduce EMI, the TPS54202 introduces frequency spread spectrum. The jittering span is ±6% of

the switching frequency with 1/512 swing frequency. This evaluation module is designed to demonstrate

the small printed-circuit-board areas that may be achieved when designing with the TPS54202 regulator.

The switching frequency is internally set at a nominal 500 kHz. The high-side and low-side MOSFETs are

incorporated inside the TPS54202 package along with the gate-drive circuitry. The low drain-to-source on

resistance of the MOSFETs allow the TPS54202 to achieve high efficiencies and helps keep the junction

temperature low at high output currents. The compensation components are integrated to the integrated

circuit (IC), and an external divider allows for an adjustable output voltage. Additionally, the TPS54202

provides an adjustable undervoltage lockout input. The absolute maximum input voltage is 30 V for the

TPS54202EVM-716.

Table 1. Input Voltage and Output Current Summary

EVM Input Voltage Range Output Current Range

TPS54202EVM-716 VIN = 8 V to 28 V 0 A to 2 A

1.2 Performance Specification Summary

A summary of the TPS54202EVM-716 performance specifications is provided in Table 2. Specifications

are given for an input voltage of VIN = 24 V and an output voltage of 5.0 V, unless otherwise specified. The

TPS54202EVM-716 is designed and tested for VIN = 8 V to 28 V. The ambient temperature is 25°C for all

measurements, unless otherwise noted.

Table 2. TPS54202EVM-716 Performance Specification Summary

Specification Test Conditions MIN TYP MAX Unit

VIN operating voltage range 8 24 28 V

VIN start voltage 6.74 V

VIN stop voltage 5.83 V

Output voltage set point 5 V

Output current range VIN = 8 V to 28 V 0 2 A

Line regulation IO= 1 A, VIN = 8 V to 28 V ±0.5%

Load regulation VIN = 12 V, IO= 0 A to 2 A ±0.5%

Load transient response IO= 0.5 A to 1.5 A Voltage change –150 mV

Recovery time 150 μs

IO= 1.5 A to 0.5 A Voltage change 150 mV

Recovery time 150 μs

Input ripple voltage IO= 2 A 400 mVPP

Output ripple voltage IO= 2 A <30 mVPP

Output rise time 5 ms

Center operating frequency 500 kHz

Maximum Efficiency TPS54202EVM-716, VIN = 12 V, IO= 1 A 94.06%

o 2

1 1

2 R

= ´

OUT OUT

3.95

V C

OUT

R2 0.596 V

V 0.596 V

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Introduction

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TPS54202EVM-716 2-A Regulator Evaluation Module

1.3 Modifications

These evaluation modules are designed to provide access to the features of the TPS54202. Some

modifications can be made to this module.

1.3.1 Output Voltage Set Point

The voltage divider, R2 and R3, is used to set the output voltage. To change the output voltage of the

EVM, it is necessary to change the value of resistor R3. Changing the value of R3 can change the output

voltage above 0.596 V. The value of R3 for a specific output voltage can be calculated using Equation 1.

Use 100 kΩfor R2.

(1)

Table 3 lists the R2 and R3 values for some common output voltages. Note that VIN must be in a range so

that the minimum on-time is greater than 150 ns. The values in Table 3 are standard values, not the exact

value calculated using Equation 1.

Table 3. Recommended Component Values

VOUT (V) L (µH) COUT (µF) R2 (kΩ) R3 (kΩ) C8 (pF)

1.8 5.6 66 100 49.9 47

2.5 8.2 44 100 31.6 33

3.3 10 44 100 22.1 56

5 15 44 100 13.3 75

12 22 44 100 5.23 100

1.3.2 Output Capacitor and Feed-Forward Capacitor

Considering the loop stability and the effect of the internal parasitic parameters, choose a crossover

frequency less than 40 kHz, without considering the feed-forward capacitor. A simple estimation for the

crossover frequency without feed-forward capacitor C8 is shown in Equation 2, assuming COUT has small

ESR.

(2)

Depending on VOUT, if the output capacitor, COUT, is dominated by low-ESR (ceramic types) capacitors, a

low phase margin could result. To improve the phase boost, an external feed-forward capacitor, C8, can

be added in parallel with R2. C8 is chosen such that phase margin is boosted at the crossover frequency.

C8 is calculated in Equation 3:

(3)

For this design, C8 = 75 pF. C8 is not needed when COUT has high ESR, and C8 calculated from

Equation 3 should be reduced with medium ESR. Use Table 3 as a starting point.

ENFALLING

STOP ENFALLING p h

R4 V

R5 V V R4 (I I )

- + +

ENFALLING

START STOP

ENRISING

ENFALLING

p h

ENRISING

V V

R4 V

I 1 I

æ ö -

ç ÷

è ø

=æ ö

- +

ç ÷

è ø

Test Setup and Results

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1.3.3 Adjustable UVLO

The under voltage lock out (UVLO) can be adjusted externally using R4 and R5. The EVM is set for a start

voltage of 6.74 V and a stop voltage of 5.83 V using R4 = 510 kΩand R5 = 105 kΩ. Use Equation 4 and

Equation 5 to calculate required resistor values for different start and stop voltages. For higher light-load

efficiency, consider choosing a larger R4 and R5. Make adjustments to VSTART or VSTOP for a proper R4.

(4)

(5)

Ip= 0.7 µA, Ih= 1.55 µA, VENFALLING = 1.19 V and VENRISING = 1.22 V

2 Test Setup and Results

This section describes how to properly connect, set up, and use the TPS54202EVM-716 evaluation

module. The section also includes test results typical for the evaluation module and covers efficiency,

output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.

2.1 Input/Output Connections

The TPS54202EVM-716 is provided with input/output connectors and test points as shown in Table 4. A

power supply capable of supplying 2 A must be connected to J1 through a pair of 20-AWG wires. The load

must be connected to J2 through a pair of 20-AWG wires. The maximum load current capability must be

at least 3 A to use the full capability of this EVM. Wire lengths must be minimized to reduce losses in the

wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient

ground reference. TP6 is used to monitor the output voltage with TP7 as the ground reference.

Table 4. EVM Connectors and Test Points

Reference Designator Function

J1 VIN (see Table 1 for VIN range)

J2 VOUT, 5 V at 2 A maximum

JP1 2-pin header for enable. Connect EN to ground to disable, open to enable.

TP1 VIN test point at VIN connector

TP2 GND test point at VIN

TP3 GND test point

TP4 SW test point

TP5 Test point between voltage divider network and output. Used for loop response measurements.

TP6 Output voltage test point at OUT connector

TP7 GND test point at VOUT connector

Output Current (A)

Effieciency (%)

0.001 0.01 0.1 1 3

100

D002

VIN = 24 V, VOUT = 5 V

VIN = 12 V, VOUT = 5 V

Output Current (A)

Effieciency (%)

0 0.5 1 1.5 2

100

D001

VIN = 24 V, VOUT = 5 V

VIN = 12 V, VOUT = 5 V

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Test Setup and Results

SLVUAP3–April 2016

TPS54202EVM-716 2-A Regulator Evaluation Module

2.2 Efficiency

The efficiency of this EVM peaks at a load current of about 0.5 A – 1 A, and then decreases as the load

current increases towards full load. Figure 1 shows the efficiency for the TPS54202EVM-716 at an

ambient temperature of 25°C.

Figure 1. TPS54202EVM-716 Efficiency

Figure 2 shows the efficiency for the TPS54202EVM-716 on a semi-log scale to better show light load

efficiency. The ambient temperature is 25°C.

Figure 2. TPS54202EVM-716 Low Current Efficiency

The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-

source resistance of the internal MOSFET.

Input Voltage (V)

Line Regulation (%)

6 8 10 12 14 16 18 20 22 24 26 28

-0.5

-0.4

-0.3

-0.2

-0.1

0.1

0.2

0.3

0.4

0.5

D004

IOUT = 1 A

Output Current (A)

Load Regulation (%)

0.1 0.6 1.1 1.6 2.1

-0.5

-0.4

-0.3

-0.2

-0.1

0.1

0.2

0.3

0.4

0.5

D003

VIN = 24 V

VIN = 12 V

Test Setup and Results

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2.3 Output Voltage Load Regulation

Figure 3 shows the load regulation for the TPS54202EVM-716.

Figure 3. TPS54202EVM-716 Load Regulation

Measurements are given for an ambient temperature of 25°C.

2.4 Output Voltage Line Regulation

Figure 4 shows the line regulation for the TPS54202EVM-716.

Figure 4. TPS54202EVM-716 Line Regulation

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Test Setup and Results

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TPS54202EVM-716 2-A Regulator Evaluation Module

2.5 Load Transients

Figure 5 shows the TPS54202EVM-716 response to load transients. The current step is from 25% to 75%

of maximum rated load at 24-V input. Total peak-to-peak voltage variation is as shown, including ripple

and noise on the output.

Figure 5. TPS54202EVM-716 Transient Response

Test Setup and Results

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2.6 Output Voltage Ripple

Figure 6,Figure 7,Figure 8, and Figure 9 show the TPS54202EVM-716 output voltage ripple for full-load,

skip-mode, light-load and no-load operation. VIN = 24 V. The output The ripple voltage is measured directly

across the output capacitors.

Figure 6. TPS54202EVM-716 Output Ripple, IOUT =2A

Figure 7. TPS54202EVM-716 Output Ripple, IOUT = 100 mA

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TPS54202EVM-716 2-A Regulator Evaluation Module

Figure 8. TPS54202EVM-716 Output Ripple, IOUT = 10 mA

Figure 9. TPS54202EVM-716 Output Ripple, IOUT =0A

Test Setup and Results

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2.7 Input Voltage Ripple

Figure 10 shows the TPS54202EVM-716 input voltage ripple. The output current is the rated full load of

2 A and VIN = 24 V. The ripple voltage is measured directly across the input capacitors.

Figure 10. TPS54202EVM-716 Input Ripple

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