Texas Instruments LMK1D1208IEVM Manual de usuario
User’s Guide
LMK1D1208IEVM User's Guide
ABSTRACT
The LMK1D1208I is a high-performance, low-additive jitter LVDS clock buffer with two universal inputs, 8 LVDS
outputs, and I2C configurability.
This evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1D1208I.
Throughout this document, the acronym EVM and the phrases evaluation module and evaluation board are
synonymous with the LMK1D1208IEVM.
The LMK1D1208IEVM is equipped with 50-Ω SMA connectors and impedance-controlled, 50-Ω, microstrip
transmission lines for best performance.
Figure 1-1. LMK1D1208I Evaluation Board
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LMK1D1208IEVM User's Guide 1
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Table of Contents
1 Features...................................................................................................................................................................................3
2 General Description................................................................................................................................................................3
3 Signal Path and Control Circuitry......................................................................................................................................... 3
4 Getting Started........................................................................................................................................................................4
5 Power Supply Connection..................................................................................................................................................... 5
6 Input Clock.............................................................................................................................................................................. 6
6.1 Differential Input................................................................................................................................................................. 6
6.2 Single-Ended Input.............................................................................................................................................................7
7 Output Clock........................................................................................................................................................................... 8
8 Using I2C................................................................................................................................................................................. 9
8.1 I2C Address Selection......................................................................................................................................................11
9 EVM Board Schematic..........................................................................................................................................................12
10 Bill of Materials................................................................................................................................................................... 17
11 REACH Compliance............................................................................................................................................................21
Trademarks
All trademarks are the property of their respective owners.
Table of Contents www.ti.com
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1 Features
• Easy-to-use evaluation board to fan out low-phase noise clocks
• Supports output frequencies of up to 2 GHz
• Simple, fast device configuration and setup
• I2C programmable with TICSPRO GUI available
• Single supply input powered at either 1.8 V, 2.5 V, or 3.3 V
• Differential or single-ended input clocks accepted
• EVM supports 8 differential LVDS outputs.
2 General Description
The LMK1D1208I is an I2C-programmable clock buffer that delivers 8 differential LVDS outputs. This device has
two universal input buffers which support differential or single-ended clock inputs that can be selected through
I2C programming. The device also features on-chip bias generators that can provide LVDS common-mode
voltage for AC-coupled differential clock inputs.
The I2C capabilities of this device can be evaluated by connecting a micro-USB cable to the computer and
interfacing with the TICS Pro software.
This fully assembled and factory-tested evaluation board allows complete validation of device functionalities.
For optimum performance, the board is equipped with SMA connectors and well-controlled, 50-Ω impedance,
microstrip transmission lines.
3 Signal Path and Control Circuitry
The LMK1D1208I supports single-ended inputs up to 250 MHz and differential inputs up to 2 GHz. Each device
provides up to 8 LVDS outputs that operate at the selected input frequency.
For more information, see the LMK1D1208I I2C Configurable Low Additive Jitter LVDS Buffer data sheet
(SNAS828) for details.
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4 Getting Started
The EVM has self-explanatory labeling and offers almost the same naming convention used in the data sheets.
The bold italic text in this document follows the same spelling as the actual labeling on the EVM board. By
default, the EVM can be used with differential inputs and, after board modification, with single-ended inputs.
Figure 4-1. LMK1D1208IEVM Quick Start Guide
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5 Power Supply Connection
Connect the power supply source to the SMA connector, J8 (VDD). Test points, TP3 (VCC) and TP4 (GND),
can be used as an alternative power supply source. The decoupling capacitors and ferrite bead isolate the EVM
power from the power pins of the device.
A supply voltage of 1.71 V to 3.465 V can be used for this EVM.
Figure 5-1. Power Supply Connection Layout
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6 Input Clock
The LMK1D1208I can receive either a differential or single-ended clock as input. The default board configuration
is for an LVDS differential signal at both device inputs. The inputs can be applied through the SMAs: J1, J2
(IN0_P, IN0_N) or J3, J4 (IN1_P, IN1_N). These inputs are AC-coupled to the device. The common-mode
voltage is provided by the device on-chip bias generator (VAC_REF pins), which can be measured at TP1 and
TP2.
Figure 6-1. Input Clock Selection Layout
6.1 Differential Input
By default, the clock inputs are configured as AC-coupled LVDS inputs with VAC_REF connection.
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6.2 Single-Ended Input
Single-ended input must be configured by replacing or removing passive components on the board. Follow Table
6-1 for proper setup of a single-ended input.
Table 6-1. Single-Ended Configurations by Bias Voltage
BIAS VOLTAGE
TO INx_N (V)
INPUT TO INx_P
(V)
INPUT REMOVE
BIASING
RESISTOR
REMOVE
COMMON-MODE
RESISTOR
REPLACE WITH
0-Ω RESISTOR
REPLACE WITH
100-Ω RESISTOR
0.9 1.8 (LVCMOS) IN0_N R5
R6
R12 C3 N/A
IN0_P C4 N/A
0.9 1.8 (LVCMOS) IN1_N R7
R8
R13 C5 N/A
IN1_P C6 N/A
1.25 2.5 (LVCMOS) IN0_N R6 R12 R1
C3, C4
R14
R15
IN0_P
1.25 2.5 (LVCMOS) IN1_N R8 R13 R2
C5, C6
R16
R17
IN1_P
1.65 3.3 (LVCMOS) IN0_N R6 R12 R1
C3, C4
R14
R15
IN0_P
1.65 3.3 (LVCMOS) IN1_N R8 R13 R2
C5, C6
R16
R17
IN1_P
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7 Output Clock
The LMK1D1208I generates up to 8 LVDS outputs. Two outputs (OUT0 and OUT4) are available by default
on the EVM through the following populated SMAs: J12, J13 (OUT0_P, OUT0_N) and J14, J15 (OUT4_P,
OUT4_N).
The LVDS outputs are AC-coupled to their respective SMAs. Each output pair has the 100-Ω termination on the
board already populated.
Figure 7-1. Output Clock EVM Layout
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8 Using I2C
The user can program the LMK1D1208I through the TICSPRO software (available for download on ti.com).
This GUI allows the user to control the input enables, bank enable/mute controls, individual output enable, and
individual output amplitude.
From the TICS Pro toolbar located at the top, click Select Device → Clock Distribution with Divider →
LMK1D1208I to access the profile.
Figure 8-1. Locate the LMK1D1208I Device Profile
Using the same toolbar, click USB communications → Interface → USB2ANY to switch from DemoMode to
I2C.
Figure 8-2. Set to I2C Communication
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TI highly recommends that the user only modifies the registers available in the Main tab. Using the LMK1D1208I
beyond logic states allowed in the GUI should be avoided to ensure performance and prevent device misuse.
Figure 8-3. LMK1D1208I GUI Main Page
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