Texas Instruments ADS8881EVM-PDK Manual de usuario

User's Guide

SBAU211 –June 2013

ADS8881EVM-PDK

This user's guide describes the operation and use of the ADS8881 evaluation module (EVM). ADS8881 is

an 18-bit true-differential unipolar successive approximation register (SAR) analog-to-digital converter

(ADC) with a maximum throughput of 1 MSPS. It is a very low power ADC with excellent noise and

distortion performance for ac or dc signals. The performance demonstration kit (PDK) eases EVM

evaluation with additional hardware and software for computer connectivity through universal serial bus

(USB). The ADS8881EVM-PDK includes the ADS8881EVM as a daughter card, MMB0 motherboard, A-

to-B USB cable, and 6-V wall-adapter power supply. This user's guide covers circuit description,

schematic diagram, and bill of materials for the ADS8881EVM daughter card.

The following related documents are available through the Texas Instruments website at http://www.ti.com.

Related Documentation

Device Literature Number

ADS8881 SBAS547

REF5045 SBOS410

OPA333 SBOS351

OPA330 SBOS432

THS4281 SLOS432

THS4521 SBOS458

TPS78833 SLVS382

ADCPro is a trademark of Texas Instruments.

Windows is a registered trademark of Microsoft Corporation.

I2C is a trademark of NXP Semiconductors.

All other trademarks are the property of their respective owners.

SBAU211 –June 2013 ADS8881EVM-PDK

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Contents

1 ADS8881EVM-PDK Overview ............................................................................................. 3

2 EVM Analog Interface ...................................................................................................... 4

3 EVM Digital Interface ....................................................................................................... 6

4 EVM Power Supply Inputs ................................................................................................. 7

5 EVM Digital Configuration ................................................................................................. 8

6 PDK Kit Setup ............................................................................................................... 9

7 PDK Kit Operation ......................................................................................................... 11

8 Bill of Materials, Schematics, and Layout .............................................................................. 14

List of Figures

1 Differential Input Example ................................................................................................. 4

2 Single Ended Signal Example............................................................................................. 5

3 THS4281 Reference Driver with Complementary OPA333 for Drift and Offset Correction ...................... 5

4 Serial 3-Wire Configuration................................................................................................ 8

5 Serial 4-Wire Configuration................................................................................................ 8

6 Plug-In Installer.............................................................................................................. 9

7 MMB0 Motherboard Jumper Configuration ............................................................................ 10

8 ADS8881EVM Jumper Configuration................................................................................... 10

9 Loading EVM Plug-in ..................................................................................................... 11

10 ADS8881EVM Plug-in: Device Configuration Tab .................................................................... 12

11 ADCPro Test Plug-ins .................................................................................................... 13

12 ADS8881EVM PCB: Top Layer ......................................................................................... 16

13 ADS8881EVM PCB: Ground Layer ..................................................................................... 16

14 ADS8881EVM PCB: Power Layer ...................................................................................... 17

15 ADS8881EVM PCB: Bottom Layer...................................................................................... 17

List of Tables

1 J1: Analog Interface Pinout (Samtec 10 x 2)............................................................................ 4

2 SMA Analog Inputs ......................................................................................................... 4

3 J2: Serial Interface Header ................................................................................................ 6

4 J3: Power-Supply Interface Header ...................................................................................... 7

5 ADS8881EVM Bill of Materials .......................................................................................... 14

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ADS8881EVM-PDK Overview

1 ADS8881EVM-PDK Overview

The ADS8881EVM is an evaluation module built to the TI Modular EVM system specifications. The EVM

by itself has no microprocessor and cannot run software. Thus, it is available as part of the ADS8881EVM-

PDK kit that combines the ADS8881EVM as a daughter board with the DSP-based MMB0 motherboard

using ADCPro™ software as graphical user interface (GUI).

ADCPro software collects, records, and analyzes data from ADC evaluation boards. It runs different plug-

in programs to easily expand testing and data collection capabilities. In combination with the

ADS8881EVM plug-in program, it offers a comprehensive evaluation environment for the ADS8881. For

more details on ADCPro, see the ADCPro Analog-to-Digital Converter Evaluation Software User's Guide

(literature number SBAU128), available for download from the TI website.

ADS8881EVM Daughter Board Features:

• Includes support circuitry as a design example to match ADC performance

• 3.3-V slave serial peripheral interface (SPI)

• Serial interface header for easy connection to TI DSP-based communication systems

• Compatible with the TI Modular EVM system

• Designed for 5-V analog supply

• Onboard 4.5-V voltage reference

• Bipolar (–4.3-V to 4.3-V) or unipolar (0-V to 8.6-V) input range

• Allows single ended or differential input signals

ADS8881EVM-PDK Kit Additional Features:

• USB port for computer interfacing

• Regulated 5-V and 3.3-V supplies for powering EVM daughter board

• Easy-to-use evaluation software for Windows®operating system

• Data collection to text files

• Built-in analysis tools including scope, FFT, and histogram displays

• Easily expandable with new analysis plug-in tools from Texas Instruments

SBAU211 –June 2013 ADS8881EVM-PDK

AINP

AINN

10000pF

10

-10

10

1k

THS4521

Vocm =+2.25V

-2.15V

+2.15V 1k

-2.15V

+2.15V

0.1V

4.3V

2.25V

0.1V

4.3V

2.25V

-4.3V

+4.3V

A0(-)

A0(+)

EVM Analog Interface

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2 EVM Analog Interface

The ADS8881EVM is designed for easy interfacing to multiple analog sources. SMA connectors allow

the EVM to have input signals connected through coaxial cables. In addition, the Samtec connector

provides a convenient 10-pin, dual-row, header/socket combination at J1. Consult Samtec at

http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options. All analog

inputs are buffered by THS4521 high-speed fully differential amplifier in order to properly drive the

ADS8881 ADC inputs.

Use appropriate caution when handling these pins. Table 1 summarizes the pinout for analog interface J1.

Table 1. J1: Analog Interface Pinout (Samtec 10 x 2)

Pin Number Signal Description

CH0 negative differential input. This pin can be

J1.10 A0(-) grounded for single ended signals.

CH0 positive differential input or input for single

J1.12 A0(+) ended signals

Table 2 lists the SMA analog inputs.

Table 2. SMA Analog Inputs

Pin Number Signal Description

CH0 negative differential input. This pin can be

J4 A0(-) grounded for single ended signals.

CH0 positive differential input or input for single

J5 A0(+) ended signals

2.1 Differential Input Signal Configuration

The ADS8881 can only convert differential signals with common mode between 0 V and VREF, but the

THS4521 can condition a bipolar signal changing its common mode. This EVM sets the THS4521 output

common mode to 2.25 V, that corresponds to VREF / 2. Thus, a bipolar differential signal with a common

mode of 0 V can be applied at the EVM inputs A0(-) and A0(+). Then, the THS4521 shifts the common

mode to 2.25 V. Although input common mode can be corrected, since the THS4521 is powered by a 5-V

supply, the input signals must limit the differential range from –4.3 V to 4.3 V to avoid saturating the

amplifier output. Figure 1 illustrates an input signal with 0-V common mode and 8.6-V differential, which

common mode is changed from 0 V to 2.25 V.

Figure 1. Differential Input Example

4ADS8881EVM-PDK SBAU211 –June 2013

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0.22

1k

1µF

OPA333

THS4281

10µF

1µF

20k

1k

1µF

Vref

4.5V from

REF5045

AINP

AINN

10000pF

10

-10

10

1k

THS4521

Vocm =+2.25V

1k

-4.3V

+4.3V

0.1V

4.3V

2.25V

0.1V

4.3V

2.25V

-4.3V

+4.3V

A0(+)

A0(-)

+8.6V

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EVM Analog Interface

2.2 Single Ended Signal Configuration

The ADS8881 can only convert single ended signals between 0 V and VREF. The THS4521 can condition a

single ended to a differential signal allowing a larger input voltage range for the EVM input A0(+). The

single ended signal range can be 0 V to 8.6 V or –4.3 V to 4.3 V to avoid saturating amplifier output. The

EVM A0(-) input should be grounded for single-ended signals as illustrated in Figure 2.

Figure 2. Single Ended Signal Example

2.3 Voltage Reference

Since the EVM is powered by a 5-V analog supply, the reference should be a value below 5 V. This EVM

uses a 4.5 V created by the on-board REF5045. Then, it is filtered by an RC filter of 160-Hz cutoff

frequency to minimize its noise contribution. Finally, the EVM is buffered by the THS4281, which can drive

the 10-μF required at the ADC reference (with 2 MHz of an effective bandwidth and 22-μVrms of total

noise). OPA333 and the additional feedback is optional, but it complements the THS4281 minimizing its

offset and drift.

Figure 3. THS4281 Reference Driver with Complementary OPA333 for Drift and Offset Correction

SBAU211 –June 2013 ADS8881EVM-PDK

EVM Digital Interface

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3 EVM Digital Interface

Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-L-DV-P provide a convenient 10-pin, dual-

row, header and socket combinations at P1. The header and/or socket provides access to the digital

control pins of the ADC. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety

of mating connector options.

Table 3 summarizes the pinouts for digital interface J2.

Table 3. J2: Serial Interface Header

Pin Number Signal Description

J2.1 CS or CONVST Chip select input that could be used as convert start

J2.3 SCLK Serial clock input

Chip select input that could be used as convert start

J2.7 CS or CONVST meant for the MMB0 motherboard

J2:13 SDO or MISO SDO or MISO output

20-kΩpull for detecting falling edges at end of

J2.15 INT conversion

Direct connection to convert start pin if JP3 is

J2.17 CONVST installed

J2.4, J2.10, and J2.18 GND Digital ground connections

I2C bus; used only used to program the U4

J2.16, J2.20 I2C™ bus EEPROM on the EVM board

J2.2, J2.5-6, J2.8-9,

J2.11-12, J2.14, and Unused Unused

J2:19

3.1 Serial Interface (SPI)

The ADS8881 ADC uses SPI serial communication in mode 1 (CPOL = 0, CPHA = 1) with high speed

clocks higher than 30 MHz or mode 0 (CPOL = 0, CPHA = 0) for slower clocks. Because the serial clock

(SCLK) frequency can be as fast as 80 MHz, the ADS8881EVM offers 47-Ωresistors between the SPI

signals and J2 to aid with signal integrity. Typically, in high-speed SPI communication, fast signal edges

can cause overshoot; these 47-Ωresistors slow down the signal edges in order to minimize signal

overshoot.

3.2 I2C™ Bus for Onboard EEPROM

The ADS8881EVM has an I2C bus that records the board name and assembly date to communicate with

the onboard EEPROM. It is not used in any form by the ADS8881 converter.

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EVM Power Supply Inputs

4 EVM Power Supply Inputs

J3 is the power-supply input connector. Table 4 lists the configuration details for J3.

Table 4. J3: Power-Supply Interface Header

Pin Number Pin Name Function Required

J3.3 +5VA 5-V analog supply Yes

J3.5 GND Digital ground input Yes

J3.6 GND Analog ground input Yes

J3.7 1.8 VD 1.8-V digital supply Optional

J3.9 3.3 VD 3.3-V digital supply Yes

J3.10 5 VD 5-V digital supply No

P3.1-2, P3.4, and P3.7- Unused Unused No

4.1 Analog Power Options

The ADS8881EVM board is designed to work with a 5-V analog power supply connected to J3.3. The

ADS8881 is limited to 3.6 V as analog supply, so the board regulates down the 5-V analog supply with an

on-board 3.3-V LDO (TPS78833).

4.2 Digital Power Options

The ADS8881EVM connects the digital power supply of the ADS8881 to 3.3 VD (J3.10) with a 0-Ω

resistor. This matches the logic level of the MMB0 motherboard.

4.3 Analog and Digital Grounds

The EVM only has one ground plane for analog and digital supplies, so pins J3.5 and J3.6 are tied

together to this ground plane. Therefore, both supply grounds should be connected to pins J3.5–6 so they

share the same ground.

SBAU211 –June 2013 ADS8881EVM-PDK

SDI

SCLK

SDO

CONVST

JP2

JP3

(CLOSED)

DVDD

20k

/CS

CONVST

J2:1 or J2:7

J2:17

ADS8881 /CS

CONVST

SDI

SCLK

SDO

CONVST

JP2

JP3

(OPEN)

DVDD

20k

/CS

J2:1 or J2:7

J2:17

ADS8881

EVM Digital Configuration

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5 EVM Digital Configuration

The EVM offers two jumpers (JP2 and JP3) to configure the EVM in either 3-wire SPI mode or 4-wire SPI

mode. By default, the EVM jumper settings are 3-wire. JP1 only establishes the pin that carries the chip-

select signal from the J2 header.

5.1 SPI 3-Wire Mode (JP2:2–3 and JP3:OPEN)

The chip-select signal is used to bring the ADS8881 digital output out of Tri-State and initialize

conversions. The rising edge of the chip-select signal starts a conversion, then after conversion time the

falling edge of chip-select brings the digital output out of Tri-State.

Figure 4. Serial 3-Wire Configuration

5.2 SPI 4-Wire Mode (JP2:1–2 and JP3:CLOSED)

The chip-select signal is used to bring the ADS8881 digital output out of Tri-State. However, conversion is

initialized from J3:17 as an independent signal. The rising edge of J3:17 (CONVST) starts a conversion,

then after conversion time the falling edge of chip-select brings the digital output out of Tri-State.

Figure 5. Serial 4-Wire Configuration

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PDK Kit Setup

6 PDK Kit Setup

CAUTION

Do not connect the ADS8881EVM-PDK to a PC before completing Section 6.

Failure to observe this caution may cause Microsoft Windows to disregard the

ADS8881EVM-PDK as a connected device.

This section presents the steps required to set up the ADS8881EVM-PDK kit before operating it.Section 7

explains how to operate the kit to acquire and analyze data.

The steps to setup the kit are the following and must be completed before attempting to capture data:

Step 1. Download and install the ADCPro software (if not already installed) on a PC.

Step 2. Download and install the ADS8881EVM-PDK EVM plug-in software.

Step 3. Configure the ADS8881EVM-PDK hardware.

Step 4. Power up the ADS8881EVM-PDK.

Each task is described in the subsequent sections of this document.

6.1 Installing the ADCPro™ Software

ADCPro is the primary program used to evaluate the ADS8881. It is available from the TI website at

www.ti.com/tool/adcpro. Refer to the ADCPro User's Guide (literature number: SBAU128) for detailed

installing instructions.

6.2 Installing ADS8881EVM-PDK Plug-In Software

NOTE: ADCPro should be installed before attempting to install the ADS8881EVM-PDK plug-in

software.

The installation file link for the PDK plug-in can be found in the ADS8881EVM-PDK product folder at

www.ti.com/tool/ads8881evm-pdk. In the software section look for a link with a file named ads888x-

adcproplugin-<version #>.exe (<version #> refers to the installation file version number, and increments

with software version releases). Download and double-click the file to run it; then follow the instructions as

shown.

Figure 6 shows the initial and completed installer screenshots, respectively.

Figure 6. Plug-In Installer

SBAU211 –June 2013 ADS8881EVM-PDK

PDK Kit Setup

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6.3 Configuring the ADS8881EVM-PDK Hardware

The ADS8881EVM-PDK contains both the ADS8881EVM and the MMB0 motherboard; however, the

devices may be shipped unconnected or configured incorrectly. Follow these steps to verify that

ADS8881EVM-PDK kit is properly configured and connected.

Step 1. Unpack the ADS8880EVM-PDK kit.

Step 2. Set the J12 to closed, J13A to open, and J13B to closed on the MMB0 as shown in Figure 7.

Figure 7. MMB0 Motherboard Jumper Configuration

• J12 must be closed. This setting allows the wall supply to power up the MMB0 and the

ADS8880EVM through J2 (6-VDC input), and regulate down to 5 V, 3.3 V.

• J13B must be closed. This connects the 5-V analog power supply with the 5-V digital power supply.

• J13A must be opened. This setting allows the 5-V analog power supply to be regulated on board.

Step 3. Set JP1:2–3, JP2:2–3, and JP3:open on the ADS8881EVM as shown in Figure 8.

Figure 8. ADS8881EVM Jumper Configuration

Step 4. Plug the ADS8881EVM into the MMB0.

CAUTION

Do not misalign the pins when plugging the ADS8881EVM into the MMB0.

Check the pin alignment carefully before applying power to the PDK.

10 ADS8881EVM-PDK SBAU211 –June 2013

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