Texas Instruments ADS8861EVM-PDK Manual de usuario

User's Guide

SBAU214–October 2013

ADS8861EVM-PDK

This user's guide describes the operation and use of the ADS8861 evaluation module (EVM). The

ADS8861 is an 16-bit, true-differential, unipolar, successive approximation register (SAR), analog-to-digital

converter (ADC) with a maximum throughput of 1 MSPS. This ADC is very low power with excellent noise

and distortion performance for ac or dc signals. The performance demonstration kit (PDK) eases EVM

evaluation with additional hardware and software for computer connectivity through universal serial bus

(USB). The ADS8861EVM-PDK includes the ADS8861EVM as a daughter card, MMB0 motherboard,

A-to-B USB cable, and 6-V wall-adapter power supply. This user's guide covers the circuit description,

schematic diagram, and bill of materials for the ADS8861EVM daughter card.

The related documents shown in Related Documentation are available for download at www.ti.com.

Related Documentation

Device Literature Number

ADS8861 SBAS557

REF5045 SBOS410

OPA333 SBOS351

OPA330 SBOS432

THS4281 SLOS432

THS4521 SBOS458

TPS78833 SLVS382

ADCPro is a trademark of Texas Instruments.

Windows is a registered trademark of Microsoft Corporation.

I2C is a trademark of NXP Semiconductors.

Samtec is a trademark of Samtec, Inc.

All other trademarks are the property of their respective owners.

SBAU214–October 2013 ADS8861EVM-PDK

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Contents

1 ADS8861EVM-PDK Overview ............................................................................................. 3

2 EVM Analog Interface ...................................................................................................... 4

3 EVM Digital Interface ....................................................................................................... 6

4 EVM Power-Supply Inputs ................................................................................................. 7

5 EVM Digital Configuration ................................................................................................. 8

6 PDK Kit Setup ............................................................................................................... 9

7 PDK Kit Operation ......................................................................................................... 11

8 Bill of Materials, Schematics, and Layout .............................................................................. 14

List of Figures

1 Differential Input Example ................................................................................................. 4

2 Single-Ended Signal Example............................................................................................. 5

3 THS4281 Reference Driver with Complementary OPA333 for Drift and Offset Correction....................... 5

4 Serial 3-Wire Configuration................................................................................................ 8

5 Serial 4-Wire Configuration................................................................................................ 8

6 Plug-In Installer.............................................................................................................. 9

7 MMB0 Motherboard Jumper Configuration ............................................................................ 10

8 ADS8861EVM Jumper Configuration................................................................................... 11

9 Loading EVM Plug-in ..................................................................................................... 12

10 ADS8861EVM Plug-In: Device Configuration Tab.................................................................... 13

11 ADCPro Test Plug-ins .................................................................................................... 14

12 ADS8861EVM PCB: Top Layer ......................................................................................... 16

13 ADS8861EVM PCB: Ground Layer..................................................................................... 16

14 ADS8861EVM PCB: Power Layer ...................................................................................... 17

15 ADS8861EVM PCB: Bottom Layer...................................................................................... 17

16 ADS8861EVM Schematic ................................................................................................ 18

List of Tables

1 J1: Analog Interface Pinout (Samtec 10 x 2)............................................................................ 4

2 SMA Analog Inputs ......................................................................................................... 4

3 J2: Serial Interface Header ................................................................................................ 6

4 J3: Power-Supply Interface Header ...................................................................................... 7

5 ADS8861EVM Bill of Materials .......................................................................................... 15

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ADS8861EVM-PDK Overview

1 ADS8861EVM-PDK Overview

The ADS8861EVM is an evaluation module built to the TI modular EVM system specifications. The EVM

by itself does not have a microprocessor and cannot run software. Thus, the EVM is available as part of

the ADS8861EVM-PDK kit that combines the ADS8861EVM as a daughter board with the DSP-based

MMB0 motherboard using ADCPro™ software as a graphical user interface (GUI).

ADCPro software collects, records, and analyzes data from ADC evaluation boards. ADCPro runs different

plug-in programs to easily expand testing and data collection capabilities. In combination with the

ADS8861EVM plug-in program, ADCPro offers a comprehensive evaluation environment for the

ADS8861. For more details on ADCPro, see the ADCPro Analog-to-Digital Converter Evaluation Software

User's Guide (SBAU128), available for download from www.ti.com.

ADS8861EVM Daughter Board Features:

• Includes support circuitry as a design example to match ADC performance

• 3.3-V slave serial peripheral interface (SPI)

• Serial interface header for easy connection to TI DSP-based communication systems

• Compatible with the TI modular EVM system

• Designed for 5-V analog supply

• Onboard 4.5-V voltage reference

• Bipolar (–4.3 V to 4.3 V) or unipolar (0 V to 8.6 V) input range

• Allows single-ended or differential input signals

ADS8861EVM-PDK Kit Additional Features:

• USB port for computer interfacing

• Regulated 5-V and 3.3-V supplies for powering the EVM daughter board

• Easy-to-use evaluation software for Windows®operating systems

• Data collection to text files

• Built-in analysis tools including scope, FFT, and histogram displays

• Easily expandable with new analysis plug-in tools from Texas Instruments

SBAU214–October 2013 ADS8861EVM-PDK

AINP

AINN

10000pF

10

-10

10

1k

THS4521

Vocm =+2.25V

-2.15V

+2.15V 1k

-2.15V

+2.15V

0.1V

4.4V

2.25V

0.1V

4.4V

2.25V

-4.3V

+4.3V

A0(-)

A0(+)

EVM Analog Interface

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2 EVM Analog Interface

The ADS8861EVM is designed for easy interfacing to multiple analog sources. SMA connectors allow the

EVM to have input signals connected through coaxial cables. In addition, the Samtec™ connector

provides a convenient 10-pin, dual-row, header and socket combination at J1. Consult Samtec at

www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options. All analog inputs are

buffered by the THS4521 high-speed, fully-differential amplifier in order to properly drive the ADS8861

ADC inputs.

Use appropriate caution when handling these pins. Table 1 summarizes the pinout for the analog interface

J1.

Table 1. J1: Analog Interface Pinout (Samtec 10 x 2)

Pin Number Signal Description

Channel 0 negative differential input. This pin can be grounded for single-

J1.10 A0(–) ended signals.

J1.12 A0(+) Channel 0 positive differential input or input for single-ended signals.

Table 2 lists the SMA analog inputs.

Table 2. SMA Analog Inputs

Pin Number Signal Description

Channel 0 negative differential input. This pin can be grounded for single-

J4 A0(–) ended signals.

J5 A0(+) Channel 0 positive differential input or input for single-ended signals.

2.1 Differential Input Signal Configuration

Although the ADS8861 can only convert unipolar differential signals, bipolar differential signals can be

applied at the EVM inputs because the EVM inputs are conditioned by the THS4521 fully-differential

amplifier. This EVM sets the THS4521 output common-mode voltage to 2.25 V, corresponding to VREF / 2.

Thus, a bipolar differential signal with a common-mode voltage of 0 V can be applied at the EVM inputs

A0(–) and A0(+). Then, the THS4521 shifts the common-mode voltage to 2.25 V. Even though the input

common-mode voltage can be corrected, the input signals must limit the differential range from –4.3 V to

4.3 V to avoid saturating the amplifier output because the THS4521 is powered by a 5-V supply. Figure 1

shows an input signal with a 0-V common-mode voltage and an 8.6-V differential voltage, where the

common-mode voltage is changed from 0 V to 2.25 V.

Figure 1. Differential Input Example

4ADS8861EVM-PDK SBAU214–October 2013

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0.22

1k

1µF

OPA333

THS4281

10µF

1µF

20k

1k

1µF

Vref

4.5V from

REF5045

AINP

AINN

10000pF

10

-10

10

1k

THS4521

Vocm =+2.25V

1k

-4.3V

+4.3V

0.1V

4.4V

2.25V

0.1V

4.4V

2.25V

-4.3V

+4.3V

A0(+)

A0(-)

+8.6V

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EVM Analog Interface

2.2 Single-Ended Signal Configuration

The ADS8861 can only convert single-ended signals between 0 V and VREF. The THS4521 can condition a

single-ended signal to a differential signal, thus allowing a larger input voltage range for the EVM input

A0(+). The single-ended signal range can be 0 V to 8.6 V or –4.3 V to 4.3 V to avoid saturating the

amplifier output. The EVM A0(–) input should be grounded for single-ended signals, as shown in Figure 2.

Figure 2. Single-Ended Signal Example

2.3 Voltage Reference

The reference voltage should be below 5 V because the EVM is powered by a 5-V analog supply. This

EVM uses a 4.5 V value created by the onboard REF5045. This value is then filtered by an RC filter with a

160-Hz cutoff frequency to minimize noise contribution. Finally, the filtered reference value is buffered by

the THS4281 that functions as the driver for the ADC reference input pin. To meet performance

specifications, a 10-μF capacitor with a small ESR is also present at the ADC reference input pin. This

large capacitive load reduces the THS4281 effective bandwidth to 2 MHz, making the THS4281 total noise

contribution approximately 22 μVRMS. The OPA333 and the additional feedback are optional, but do

complement the THS4281 by minimizing offset and drift.

Figure 3. THS4281 Reference Driver with Complementary OPA333 for Drift and Offset Correction

SBAU214–October 2013 ADS8861EVM-PDK

EVM Digital Interface

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3 EVM Digital Interface

Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-L-DV-P provide convenient 10-pin, dual-

row, header and socket combinations at P1. The header and socket provides access to the ADC digital

control pins. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating

connector options.

Table 3 summarizes the pinouts for the digital interface J2.

Table 3. J2: Serial Interface Header

Pin Number Signal Description

J2.1 CS or CONVST Chip-select input that can be used as a convert start

J2.3 SCLK Serial clock input

Chip-select input that can be used as a convert start intended for

J2.7 CS or CONVST the MMB0 motherboard

J2:13 SDO or MISO SDO or MISO output

20-kΩpull-up resistor for detecting falling edges at the end of

J2.15 INT conversions

J2.17 CONVST Directly connects to the convert start pin if JP3 is installed

J2.4, J2.10, and J2.18 GND Digital ground connections

I2C bus; used only used to program the U4 EEPROM on the

J2.16, J2.20 I2C™ bus EVM board

J2.2, J2.5-6, J2.8-9, J2.11-12, Unused Unused

J2.14, and J2:19

3.1 Serial Interface (SPI)

The ADS8861 ADC uses SPI serial communication in mode 1 (CPOL = 0, CPHA = 1) with high-speed

clocks greater than 30 MHz or uses mode 0 (CPOL = 0, CPHA = 0) for slower clocks. Because the serial

clock (SCLK) frequency can be as fast as 80 MHz, the ADS8861EVM offers 47-Ωresistors between the

SPI signals and J2 to aid with signal integrity. Typically, in high-speed SPI communication, fast signal

edges can cause overshoot; these 47-Ωresistors slow down the signal edges in order to minimize signal

overshoot.

3.2 I2C Bus for Onboard EEPROM

The ADS8861EVM has an I2C bus that records the board name and assembly date to communicate with

the onboard EEPROM. This bus is not used in any form by the ADS8861 converter.

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EVM Power-Supply Inputs

4 EVM Power-Supply Inputs

J3 is the power-supply input connector. Table 4 lists the configuration details for J3.

Table 4. J3: Power-Supply Interface Header

Pin Number Pin Name Function Required

J3.3 +5VA 5-V analog supply Yes

J3.5 GND Digital ground input Yes

J3.6 GND Analog ground input Yes

J3.7 1.8 VD 1.8-V digital supply Optional

J3.9 3.3 VD 3.3-V digital supply Yes

J3.10 5 VD 5-V digital supply No

P3.1-2, P3.4, and P3.7-8 Unused Unused No

4.1 Analog Power Options

The ADS8861EVM board is designed to function with a 5-V analog power supply connected to J3.3. The

ADS8861 is limited to 3.6 V as an analog supply. Therefore, the board regulates down the 5-V analog

supply with an onboard 3.3-V LDO (TPS78833).

4.2 Digital Power Options

The ADS8861EVM connects the digital power supply of the ADS8861 to 3.3 VD (J3.10) with a 0-Ω

resistor. This 3.3-V supply matches the 3.3-V logic level of the MMB0 motherboard.

4.3 Analog and Digital Grounds

The EVM only has one ground plane for analog and digital supplies; thus, pins J3.5 and J3.6 are tied

together to this ground plane. Therefore, both supply grounds should be connected to pins J3.5–6 in order

to share the same ground.

SBAU214–October 2013 ADS8861EVM-PDK

SDI

SCLK

SDO

CONVST

JP2

JP3

(CLOSED)

DVDD

20k

/CS

CONVST

J2:1 or J2:7

J2:17

ADS8861 /CS

CONVST

SDI

SCLK

SDO

CONVST

JP2

JP3

(OPEN)

DVDD

20k

/CS

J2:1 or J2:7

J2:17

ADS8861

EVM Digital Configuration

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5 EVM Digital Configuration

The EVM offers two jumpers (JP2 and JP3) to configure the EVM in either 3-wire or 4-wire SPI mode. By

default, the EVM jumper settings are 3-wire. JP1 only establishes the pin that carries the chip-select signal

from the J2 header.

5.1 SPI 3-Wire Mode (JP2:2–3 and JP3:OPEN)

The chip-select signal is used to bring the ADS8861 digital output out of 3-state and initialize conversions.

The rising edge of the chip-select signal starts a conversion, then after the conversion time the falling

edge of chip-select brings the digital output out of 3-state. Figure 4 shows this configuration.

Figure 4. Serial 3-Wire Configuration

5.2 SPI 4-Wire Mode (JP2:1–2 and JP3:CLOSED)

The chip-select signal is used to bring the ADS8861 digital output out of 3-state. However, conversion is

initialized from J3:17 as an independent signal. The rising edge of J3:17 (CONVST) starts a conversion,

then after the conversion time the falling edge of the chip-select brings the digital output out of 3-state.

Figure 5 shows this configuration.

Figure 5. Serial 4-Wire Configuration

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PDK Kit Setup

6 PDK Kit Setup

NOTE: Do not connect the ADS8861EVM-PDK to a computer before completing Section 6. Failure

to observe this caution may cause Microsoft Windows to disregard the ADS8861EVM-PDK

as a connected device.

This section presents the steps required to setup the ADS8861EVM-PDK kit before operation.

Section 7 explains how to operate the kit to acquire and analyze data.

The steps to setup the kit are as follows and must be completed before attempting to capture data:

Step 1. Download and install the ADCPro software (if not already installed) to a computer.

Step 2. Download and install the ADS8861EVM-PDK EVM plug-in software.

Step 3. Configure the ADS8861EVM-PDK hardware.

Step 4. Power-up the ADS8861EVM-PDK.

Each task is described in the subsequent sections of this document.

6.1 Installing the ADCPro Software

ADCPro is the primary program used to evaluate the ADS8861. ADCPro is available for download at

www.ti.com/tool/adcpro. Refer to the ADCPro User's Guide (SBAU128) for detailed installing instructions.

6.2 Installing the ADS8861EVM-PDK Plug-In Software

NOTE: ADCPro should be installed before attempting to install the ADS8861EVM-PDK plug-in

software.

The installation file link for the PDK plug-in can be found in the ADS8861EVM-PDK product folder at

www.ti.com/tool/ads8861evm-pdk. In the software section, look for a link with a file named ads886x-

adcproplugin-<version #>.exe (<version #> refers to the installation file version number, and increments

with software version releases). Download and double-click the file to run it; then follow the instructions as

shown.

Figure 6 shows the initial and completed installer screen shots, respectively.

Figure 6. Plug-In Installer

SBAU214–October 2013 ADS8861EVM-PDK

PDK Kit Setup

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6.3 Configuring the ADS8861EVM-PDK Hardware

The ADS8861EVM-PDK contains both the ADS8861EVM and the MMB0 motherboard; however, the

devices may be shipped unconnected or configured incorrectly. Follow these steps to verify that the

ADS8861EVM-PDK kit is properly configured and connected.

Step 1. Unpack the ADS8861EVM-PDK kit.

Step 2. Set J12 to closed, J13A to open, and J13B to closed on the MMB0, as shown in Figure 7.

Figure 7. MMB0 Motherboard Jumper Configuration

• J12 must be closed. This setting allows the wall supply to power-up the MMB0 and the

ADS8861EVM through J2 (6-VDC input), and regulate down to 5 V, 3.3 V.

• J13B must be closed. This setting connects the 5-V analog power supply with the 5-V digital power

supply.

• J13A must be opened. This setting allows the 5-V analog power supply to be regulated onboard.

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