Texas Instruments ADS8402 Manual de usuario

ADS8402/ADS8412EVM

December 2003 Data Acquistion

User’s Guide

SLAU126

IMPORTANT NOTICE

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for

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Mailing Address: Texas Instruments

Post Office Box 655303 Dallas, Texas 75265

EVM IMPORTANT NOTICE

Texas Instruments (TI) provides the enclosed product(s) under the following conditions:

This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION

PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided

may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective

considerations, including product safety measures typically found in the end product incorporating the goods.

As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic

compatibility and therefore may not meet the technical requirements of the directive.

Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned

within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE

WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,

IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY

PARTICULAR PURPOSE.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user

indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products

received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction

of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic

discharge.

EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE

TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not

exclusive.

TI assumesno liability for applications assistance, customer product design, software performance, or

infringement of patents or services described herein.

Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM

User’s Guide prior to handling the product. This notice contains important safety information about temperatures

and voltages. For further safety concerns, please contact the TI application engineer.

Persons handling the product must have electronics training and observe good laboratory practice standards.

No license is granted under any patent right or other intellectual property right of TI covering or relating to any

machine, process, or combination in which such TI products or services might be or are used.

Mailing Address:

Texas Instruments

Post Office Box 655303

Dallas, Texas 75265

EVM WARNINGS AND RESTRICTIONS

It is important to operate this EVM within the input voltage range of±6 V and the output voltage

range of 0 V and 5.5 V.

Exceeding the specified input range may cause unexpected operation and/or irreversible

damage to the EVM. If there are questions concerning the input range, please contact a TI

field representative prior to connecting the input power.

Applying loads outside of the specified output range may result in unintended operation and/or

possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to

connecting any load to the EVM output. If there is uncertainty as to the load specification,

please contact a TI field representative.

During normal operation, some circuit components may have case temperatures greater than

60°C. The EVM is designed to operate properly with certain components above 60°C as long

as the input and output ranges are maintained. These components include but are not limited

to linear regulators, switching transistors, pass transistors, and current sense resistors. These

types of devices can be identified using the EVM schematic located in the EVM User’s Guide.

When placing measurement probes near these devices during operation, please be aware

that these devices may be very warm to the touch.

Mailing Address:

Texas Instruments

Post Office Box 655303

Dallas, Texas 75265

Related Documentation From Texas Instruments

iii

Preface

Read This First

About This Manual

This users guide describes the characteristics, operation, and use of the

ADS8402/ADS8412 16-bit, high speed, parallel interface analog-to-digital

converter evaluation board. A complete circuit description as well as a

schematic diagram and bill of materials are included.

How to Use This Manual

This document contains the following chapters:

-Chapter 1 – EVM Overview

-Chapter 2 – Analog Interface

-Chapter 3 – Digital Interface

-Chapter 4 – Power Supply Requirements

-Chapter 5 – Using the EVM

-Chapter 6 - ADS8402/ADS8412 BOM, Layout, and Schematic

Related Documentation From Texas Instruments

To obtain a copy of any of the following TI documents, call the Texas

Instruments Literature Response Center at (800) 477-8924 or the Product

Information Center (PIC) at (972) 644-5580. When ordering, identify this

booklet by its title and literature number. Updated documents can also be

obtained through our website at www.ti.com

Data Sheets: Literature Number:

ADS8402 SLAS154

ADS8412 SLAS384

REF3040 SBVS032

SN74AHC138 SCLS258

SN74AHC245 SCLS230

SN74AHC1G04 SCLS318

THS4503 SLOS352

Contents

FCC Warning

This equipment is intended for use in a laboratory test environment only. It gen-

erates, uses, and can radiate radio frequency energy and has not been tested

for compliance with the limits of computing devices pursuant to subpart J of

part 15 of FCC rules, which are designed to provide reasonable protection

against radio frequency interference. Operation of this equipment in other en-

vironments may cause interference with radio communications, in which case

the user at his own expense will be required to take whatever measures may

be required to correct this interference.

Contents

1 EVM Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2 Introduction 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 Analog Interface 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1 Signal Conditioning 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Reference 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3 Digital Interface 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4 Power Supply Requirements 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5 Using the EVM 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.1 As a Reference Board 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.2 As a Prototype Board 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.3 As a Software Test Platform 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6 ADS8402/ADS8412EVM BOM, Layout, and Schematic 6-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.1 ADS8402/ADS8412EVMBill of Materials 6-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.2 ADS8402/ADS8412EVMLayout 6-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.3 ADS8402/ADS8412EVMSchematic 6-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents

Figures

1-1 Input Buffer Circuit 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5-1 Top Layer—Layer 1 5-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5-2 Ground Plane—Layer 2 5-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5-3 Power Plane—Layer 3 5-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5-4 Bottom Layer—Layer 4 5-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Tables

1-1 Analog Input Connector 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-2 Solder Short Jumper Setting 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2-1 Pinout for Parallel Control Connector P2 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2-2 Jumper Settings for Decoder Outputs 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2-3 Data Bus Connector P3 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2-4 Pinout for Converter Control Connector J3 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-1 Power Supply Test Points 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-2 Power Connector, J1, Pinout 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5-1 ADS8402/ADS8412EVMBill Of Materials 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1

EVM Overview

This chapter contains the features of the ADS8402/ADS8412.

Topic Page

1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2 Introduction 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 1

Features

1-2

1.1 Features

-Full-featured evaluation board for the high-speed ADS8402 (1.25 MSPS)

and the ADS8412 (2 MSPS) high speed, 16-bit, single channel, parallel

interface SAR-type analog-to-digital converters.

-Onboard signal conditioning

-Onboard reference

-Input and output digital buffer

-Onboard decoding for stacking multiple EVMs

1.2 Introduction

The ADS8402EVM and ADS8412EVM is a modular or stand alone EVM. It has

the bare minimum circuitry to showcase the device under test and plug into

prototype systems. The onboard decoding circuitry enables the user flexibility

to map the A/D to different addresses in processor memory. The power, analog

and digital control lines are on standard 0.1-in. header/socket connectors, at

the edges of the PWB, making it easy to wire into prototype systems for

evaluation. The EVM has been designed for direct evaluation of the

analog-to-digital converter performance and operating characteristics. This

EVM is compatible with the 5-6K interface board (SLAU104) from Texas

Instruments and additional third party boards.

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