Texas Instruments ADS7057 Manual de usuario

SBAU302–December 2017

ADS7057 Evaluation Module

User's Guide

SBAU302–December 2017

ADS7057 Evaluation Module

This user's guide describes the characteristics, operation, and use of the ADS7057 evaluation module

(EVM) performance demonstration kit (PDK). This kit is an evaluation platform for the ADS7057 device,

which is a 14-bit, 2.5-MSPS, differential analog input, successive approximation register (SAR) analog-to-

digital converter (ADC) that features an easy-to-use SPI. This evaluation module can also be used for

performance evaluation of ADS7054 (14-bit, 1-MSPS, differential analog input SAR ADC). The EVM-PDK

eases evaluation with hardware, software, and computer connectivity through the universal serial bus

(USB) interface. This user's guide includes complete circuit descriptions, schematic diagrams, and a bill of

materials (BOM).

The following related documents are available through the Texas Instruments website.

Table 1. Related Documentation

Device Literature Number

ADS7057 SBAS821

ADS7054 SBAS859

THS4551 SBOS778

TPS79901 SBVS056

REF1933 SBOS697

Contents

1 Overview...................................................................................................................... 3

2 Analog Interface.............................................................................................................. 3

3 Digital Interfaces ............................................................................................................. 4

4 Power Supplies .............................................................................................................. 5

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5 ADS7057EVM-PDK Initial Setup .......................................................................................... 6

6 ADS7057EVM-PDK Operation ........................................................................................... 11

7 Bill of Materials, Printed-Circuit Board Layout, and Schematics..................................................... 19

List of Figures

1 ADS7057EVM Analog Input Path ......................................................................................... 4

2 ADS7057EVM-PDK Jumper Locations ................................................................................... 6

3 ADS7057EVM Software Installation Prompts............................................................................ 7

4 Device Driver Installation Wizard Prompts ............................................................................... 8

5 LabVIEW Run-Time Engine Installation .................................................................................. 9

6 ADS7057EVM-PDK Installation Final Step ............................................................................. 10

7 EVM-PDK Hardware Setup and LED Indicators ....................................................................... 11

8 Launch the EVM GUI Software........................................................................................... 12

9 EVM GUI Global Input Parameters...................................................................................... 13

10 Time Domain Display Tool Options...................................................................................... 14

11 Spectral Analysis Tool..................................................................................................... 15

12 Histogram Analysis Tool .................................................................................................. 16

13 ADS7057 Calibration ...................................................................................................... 17

14 ADS7057EVM PCB Layer 1: Top Layer ................................................................................ 21

15 ADS7057EVM PCB Layer 2: GND Plane............................................................................... 21

16 ADS7057EVM PCB Layer 3: Power Planes............................................................................ 22

17 ADS7057EVM PCB Layer 4: Bottom Layer ............................................................................ 22

18 Schematic Diagram (Page 1) of the ADS7057EVM PCB............................................................. 23

19 Schematic Diagram (Page 2) of the ADS7057EVM PCB............................................................. 24

List of Tables

1 Related Documentation..................................................................................................... 1

2 Analog Input Connector Description ...................................................................................... 3

3 Voltage Settings for AVDD and VDD Supplies............................................................................ 5

4 VDD Voltage Selection Settings............................................................................................. 5

5 Default Jumper Configurations............................................................................................. 6

6 External Source Requirements for Device Evaluation (SNR and THD) ............................................ 15

7 ADS7057EVM Bill of Materials .......................................................................................... 19

Trademarks

Microsoft, Windows are registered trademarks of Microsoft Corporation.

LabVIEW is a trademark of National Instruments.

All other trademarks are the property of their respective owners.

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Overview

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ADS7057 Evaluation Module

1 Overview

The ADS7057EVM-PDK evaluation kit includes the ADS7057EVM board and the precision host interface

(PHI) controller board that enables the accompanying computer software to communicate with the ADC

over USB for data capture and analysis.

The ADS7057EVM board includes the ADS7057 SAR ADC, all the peripheral analog circuits, and the

components required to achieve optimum performance from the ADC.

The PHI controller board primarily serves three functions:

• Provide a communication interface from the EVM to the computer through a USB port

• Provide the digital input and output signals necessary to communicate with the ADS7057 device

• Supply power to all active circuitry on the ADS7057EVM board

Along with the ADS7057EVM and PHI controller board, this evaluation kit includes an A-to-micro-B USB

cable to connect to a computer.

1.1 ADS7057EVM-PDK Features

The ADS7057EVM-PDK showcases the following features:

• Hardware and software required for diagnostic testing as well as accurate performance evaluation of

the ADS7057 ADC

• USB powered — no external power supply is required

• The PHI controller board that provides a convenient communication interface to the ADS7057 ADC

over USB 2.0 (or higher) for power delivery as well as digital input and output

• Easy-to-use evaluation software for Microsoft®Windows®7, 64-bit operating systems

1.2 ADS7057EVM Features

The ADS7057EVM showcases the following features:

• Onboard low-noise, low-distortion ADC input drivers optimized to meet ADC performance

• Onboard ultra-low noise, low-dropout (LDO) regulators, to generate supplies for the operation amplifier

and voltage reference to generate the power supply for ADC

2 Analog Interface

The ADS7057 is a low-power, small ADC that supports differential analog inputs. The ADS7057EVM uses

a THS4551 fully differential amplifier to drive the inputs of the ADC. The ADS7057EVM is designed for

easy interfacing to analog sources. This section describes the front-end driver circuitry details, including

jumper configurations for the analog input signal source.

2.1 Connectors for Differential Analog Input

The ADS7057EVM is designed for easy interfacing to an external, analog, differential source through

either a subminiature version A (SMA) connectors or 100-mil headers. The ADS7057EVM has two

ADS7057 ADCs on board. The ADS7057EVM GUI can either be configured for individual ADC data

sampling or simultaneous sampling with both ADCs. Jumpers J1, J2, J7, and J10 are the SMA connectors

that allow for differential analog source connectivity through coaxial cables. Alternatively, 100-mil jumper

cables or mini-grabbers can be used to connect analog sources to the pin 1 of connectors J3, J6, J8, and

J9. Table 2 lists the analog input connectors for the individual ADCs.

Table 2. Analog Input Connector Description

Pin Number Signal Description

J1 and J2 INP Differential analog input provided at the SMA for ADC A

J3:1 and J6:1 INP Alternate location to provide the differential input for ADC A

J7 and J10 INP Differential analog input provided at the SMA for ADC B

J8:1 and J9:1 INP Alternate location to provide the differential input for ADC B

SPI

THS4551 ADS7057

AINP

AINM

ADS7057

REF

1933

AVDD

680PF

VOPA

1.1 K

VCM

INF

100

THS4551 680PF

VOPA

1.1 K

VCM

INF

100

Host

Interface

Analog Interface

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2.2 ADC Differential Input Signal Driver

The SAR ADC inputs terminate in switched-capacitor networks that create large instantaneous current

loads when the switches are closed, which effectively makes the ADC inputs dynamically low impedance.

The differential inputs of the ADC are therefore driven by a THS4551 fully differential amplifier in a small

gain configuration to maintain ADC performance with maximum loading at full device throughput of the

ADS7057 of 2.5 MSPS.

2.2.1 Input Signal Path

Figure 1 shows the signal path for the positive differential inputs applied to the ADS7057EVM. A separate

THS4551 amplifier is used in a fully differential configuration to drive the differential input of each ADC. An

RC filter with values of 10 Ωand 680 pF was selected to achieve a SINAD greater than 79 dB and a THD

less than –85 dB for a 2-kHz sine wave input at full throughput of the ADS7057 of 2.5 MSPS.

Figure 1. ADS7057EVM Analog Input Path

3 Digital Interfaces

As noted in Section 1, the ADS7057EVM interfaces with the PHI, which in turn communicates with the

computer over USB. The three devices on the EVM that the PHI communicates with are the two ADS7057

ADCs (over SPI) and the EEPROM (over I2C). The EEPROM comes preprogrammed with the information

required to configure and initialize the ADS7057EVM-PDK platform. When the hardware is initialized, the

EEPROM is no longer used.

3.1 SPI for ADC Digital I/O

The ADS7057EVM-PDK supports the interface and calibration modes detailed in ADS7056 Ultra-Low

Power, Ultra-Small Size, 14-Bit, High-Speed SAR ADC. The PHI is capable of operating at a 3.3-V logic

level and is directly connected to the digital I/O lines of the ADC.

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Power Supplies

SBAU302–December 2017

ADS7057 Evaluation Module

4 Power Supplies

The ADS7057 supports a wide range of operation on its analog supplies. The AVDD operates from 2.35 V

to 3.6 V. The DVDD operates from 1.65 V to 3.6 V, independent of the AVDD supply. The analog portion

of the ADS7057EVM operates from a 5.5-V supply, which in turn generates the 5-V VOPA supply for the

THS4551 fully differential amplifier using the TPS79901, which is a low-noise, fixed-voltage regulator. The

3.3-V AVDD supply for the ADS7057 is generated using the REF1933 which is a low-drift, low-power,

voltage reference.

The TPS79901 regulator can be configured to generate a VOPA supply other than 5 V by replacing resistors

R4 and R8 with appropriate values. Table 3 lists the nearest feedback resistor values that should be

populated to generate the desired VDD supply voltage.

Table 3. Voltage Settings for AVDD and VDD Supplies

VOPA Supply Voltage Device (U6) R4 R8

5 V (default) TPS79901 100 kΩ31.6 kΩ

3.3 V TPS79901 56 kΩ31.6 kΩ

3.6 V TPS79901 63.4 kΩ31.6 kΩ

There is a provision given for operating the THS4551 operational amplifier and the ADS7057 ADC from a

common power supply. Table 4 lists the modifications required to select a common power supply for the

THS4551 and ADS7057 devices.

Table 4. VDD Voltage Selection Settings

OPA836 Supply Source R19 R29

VOPA

(default 5 V) Not installed Assemble (0 Ω)

AVDD Assemble (0 Ω) Not installed

The digital portion of the ADC operates from 3.3-V EVM_DVDD supply from the PHI.

ADS7057EVM-PDK Initial Setup

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5 ADS7057EVM-PDK Initial Setup

This section explains the initial hardware and software setup procedure that must be completed for proper

operation of the ADS7057EVM-PDK.

5.1 Default Jumper Settings

Figure 2 shows the silkscreen plot, which details the jumper locations for ADS7057EVM-PDK.

Figure 2. ADS7057EVM-PDK Jumper Locations

Table 5 lists the functionality and default configuration of each jumper. No jumpers are required to be

populated on any location of the EVM for normal operation. Remove any jumpers that may be present at

locations J3, J5, J6, J8, and J9.

Table 5. Default Jumper Configurations

Reference Designator Default Configuration Description

J5 Open Connect this jumper for EEPROM write protection

J3, J6, J8, J9 Open Use pin 1 of these jumpers as an alternate location to provide the differential

input to ADC A (U2) and ADC B (U7)

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ADS7057EVM-PDK Initial Setup

SBAU302–December 2017

ADS7057 Evaluation Module

5.2 EVM Graphical User Interface Software Installation

The following steps describe how to install the software for the ADS7057 EVM graphical user interface

(GUI).

1. Download the latest version of the EVM GUI installer from the Software section of the ADS7057EVM-

PDK Tool Folder, and run the GUI installer to install the EVM GUI software on your computer.

CAUTION

Manually disable any antivirus software running on the computer before

downloading the EVM GUI installer onto the local hard disk. Failure to disable

antivirus software, depending on the antivirus settings, may cause an error

message to appear or the installer.exe file may be deleted.

2. Accept the License Agreements and follow the on-screen instructions to complete the installation (see

Figure 3).

Figure 3. ADS7057EVM Software Installation Prompts

ADS7057EVM-PDK Initial Setup

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3. As a part of the ADS7057EVM GUI installation, a prompt with a Device Driver Installation Wizard

appears on the screen (see Figure 4). Click the Next button to proceed, then click the Finish button

when the installation is complete.

Figure 4. Device Driver Installation Wizard Prompts

NOTE: A notice may appear on the screen stating that Windows cannot verify the publisher of this

driver software. Select the Install this driver software anyway option.

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ADS7057EVM-PDK Initial Setup

SBAU302–December 2017

ADS7057 Evaluation Module

The device requires the LabVIEW™ Run-Time Engine (see Figure 5) and may prompt for the

installation of this software, if not already installed.

Figure 5. LabVIEW Run-Time Engine Installation

ADS7057EVM-PDK Initial Setup

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4. After these installations, check the Create Desktop Shortcut box, as Figure 6 shows.

Figure 6. ADS7057EVM-PDK Installation Final Step

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