Texas Instruments UCC2891 Manual de usuario

48-V to 3.3-V Forward Converter withActive Clamp Reset Using theUCC2891 Active Clamp Current ModePWM Controller

User's Guide

December 2006 Power Supply MAN

SLUU178A

48-V to 3.3-V Forward Converter with ActiveClamp Reset Using the UCC2891 ActiveClamp Current Mode PWM Controller

User's Guide

Literature Number: SLUU178ANovember 2003 – Revised December 2006

1 Introduction

2 Description

User's GuideSLUU178A – November 2003 – Revised December 2006

Using the UCC2891 Active Clamp Current Mode PWMController

The UCC2891EVM evaluation module (EVM) is a forward converter providing a 3.3-V regulated output at30 A of load current, operating from a 48-V input. The EVM operates over the full 36 V to 72 V telecominput range, and is able to fully regulate down to zero load current. The module uses the UCC2891 currentmode active clamp PWM controller for effectively demonstrating the active clamp transformer resettechnique.

Benefits of the active clamp include a control driven transformer reset scheme allowing zero voltageswitching (ZVS) to increase overall efficiency, lower drain-to-source voltage stress, extended duty cyclebeyond 50% and reduced electromagnetic radiated emissions. Combined with synchronous rectification,this EVM is configured to operate at 300 kHz and exhibits a peak efficiency of just over 92%, with a fullload efficiency of 89%. The EVM displays many features that might be typical of a more complex design,yet its compact board layout and low component count make it elegantly simple.

The UCC2891 controller family provides advanced active clamp control features such as programmablemaximum duty cycle clamp, programmable dead time between the two primary switches and the ability todrive either a P-channel, or N-channel MOSFET in either a high-side or low-side active clampconfiguration. The UCC2891 also allows the ability to start-up directly from the 48-V telecom bus voltage,eliminating the need for external start-up circuitry. It includes programmable soft start, internal slopecompensation for peak current mode control, internal low-line voltage sensing, internal syncronizable clockinput, cycle-by-cycle current limiting, and a robust 2-A sink/source TrueDrive™ internal gate drive circuit.The result is a highly efficient design loaded with features, requiring very few external components.

The TrueDrive™ hybrid output architecture used in the UCC2891 uses TI's unique TrueDrive™Bipolar/CMOS output. To the user, this simply means ultra-fast rise and fall times by providing the highestpossible drive current where it is needed most, at the MOSFET Miller plateau region.

The UCC2891/2/3/4 is available in either a 16-pin SOIC or 16-pin TSSOP package for applications whereabsolute minimal board space is required.

The UCC2891EVM highlights the many benefits of using the UCC2891 active clamp current mode PWMcontroller. This user's guide provides the schematic, component list, assembly drawing, artwork and testset up necessary to evaluate the UCC2891 in a typical telecom application. More detailed designinformation can be found listed in the References section.

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2.1 Applications

2.2 Features

Description

The UCC2891 is suited for use in isolated telecom 48-V input systems requiring high-efficiency andhigh-power density for very low-output voltage, high-current converter applications, including:•Server Systems•Datacom

•Telecom

•DSP's, ASIC's, FPGA's

The UCC2891EVM features include:•ZVS transformer reset using active clamp technique in forward converter•All surface mount components, double sided half brick (2.2 ×2.28 ×0.5) inches•Complementary auxilliary drive for active clamp with programmable dead time for ZVS•Current mode control with synchronization function•Internal PWM slope compensation•Start-up directly from telecom input voltage•Synchronous rectifier output stage allows high-efficiency operation•Programmable soft-start•Up to 30-A dc output current•Regulation to zero load current•Non-latching, output overcurrent and short circuit protection•Non-latching, Input undervoltage protection•1500-V isolation primary to secondary

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3 UCC2891EVM Electrical Performance Specifications

4 Schematic

UCC2891EVM Electrical Performance Specifications

The UCC2891EVM electrical performance specifications are listed in Table 1 .

Table 1. UCC2891EVM Performance Summary

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

Input Characteristics

Input voltage range 36 48 72 VNo load intput current V

= 36 V, I

OUT

= 0 A 75 100 mAMaximum input current V

= 36 V, I

OUT

= 30 A 3.00 3.25 AInput voltage ripple V

= 72 V, I

OUT

= 30 A 1.50 1.75 V

P-P

Input voltage ripple

Output voltage 36 V ≤V

≤72 V, 0 A ≤I

OUT

≤30 A 3.25 3.30 3.35 VOutput voltage regulation Line regulation (36 V ≤V

≤72 V, I

OUT

= 0 A) 0.003%Load regulation (0 A ≤I

OUT

≤30 A, V

= 48 V) 0.060%Output voltage ripple V

= 48 V, I

OUT

= 30 A 30 35 mV

P-P

Output load current V

= 48 V, I

OUT

= 30 A 0 30

AOutput current limit 36 V ≤V

≤72 V 32

Output current limit

Switching frequency 275 325

kHzControl loop bandwidth 36 V ≤V

≤72 V, I

OUT

= 10 A 5 8Control loop bandwidth 36 V ≤V

≤72 V, 2 A ≤I

OUT

≤30 A 30 50 °CPeak efficiency 92%Full load efficiency V

= 48 V, I

OUT

= 30 A 89%

A schematic of the UCC2891EVM is shown in Figure 1 . Terminal block J1 is the 48-V input voltage sourceconnector and J8 is the output and return for the 3.3-V output voltage.

On the primary side, U1 is the UCC2891 shown with the necessary discrete circuitry for configuring thecontroller to operate at 300 kHz with the maximum duty clamp set for 0.65. The EVM is programmed tostart at VIN=36 V, as determined by R11 and R12. To minimize power dissipation in the current sense, acurrent sense transformer, T1 is used, as opposed to simply using a sense resistor between the source ofQ2 and power ground. Q2 is the primary switching MOSFET and is selected based upon VDS and lowRDS(on). Q1 is the AUX (active reset) MOSFET and is selected based upon preferred package only, withonly minor consideration given for R

DS(on)

and Qg. Since the active clamp used in this design is low-sidereferenced, Q1 must be a P-channel type MOSFET. The reason for this is further explained in applicationnote SLUA299[2]. C9 is the clamp capacitor used to maintain a constant dc voltage. The input voltage issubtracted from the clamp voltage to allow transformer reset during the active clamp period.

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Schematic

Figure 1. UCC2891EVM Schematic

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5 EVM Test Setup

+Vout -Vout

J9 J10

Loop+

Loop-

Texas Instruments

HPA034

UCC2891 Active Clamp Converter

V-Clamp

Q2 Gate

SR-QF Gate

SR-QR Gate

LOAD1

3.3V/30A

VIN

FAN

+VIN

-VIN

DANGER HIGH VOLTAGE

+VOUT

-VOUT

EVM Test Setup

High efficiency is achieved using self-driven synchronous rectification on the secondary side. Q3 and Q4are placed in parallel and make up the forward synchronous rectifier (SR), while the reverse SR is madeup of the parallel combination of Q5, Q7 and Q8. If the duty cycle were limited to 50% then the reverse SRcould be reduced to only two parallel MOSFETs, but since these devices are operating near 60% dutycycle during the freewheel mode, they carry a higher average current than seen by Q3 and Q4. Theoutput inductor L1 has a coupled secondary, referenced to the primary side, used to provide bootstrappingvoltage to U1. A stable bias for the optocoupler, U2 is provided by the series pass regulator made up ofD6, Q6 and some associated filtering.

Scope jacks J2 and J3 allow the user to measure the gate-to-source and drain-to-source signals for Q2,the primary MOSFET. J4 and J5 allow convenient access to the gate drive signals of each SR on thesecondary side. J6 and J7 are available allowing the option of using a network analyzer to non-invasivelymeasure the control to output loop gain and phase.

Figure 2 shows the basic test set up recommended to evaluate the UCC2891EVM.

Figure 2. Recommended EVM Test Configuration

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5.1 Output Load (LOAD1)

5.2 DC Input Source (VIN)

5.3 Network Analyzer

5.4 Recommended Wire Guage

5.5 Fan

EVM Test Setup

For the output load to VOUT, a programmable electronic load set to constant current mode and capable ofsinking between 0A

and 30A

, is used. Using a dc voltmeter, V2, it is also advised to make all outputvoltage measurements directly at J9 and J10 pins. Unless the load has remote sense capability,measuring VOUT at LOAD1 results in some voltage measurement error, especially at higher load current,due to finite voltage drops across the wires between J8 and the electronic load.

The input voltage is a variable DC source capable of supplying between 0 V

and 72 V

at no less than3.5 A

, and connected to J1 and A1 as shown in Figure 2 . For fault protection to the EVM, good commonpractice is to limit the source current to no more than 4 A

for a 36 V input. A dc ammeter, A1 shouldalso be inserted between VIN and J1 as shown in Figure 2 .

A network analyzer can be connected directly to J6 and J7. The UCC2891EVM provides a 51.1- Ωresistor(R25) between the output and the voltage feedback to allow easy non-invasive measurement of thecontrol to output loop response.

The connection between the source voltage, VIN and J1 of the EVM can carry as much as 3.25A

. Theminimum recommended wire size is AWG #20 with the total length of wire less than 8 feet (4 feet input, 4feet return). The connection between J8 of the EVM and LOAD1 can carry as much as 30A

. Theminimum recommended wire size is AWG #16, with the total length of wire less than 8 feet (4 feet output,4 feet return).

Most power converters include components that can be hot to the touch when approaching temperaturesof 605C. Because this EVM is not enclosed to allow probing of circuit nodes, a small fan capable of200-400 LFM is recommended to reduce component temperatures when operating at or above 50%maximum rated load current.

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6 Power Up/Down Test Procedures

Power Up/Down Test Procedures

The following test procedure is recommended primarily for power up and shutting down the EVM.Whenever the EVM is running above an output load of 15 A

, the fan should be turned on. Also, neverwalk away from a powered EVM for extended periods of time.1. Working at an ESD workstation, make sure that any wrist straps, bootstraps or mats are connectedreferencing the user to earth ground before power is applied to the EVM. Electrostatic smock andsafety glasses should also be worn.2. Prior to connecting the DC input source, VIN, it is advisable to limit the source current from VIN to3.5-A maximum. Make sure VIN is initially set to 0 V and connected to J1 as shown in Figure 2 .3. Connect the ammeter A1 (0A to10A range) between VIN and J1 as shown in Figure 2 .4. Connect voltmeter (can optionally use voltmeter from VIN source if available), V1 across VIN as shownin Figure 2 .5. Connect LOAD1 to J8 as shown in Figure 2 . Set LOAD1 to constant current mode to sink 0 A

beforeVIN is applied.6. Connect voltmeter, V2 across J9 and J10 as shown in Figure 2 .7. Increase VIN from 0 V to 36 V

.8. Observe that VOUT is regulating when VIN is at 36 V.9. Increase VIN to 48 V.10. Increase LOAD1 from 0 A to 15 A

.11. Turn on fan making sure to blow air directly on the EVM.12. Increase LOAD1 from 15 A

to 30 A

.13. Decrease LOAD1 to 0 A.14. Decrease VIN from 48 V

to 0 V.15. Shut down VIN.

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7 Power Up/Down Test Procedures

2 6 18 262210 14

IOUT - Output Current - A

VIN = 36 V

VIN = 72 V

VIN = 48 V

Percent Efficiency - %

VOUT = 3.3 V

fS= 300 kHz

OVERALL EFFICIENCY

OUTPUT CURRENT

-40

-60

100 1 k 10 k 100 k

-20

-120

-180

-60

120

180

VIN = 36 V

IOUT = 10 A

gM= -8 dB

FM= 50°

Gain

Phase

f - Frequency - Hz

Gain - dB

Phase - °

GAIN AND PHASE

FREQUENCY

6 18 26 302210 14

IOUT - Output Current - A

VIN = 36 V

VIN = 72 V

VIN = 48 V

PLOSS - Power Loss - W

VOUT = 3.3 V

fS= 300 kHz

POWER LOSS

OUTPUT CURRENT

Power Up/Down Test Procedures

Figure 3.

Figure 5.

Figure 4.

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