Texas Instruments Bq24072 Manual de usuario

SLVU274E–November 2008–Revised January 2017

bq24072/3/4/5/9(T) and bq24230/2 1.5-A Single-Chip Li-Ion and Li-Polymer

Charge Management IC EVM

User's Guide

SLVU274E–November 2008–Revised January 2017

bq24072/3/4/5/9(T) and bq24230/2 1.5-A Single-Chip Li-Ion

and Li-Polymer Charge Management IC EVM

This user’s guide describes the bq24072/3/4/5/9(T) and bq24230/2 (bqTINY-III™) evaluation module

(EVM). The EVM provides a convenient method for evaluating the performance of a charge management

and system power solution for portable applications using the bq24072/3/4/5/9(T) and bq24230/2 product

families. A completely designed and tested module is presented. The charger is designed to deliver up to

1.5 A of continuous current to the system or charger for one-cell Li-ion or Li-polymer applications (see the

data sheet for correct device) using a dc power supply. The charger is programmed from the factory to

deliver 0.9 A of charging current. This EVM was designed as a stand-alone evaluation module, but it also

can be interfaced with the system and host via the connectors and headers.

Contents

1 Introduction ................................................................................................................... 2

2 Considerations When Testing and Using bq24072/3/4/5/9(T) and bq24230/2 ICs ................................. 2

3 Performance Specification Summary ..................................................................................... 3

4 Test Summary................................................................................................................ 4

5 Schematic..................................................................................................................... 8

6 Physical Layouts............................................................................................................. 9

7 Bill of Materials ............................................................................................................. 12

8 References.................................................................................................................. 15

List of Figures

1 Test Diagram................................................................................................................. 5

2 Modes of Operation Tested in Steps 11 Through 13 ................................................................... 6

3 Charger Profile With EN1 = VSS and EN2 = HI, Programmed by ISET ............................................. 7

4 Charge Enabled, Pulled High, Then Low – Disables Charge.......................................................... 7

5 Schematic..................................................................................................................... 8

6 Top Assembly View ......................................................................................................... 9

7 Board Layout – Top Etch Layer.......................................................................................... 10

8 Board Layout – Bottom Etch Layer ...................................................................................... 11

List of Tables

1 Ordering Information ........................................................................................................ 2

2 Performance Specification Summary for bq24072/3/4/5/9(T) and bq24230/2 EVMs............................... 3

3 bq240xx....................................................................................................................... 4

4 HPA282B Bill of Materials ................................................................................................ 12

5 HPA282B Bill of Materials (Continued).................................................................................. 13

6 HPS252B Bill of Materials................................................................................................. 14

7 HPA502A Bill of Materials................................................................................................. 15

Trademarks

bqTINY-III is a trademark of Texas Instruments.

Introduction

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1 Introduction

The bq2407x and bq2432x powers the system while independently charging the battery. This feature

reduces the charge and discharge cycles on the battery, allows for proper charge termination, and allows

the system to run with an absent or defective battery pack. This feature also allows for the system to

instantaneously turn on from an external power source even when using a deeply discharged battery

pack.

This charger has one input and can be programmed to be used with an adapter or USB port as the power

source for the system. In the USB configuration, the host can select from the two preset input maximum

rates of 100 mA and 500 mA. The charger dynamically adjusts the charge rate based on the system load

to stay within the 100-mA or 500-mA maximum limits. An external resistor, RSET1, sets the magnitude of

the charge current. If the charge current exceeds the available input current, the voltage on the OUT pin

drops to the DPPM threshold or the battery voltage, whichever is higher. The charging current is reduced

to what current is available (IBAT = IIN–IOUT).

The integrated circuit (IC) charges the battery in three phases: conditioning, constant current, and

constant voltage. Charge is terminated based on minimum current. A resistor-programmable charge timer

provides a backup safety for charge termination. The charge automatically re-starts if the battery voltage

falls below an internal threshold. Sleep mode is entered when the supply is removed (Vin drops to the

battery voltage).

2 Considerations When Testing and Using bq24072/3/4/5/9(T) and bq24230/2 ICs

Consider the following noteworthy items while testing and using the bq2403x ICs.

The bq24072/3/4/5/9(T) series targets current above a nominal 500 mA (>350 mA) and the difference are

listed in Table 1.

Table 1. Ordering Information

Part Number VOVP VBAT VOUT(REG) VDPM Optional

Function Marking

bq24072RGTR 6.6 V 4.2 V VBAT + 200 mV VO(REG) – 100 mV TD CKP

bq24072RGTT 6.6 V 4.2 V VBAT + 200 mV VO(REG) – 100 mV TD CKP

bq24072TRGTR 6.6 V 4.2 V VBAT + 225 mV VO(REG) – 100 mV TD PAP

bq24072TRGTT 6.6 V 4.2 V VBAT + 225 mV VO(REG) – 100 mV TD PAP

bq24073RGTR 6.6 V 4.2 V 4.4 V VO(REG) – 100 mV TD CKQ

bq24073RGTT 6.6 V 4.2 V 4.4 V VO(REG) – 100 mV TD CKQ

bq24074RGTR 10.5 V 4.2 V 4.4 V VO(REG) – 100 mV ITERM BZF

bq24074RGTT 10.5 V 4.2 V 4.4 V VO(REG) – 100 mV ITERM BZF

bq24075RGTR 6.6 V 4.2 V 5.5 V 4.3 V SYSOFF CDU

bq24075RGTT 6.6 V 4.2 V 5.5 V 4.3 V SYSOFF CDU

bq24075TRGTR 6.6 V 4.2 V 5.5 V 4.3 V SYSOFF OEC

bq24075TRGTT 6.6 V 4.1 V 5.5 V 4.3 V SYSOFF OEC

bq24079RGTR 6.6 V 4.1 V 5.5 V 4.3 V SYSOFF ODI

bq24079RGTT 6.6 V 4.1 V 5.5 V 4.3 V SYSOFF ODI

bq24079TRGTR 6.6 V 4.1 V 5.5 V 4.3 V SYSOFF OED

bq24079TRGTT 6.6 V 4.1 V 5.5 V 4.3 V SYSOFF OED

The bq24079(T) ICs are regulated to 4.1 V. The "T" version uses a voltage-based TS bias, which allows

more flexibility in setting the temperature range, whereas the bq24072/3/4/5 ICs use current-biased TS.

The bq24230/2 family is identical to the bq24073/4 ICs except that they are trimmed and their target

current values nominally are at 300 mA (<450 mA). This family is suited for headset designs. The pinout of

each IC is the same across both families except pin 15 (JMP2 on the EVM); the pin 15 function is listed in

Table 1 under the Optional Function column.

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Performance Specification Summary

SLVU274E–November 2008–Revised January 2017

bq24072/3/4/5/9(T) and bq24230/2 1.5-A Single-Chip Li-Ion and Li-Polymer

Charge Management IC EVM

The two potential sources to power the system (VOUT) are the input source and the battery (adapter or

USB port). The IC is designed to power the system continuously. The battery, in most cases, is the last

line of backup. If the adapter/USB input is not available (or disabled), the battery connects to the system.

In thermal regulation condition (TJ= 125°C not a first-choice design mode of operation), the charge current

is reduced to the battery, and the system still gets its power from the input. The battery supplement is

available in thermal regulation if the VOUT falls to VBAT. In thermal cutoff (~155°C), the input sources are

disconnected, but the internal battery FET connects the battery to VOUT.

3 Performance Specification Summary

Table 2 summarizes the performance specifications of the EVM.

(1) The HPA073 (bq24072/3/4/5/9(T) and bq24230/2) thermal design is optimized (8+vias, 0.031-inch PCB, 2-oz. copper) to give

θJA ~ 27°C/W.

Table 2. Performance Specification Summary for bq24072/3/4/5/9(T) and bq24230/2 EVMs

SPECIFICATION TEST CONDITIONS MIN TYP MAX UNITS

Input dc Voltage, VI(AC) 4.75 5 6.5 Volts

Battery Charge Current, IO(CHG) 1 1.5 Amperes

Power Dissipation, bq24072/3/4/5/9(T) and bq24230/2

IC, 1 Cell Pdiss = (Vin-Vout)Iout +(Vin-Vbat)Ibat See(1) Watts

3.1 Performance Recommendations

This IC is a linear battery charger and also powers the system from the input via the linear regulator

output. The key here is that this is a linear device that is most efficient when the input voltage is not too far

above the battery voltage (Vin = 4.75 V to 5.5 V). Too low of input voltage (less than the OUT voltage plus

the dropout voltage) results in degraded performance. Excessive input voltage (>5.5 V) results in excess

power dissipation and reduced performance via thermal regulation. The IC is rated to 28 V, and will not be

damaged with Vin voltages less than this, but any Vin voltage over the overvoltage protection (OVP)

threshold disables the IC. Thus, the recommended operating range for maximum performance is between

4.75 V and 5.5 V, with a preference toward the lower values.

Test Summary

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4 Test Summary

This section covers the setup and tests performed in evaluating the EVM.

4.1 Equipment

• Power supply (+5.25 ±0.25 Vdc), current limit set to 2 A ±0.2 A

• Three Fluke 75 DMMs (equivalent or better)

• Oscilloscope, Model TDS220 (equivalent or better)

4.2 Equipment and EVM Setup

• Preset P/S#1 to 5.25 V ±0.25 V, 2 A ±0.25-A current limit, turn off and connect to J1-IN/GND ( + to IN

and – to GND)

• Connect a 10-Ω, 10-W resistor to J2-OUT/VSS

• Connect a fully discharged (Vbat <2.8 V) Battery to J3-BAT+/VSS (+ to BAT+ and – to VSS).

• Apply the jumpers as per Table 3.

• For the bq2407xEVM, adjust the potentiometers as follows (measure resistance from TP# to VSS):

– R8 (ILIM-TP12) = 750 Ω(743 to 757); R11 (ISET-TP16) = 1 kΩ(0.98 kΩto 1.02 kΩ) and R16 (TS-

TP1) = 7.5 kΩ(7.3 kΩto 7.7 kΩ); and for ’74 (-003): R10 (ITERM-TP15) = 3 kΩ(2.98 kΩto

3.02 kΩ).

• For the bq2423xEVM, adjust the potentiometers as follows (measure resistance from TP# to VSS):

– R8 (ILIM-TP12) = 750 Ω(743 to 757); R11 (ISET-TP16) = 2.96 kΩ(2.93 kΩto 2.99 kΩ) and R16

(TS-TP1) = 7.5 kΩ(7.3 kΩto 7.7 kΩ); and for ’74 (-006): R10 (ITERM-TP15) = 3 kΩ(2.98 kΩto

3.02 kΩ).

Table 3. bq240xx

Jumper '72 '73 or '230 '74 or '232 '75

JMP1 RES–TMR RES–TMR RES–TMR RES–TMR

JMP2 TD–Vss TD–Vss TD–Vss TD–Vss

JMP3 CE–Vss CE–Vss CE–Vss CE–Vss

JMP4 EN2–HI EN2–HI EN2–HI EN2–HI

JMP5 EN1–Vss EN1–Vss EN1–Vss EN1–Vss

OUT

GND

R8-ILIM

TMR

5.25 VDC

EN1

JMP5

JMP4

EN2

JMP3

VSS

BAT+

VSS

R16-TS

JMP2

JMP1

R10-ITERM R11-ISET

VSS = GND

bq24072/3/4/5 EVM

HPA282 - UUT

10 WDMM

DMM

#3 R2

0.1 W

4.2 V Li-Ion Cell

P/S

CH 1

CH 2

CH 4

CH 3

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Test Summary

SLVU274E–November 2008–Revised January 2017

bq24072/3/4/5/9(T) and bq24230/2 1.5-A Single-Chip Li-Ion and Li-Polymer

Charge Management IC EVM

Figure 1. Test Diagram

4.3 Test Procedure

1. Verify that the equipment and EVM is set up according to the preceding section.

2. Verify that VOUT is approximately equal to VBAT

3. Turn on P/S#1, +5.25-Vdc supply to the UUT.

4. Verify VBAT is between 2.4 Vdc and 3 Vdc, and the charger is in precharge state: LEDs CHG (D1) and

PGOOD (D2) are on. If VBAT is above the low-voltage threshold (V(LOWV) ~3 V), then the IC is in fast-

charge mode. If the IC is in fast charge, skip step 7.

5. Verify DMM#3, IBAT is ~9 mV or ~0.09 A

6. Verify that VOUT for bq24072 is ~200 mV above the battery voltage or a minimum of 3.4 Vdc. For

bq24073/4 verify that VOUT is ~4.4 Vdc. Verify that bq24075/9(T) is ~5.5 Vdc for VIN > 5.6 V and equal

to VIN for Vin < 5.6 V.

7. Allow the battery to charge until VBAT is between 3.3 Vdc and 4 Vdc. The charger delivers the

programmed constant current to the battery unless the input cannot source the required current.

8. Verify IBAT is ~88 mV or ~0.9 A (for a 1-kΩresistor on ISET).

9. Verify VOUT : bq24072 – ~200 mV above the battery voltage.

10. Set JMP5 (EN1) to HI, and verify that the chip has been disabled, D1 (CHG) has turned off, and the

P/S#1 current has dropped to zero. The internal battery FET must be on, connecting the BAT pin to

the OUT pin. Verify that the voltage on the OUT pin is close to the battery voltage. See Figure 2 for

EN1/2 modes of operation.

11. SET JMP4 (EN2) to VSS. Verify that the input current is less than 500 mA (USB 500-mA mode). If the

input current is restricted due to USB mode, or if the adapter is current limiting, the OUT pin drops in

voltage and enters the DPM mode, if the system current is less than the restricted input current. This

IC must be in DPM mode with the system voltage at the DPM

12. Set JMP5 (EN1) to VSS and verify USB 100-mA mode. The system load is more than the allowed 100

mA on the input, so the OUT voltage drops to the battery voltage, and the battery FET is switched on

Vin

Vout

Vbat Suspend

DPPM Mode

Battery Supplement Mode

Normal Mode

Chip Disable

BAT Current - Vbat 0.1 W

EN ->VSS USB100

EN2 ->HI USB 500

t - Time - 1 ms/div

Test Summary

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and supplements the input current. Verify that Vout has dropped just below the battery voltage and the

battery is supplying Ibat, ~(Vout/10 Ω– 100 mA).

13. Set JMP4 (EN2) to HI to return to the ISET mode where the programmed current is ~0.9 A.

14. Set JMP3 to HI, and verify that the charging is disabled and that the CHG LED (D1) turns off. Verify

that the system is still powered by the input. See Figure 3.

15. Set JMP3 to VSS, and verify that charging continues and that D1 turn on.

16. Record the OUT voltage and battery charge current. Adjust R8 CCW until the input current starts to be

reduced (~2 turns). Note how the OUT voltage drops and the charge current is reduced as the input

current limit loops kicks in and limits the input current. Adjust R8 to its original position

17. On the bq24075 IC, set JMP2 HI, and verify that the BAT FET turns off and allows no charging or

discharging of the battery.

18. Adjust the R16 (TS-Pot) up or down until the TS threshold is reached. Verify that the charging current

is disabled. Return the TS resistance within the normal range and verify the continued charging

operation.

19. Allow the battery to continue to charge until the battery reaches voltage regulation, ~4.2 V ±40 mV for

bq24072/3/4/5/9(T) and 4.1 V ±4 mV for bq24079(T). Verify that the voltage is regulated as the current

tapers over the next one-to-two hours depending on the battery capacity. See Figure 4 for a charge

profile (time in plot is not proportional to actual charge time).

20. Verify that the current tapers to around 90 mA (9 mV on DMM#3) when termination occurs. Note on

the ’72 and ’73 ICs that termination can be disabled by setting the TD pin HI (JMP2). Also note that on

’74, the ITERM resistor (R10) can adjust the termination threshold.

21. Verify that the LED, D1, turns off and the current drops to zero.

22. Turn off P/S#1, and allow the system load to discharge the battery until a refresh charge is initiated.

Verify that the battery voltage dropped to ~4.1 V for bq24072/3/4/5 and to 4.0 V for bq24079(T) prior to

refresh.

23. Verify that the LED, D1, did not turn on for the refresh cycle.

This concludes the procedure for demonstrating the features of this power path charger. See the data

sheet for more detailed explanations and instructive waveforms.

Figure 2. Modes of Operation Tested in Steps 11 Through 13

Vin

Vout

Vbat

CE (Charge Enable) pin toggled

Vbat_0.1 W

t - Time - 1 ms/div

Vin

Vout

Vbat

OUT ss Pre-Charge

BAT Current - Vbat 0.1 W

Fast-Charge-CC

t - Time - 1 ms/div

Voltage Reg

Termination

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Test Summary

SLVU274E–November 2008–Revised January 2017

bq24072/3/4/5/9(T) and bq24230/2 1.5-A Single-Chip Li-Ion and Li-Polymer

Charge Management IC EVM

Figure 3. Charger Profile With EN1 = VSS and EN2 = HI, Programmed by ISET

Figure 4. Charge Enabled, Pulled High, Then Low – Disables Charge

Schematic

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5 Schematic

The bq24072/3/4/5/9(T) and bq24230/2 EVM schematic is shown in Figure 5

Figure 5. Schematic

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Physical Layouts

SLVU274E–November 2008–Revised January 2017

bq24072/3/4/5/9(T) and bq24230/2 1.5-A Single-Chip Li-Ion and Li-Polymer

Charge Management IC EVM

6 Physical Layouts

This section contains the board layout and assembly drawings for the EVM.

6.1 Board Layout

Figure 6 shows the top assembly view of the EVM. Figure 7 shows the top etch layer of the EVM and

Figure 8 shows the bottom etch layer.

Figure 6. Top Assembly View

Physical Layouts

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Figure 7. Board Layout – Top Etch Layer

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