Texas Instruments ADS7042EVM-PDK Manual de usuario

User’s Guide

ADS7042EVM-PDK, ADS7049-Q1EVM-PDK, and

ADS7057EVM-PDK Evaluation Module

ABSTRACT

This user's guide describes the characteristics, operation, and use of the ADS7042EVM-PDK, ADS7049-

Q1EVM-PDK, and ADS7057EVM-PDK evaluation modules (EVM), referred to collectively as the

ADS704X-5XEVM-PDK. Each kit functions as an evaluation platform for two different low-power, small-size,

general-purpose successive approximation register (SAR) analog-to-digital converters (ADCs). These ADCs

include the 12-bit, 1-MSPS, single-ended input ADS7042, the 12-bit, 2-MSPS, single-ended ADS7049-Q1, the

12-bit, 3-MSPS, differential input ADS7047, and the 14-bit, 2.5-MSPS, differential input ADS7057. Moreover,

unique EVM design enables evaluation of the entire family of ADS704x and ADS705x devices through

minor modifications. Finally, this EVM platform eases device analysis using hardware, software, and computer

connectivity through the universal serial bus (USB) interface.

This user's guide includes complete circuit descriptions, schematic diagrams, and a bill of materials. Throughout

this document, the abbreviation EVM and the term evaluation module are synonymous with any EVM

(ADS7042EVM-PDK, ADS7049-Q1EVM-PDK, or ADS7057EVM-PDK), unless otherwise noted.

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Table of Contents

1 ADS704X-5XEVM-PDK Overview...........................................................................................................................................3

2 Introduction to the ADS704X-5XEVM....................................................................................................................................5

2.1 Analog Inputs..................................................................................................................................................................... 5

2.2 Power Supplies.................................................................................................................................................................. 7

2.3 Digital Interface and Communication................................................................................................................................. 8

2.4 I2C Bus for Onboard EEPROM.......................................................................................................................................... 9

3 ADS704X-5XEVM Software Installation.............................................................................................................................. 10

4 EVM Operation...................................................................................................................................................................... 13

4.1 Connecting the Hardware................................................................................................................................................ 13

4.2 EVM GUI Global Settings for ADC Control...................................................................................................................... 14

4.3 Time Domain Display....................................................................................................................................................... 15

4.4 Spectral Analysis..............................................................................................................................................................16

4.5 Histogram Analysis.......................................................................................................................................................... 17

4.6 Updating EEPROM After ADC Replacement...................................................................................................................17

5 Bill of Materials, Layout, and Schematic............................................................................................................................ 19

5.1 Bill of Materials.................................................................................................................................................................19

5.2 Layout.............................................................................................................................................................................. 21

5.3 Schematic........................................................................................................................................................................ 23

Trademarks

LabVIEW™ is a trademark of National Instruments.

Microsoft® and Windows® are registered trademarks of Microsoft Corporation.

All trademarks are the property of their respective owners.

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1 ADS704X-5XEVM-PDK Overview

The ADS704X-5XEVM-PDK is a platform for evaluating the performance of the ADS704x and ADS705x family of

ADCs. The ADS704X-5XEVM-PDK includes the following features:

• ADS704X-5XEVM for diagnostic testing and accurate performance evaluation of each ADC on the board

• USB powered—no external power supply is required

• A precision host interface (PHI) controller that provides a convenient communication interface to each ADC

over USB 2.0 (or higher) for power delivery as well as digital input and output

• Microsoft® Windows® 8 and Windows® 10 operating systems

• Easy-to-use evaluation software for 64-bit Microsoft® Windows®

• A software suite that includes a graphical user interface (GUI) and tools for data capture, histogram analysis,

and spectral analysis. This suite also has a provision for exporting data to a text file for post-processing

The PHI board primarily serves three functions:

• Provides a communication interface from the EVM to the computer through a USB port

• Provides the digital input and output signals necessary to communicate with each ADC

• Supplies power to all active circuitry on the ADS704X-5XEVM board

Each ADS704X-5XEVM board includes the peripheral analog circuits and components required to extract

optimum performance from the ADC. Moreover, each ADS704X-5XEVM includes two complete ADC signal

chains: one that supports a single-ended input ADC (see Section 2.1.1), and another that supports a differential

input ADC (see Section 2.1.2). Table 1-1 defines which ADCs are populated by default on each EVM.

Table 1-1. Default ADCs Populated on Each EVM Variant

EVM Name Single-Ended ADC (U3) Differential ADC (U5)

ADS7042EVM-PDK ADS7042 ADS7057

ADS7049-Q1EVM-PDK ADS7049-Q1 ADS7047

ADS7057EVM-PDK ADS7042 ADS7057

Additionally, the ADS704X-5XEVM includes the following features:

• External signal source from subminiature version A (SMA) connectors or header pins

• Option to use external power supplies

• Serial interface header for easy connection to the PHI controller

• Pin connections to monitor digital signals with a logic analyzer

• Two ultra-low noise, low-dropout (LDO) regulators for excellent single-supply regulation of all analog circuits

• Accommodates all package options for 14 different ADCs using four different device footprints, as per Table

1-2

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Table 1-2. ADCs Supported by the ADS704X-5XEVM

Supported ADC Populated on EVM? Input Type Package Options (Designator)

ADS7040 n/a Single-ended X2QFN (U8), VSSOP (U3)

ADS7041 n/a Single-ended X2QFN (U8), VSSOP (U3)

ADS7042 ADS7042EVM-PDK,

ADS7057EVM-PDK Single-ended X2QFN (U8), VSSOP (U3)

ADS7043 n/a Pseudo-differential X2QFN (U8), VSSOP (U3)

ADS7044 n/a Differential X2QFN (U5), VSSOP (U9)

ADS7046 n/a Single-ended X2QFN (U8)

ADS7047 ADS7049-Q1EVM-PDK Differential X2QFN (U5)

ADS7052 n/a Single-ended X2QFN (U8)

ADS7054 n/a Differential X2QFN (U5)

ADS7056 n/a Single-ended X2QFN (U8)

ADS7057 ADS7042EVM-PDK,

ADS7057EVM-PDK Differential X2QFN (U5)

ADS7029-Q1 n/a Single-ended VSSOP (U3)

ADS7039-Q1 n/a Single-ended VSSOP (U3)

ADS7049-Q1 ADS7049-Q1EVM-PDK Single-ended VSSOP (U3)

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2 Introduction to the ADS704X-5XEVM

Each ADS704X-5XEVM board includes the peripheral analog circuits and components required to extract

optimum performance from each ADC signal chain. Important portions of the EVM are highlighted in Figure

2-1, and described in the subsequent sections.

Figure 2-1. Important Subsections of the ADS704X-5XEVM

2.1 Analog Inputs

As shown in Figure 2-1, the ADS704X-5XEVM has two analog input paths: a single-ended input path highlighted

in red, and a differential input path highlighted in green. SMA connectors and headers are included on each path

to connect external signals. These signals feed into a driver amplifier and then to one of two ADC footprints,

where the digital output is supplied to the PHI via J4.

2.1.1 Single-Ended Input Path

The single-ended input path consists of an inverting driver amplifier, an RC circuit, and two ADC footprints.

Figure 2-2 shows the single-ended input path schematic.

OPA836IDBVR

EVM_DVDD

AGND

R12

R11

49.9R18

49.9R20

49.9R19 SDO_A

SCLK_AB

CS_A

AGND

AVDD

OPA_VDD

OPA_VSS

0R37

DNP

AGND

JP1

AGND

U3_AINM

U3_AVDD

U3_DVDD

U3_SCLK

U3_SDO

U3_CS

U3_AVDD

U3_DVDD

U3_SCLK

U3_SDO

U3_CS

U3_AINP

U3_AINM

AGND

U3_AINP

R40

AINM

1.00k

R36

1.00k

R35

CS 4

SDO 3

SCLK 2

DVDD 1

GND

AVDD 7

AINP

AINM

ADS7042IDCUR

AGND

100

R42

VBIAS

CS 1

SDO 2

SCLK 3

DVDD 4

GND

AVDD 6

AINP

AINM

ADS7042IRUGR

DNP

100nFC12DNP

100nF

C10

10nF

C14

1µF

16.0

R14

16.0

R38

300pF

C11

Replace R43 and R44 with 100nF

capacitors when OPA_VSS ≠ AGND

R43

Figure 2-2. Single-Ended Input Path on the ADS704X-5XEVM

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Signals connected to the single-ended input path are applied to an inverting amplifier whose common-mode

voltage is set by VBIAS. The output of the amplifier connects to an RC filter (R14, R38, and C11) that then

connects to the ADC input. A compensation capacitor can be added to the amplifier feedback loop via C12, but

is not required for good performance. The amplifier power supplies are connected by default to the OPA_VDD

and OPA_VSS supplies. Section 2.2 explains how to modify the EVM to use external supplies. If desired, the

amplifier can be bypassed by populating R37 with a 0-Ω resistor and removing R14 and R35.

Figure 2-2 also depicts all connections to the ADC (U3). Each power-supply connection has a 1-μF decoupling

capacitor. The supply connections also have a series 0-Ω resistor that can be removed for the purpose

of making external current measurements. Moreover, each digital input has a 49.9-Ω series resistor. These

resistors smooth the edges of the digital signals to minimize overshoot and ringing.

Finally, Figure 2-2 identifies a do-not-populate (DNP) component in U8. This ADC footprint is on the bottom

of the board and can be used to evaluate any single-ended ADC in an X2QFN package listed in Table 1-2.

However, ensure that any device in U3 is cleanly removed before soldering a device in U8. Section 4.6 explains

how to use the ADS704X-5XEVM GUI to update the EEPROM when the ADC is replaced.

2.1.2 Differential Input Path

The differential input path consists of a differential driver amplifier, an RC circuit, and two ADC footprints. Figure

2-3 shows the differential input path schematic.

AGND

VBIAS

49.9R15

49.9R17

49.9R16 SDO_B

SCLK_AB

CS_B

V+

8V- 4

OPA2836QDGKRQ1

U7C

AGND

16.0

R25

16.0

R27

300pF

C17

1.00k

R23

1.00k

R24

1.00k

R29

1.00k

R30

AGND

OPA_VSS

EVM_DVDD

AGND

R22

R21

AGND

AVDD

JP3

OPA_VDD

AGND

JP2

AGND

U5_AVDD

U5_DVDD

U5_SCLK

U5_SDO

U5_CS

U5_AINP

U5_AINM

AGND

U5_AVDD

U5_DVDD

U5_SCLK

U5_SDO

U5_CS

U5_AINP

U5_AINM

OPA2836QDGKRQ1

U7B

OPA2836QDGKRQ1

U7A

AVDD 7

DVDD 1

CS 4

AINM

AINP

SCLK 2

SDO 3

GND

ADS7044IDCUR

DNP

CS 1

SDO 2

SCLK 3

DVDD 4

GND

AVDD 6

AINP

AINM

ADS7057IRUGR

100nF

C13

1µF

C15

1µF

C16

Replace R43 and R44 with 100nF

capacitors when OPA_VSS ≠ AGND

R44

100nFC23DNP

100nFC24DNP

Figure 2-3. Differential Input Path on the ADS704X-5XEVM

Signals connected to the differential input path are applied to a differential amplifier in an inverting configuration

whose common-mode voltage is set by VBIAS. The output of the amplifier connects to an RC filter (R25, R27,

and C17) that then connects to the ADC input. Each amplifier feedback loop has an option for a compensation

capacitor via C23 or C24, but these capacitors are not required for good performance. The amplifier power

supplies are connected by default to the OPA_VDD and OPA_VSS supplies. Section 2.2 explains how to modify

the EVM to use external supplies.

Figure 2-3 also shows all connections to the ADC (U5). Each power-supply connection has a 1-μF decoupling

capacitor. The supply connections also have a series 0-Ω resistor that can be removed for the purpose

of making external current measurements. Moreover, each digital input has a 49.9-Ω series resistor. These

resistors smooth the edges of the digital signals to minimize overshoot and ringing.

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Finally, Figure 2-3 identifies a do-not-populate (DNP) component in U9. This ADC footprint is on the bottom of

the board and can be used to evaluate any differential ADC in a VSSOP package in Table 1-2. However, ensure

that any device in U5 is cleanly removed before soldering a device in U9. Section 4.6 explains how to use the

ADS704X-5XEVM GUI to update the EEPROM when the ADC is replaced.

2.2 Power Supplies

The default state of the EVM has all power supplies derived from the USB power and delivered by the PHI

controller. The 3.3-V ADC digital supply voltage (DVDD) is provided by the PHI via pin 50 on J4 (see Figure

2-7). The PHI also provides a regulated 5.5-V power rail that feeds into two LDOs on the EVM. These LDOs

generate a low-noise, 3.6-V (nominal) supply voltage for the amplifier (OPA_VDD) and a low-noise, 3.3-V

(nominal) analog supply voltage for the ADC (AVDD). Figure 2-4 shows the two LDO circuits used on the

ADS704X-5XEVM.

OPA_VDD

100k

AVDD

AGND

EVM_REG_5V5

BYPASS 4

FB 5

OUT 6

GND

TPS79101DBVR

BYPASS 4

FB 5

OUT 6

GND

TPS79101DBVR

15pF

C19

15pF

51.1k

R33

30.1k

R34

30.1k

R32

59.0k

R31

10V

10uF

10V

10uF

C20

R39

DNP

10nF

C18

10nF

C21

1µF

100k

301k

AVDD/4

AGND

AVDD/2

Figure 2-4. Power Tree on the ADS704X-5XEVM

In Figure 2-4, the top LDO (U1) has an adjustable output set by resistors R31 and R32 while the bottom

LDO (U2) has an adjustable output set by resistors R33 and R34. Modify these resistor values if a different

OPA_VDD or AVDD voltage is desired. Ensure that the input, absolute, and common-mode voltage limitations

for all components are within data sheet limits when modifying the power supplies. See the LDO data sheet for

more information on how to choose resistor values for a specific output voltage.

If external power supplies are desired, remove resistors R1 and R6 in Figure 2-4 to disconnect both LDOs from

the power-supply circuit. Connector JP4 in Figure 2-5 can then be used to provide direct power to OPA_VDD,

AVDD, and OPA_VSS.

JP4

OPA_VDD

AGND

OPA_VSS

AVDD

Figure 2-5. External Power-Supply Header on the ADS704X-5XEVM

If OPA_VSS is connected to any voltage other than AGND, remove R4 in Figure 2-5 and replace R43 and R44

per the instructions in Figure 2-2. Another important consideration if OPA_VSS is modified is that the V– input

(pin 4) on the buffer amplifier in Figure 2-6 is hard-wired to AGND and is therefore unaffected when the voltage

on OPA_VSS is changed.

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OPA2320AIDGKR

U10A

OPA2320AIDGKR

U10B

AGND

100nF

C25

OPA_VDD

R45

DNP

AGND

AVDD/4

VBIAS

AINM

AVDD/2

Figure 2-6. Buffer Amplifier Circuit on the ADS704X-5XEVM

The buffer amplifier in Figure 2-6 prevents the AVDD/4 resistor divider (R3 and R5) from loading the amplifier

inputs and the AVDD/2 resistor divider (R7 and R9) from loading the ADC inputs (see Figure 2-4). As per Section

2.1.1, VBIAS sets the driver amplifier common-mode voltage for both signal paths. AINM is only required if U3 or

U5 in Figure 2-2 is populated with the ADS7043. This specific ADC has a pseudo-differential input that requires

the AINM pin to be set to AVDD / 2 ±100 mV.

When the ADS7043 is used on the ADS704X-5XEVM:

• Populate R39 in Figure 2-4 with a 0-Ω resistor

• Populate R45 in Figure 2-6 with a 0-Ω resistor

• Depopulate R40 in Figure 2-2

2.3 Digital Interface and Communication

The EVM interfaces with the PHI and communicates with the computer over the USB. There are three devices

on the EVM with which the PHI communicates: the two ADCs (over SPI) and the EEPROM (over I2C). The

EEPROM comes preprogrammed with the information required to configure and initialize each ADC populated

by default on the ADS704X-5XEVM. Therefore, communication with the EEPROM is only required if the user

removes and replaces one of the default ADCs. See Section 2.4 for more information.

All ADCs supported by the ADS704X-5XEVM use SPI serial communication in mode 1 (CPOL = 0, CPHA

= 1). The ADS704X-5XEVM offers 49.9-Ω resistors between the SPI signals to aid with signal integrity (see

Figure 2-2) because the serial clock (SCLK) frequency can be as fast as 60 MHz. Typically, in high-speed SPI

communication, fast signal edges can cause overshoot; these 49.9-Ω resistors slow down the signal edges to

minimize signal overshoot. JP5 provides test points to measure the digital signals, as illustrated in Figure 2-7.

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EVM_ID_SDA

EVM_ID_SCL

EVM_REG_5V5

EVM_ID_PWR

SDO_A

SCLK_AB

AGND

11 11

13 13

15 15

17 17

19 19

21 21

23 23

25 25

27 27

29 29

31 31

33 33

35 35

37 37

39 39

41 41

43 43

45 45

47 47

49 49

51 51

53 53

55 55

57 57

59 59

GND

MP1

GND

MP2 GND MP3

GND MP4

QTH-030-01-L-D-A

EVM_ID_WP

CS_B

SDO_B

CS_A

AGND

1 2

3 4

5 6

7 8

9 10

JP5

TSW-105-07-G-D

R13

EVM_DVDD EVM_CAP

Figure 2-7. Digital Communication and PHI Connector on the ADS704X-5XEVM

2.4 I2C Bus for Onboard EEPROM

The circuit shown in Figure 2-8 is used with the PHI board to identify the specific ADCs populated on the

EVM and enable the correct GUI settings. The user does not need to modify or interact with this circuit during

EVM operation. As a result, switch S1 is set by default to enable the EEPROM write protect and must not be

altered unless the ADC is modified as per Section 2.1.1 or Section 2.1.2. Update the EEPROM when the ADC is

replaced using the ADS704X-5XEVM GUI, as per Section 4.6.

EVM_ID_SDA

EVM_ID_SCL

EVM_ID_PWR EVM_ID_PWR

AGND

VSS

4SDA 5

SCL 6

WP 7

VCC 8

BR24G32FVT-3AGE2

CAS-120TA

0R10

DNP EVM_ID_WP

10.0k

R26

10.0k

R28

100nF

C22

Figure 2-8. EEPROM Circuit on the ADS704X-5XEVM

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3 ADS704X-5XEVM Software Installation

Download the latest version of the EVM GUI installer from the Tools and Software section on the

ADS704X-5XEVM product folder and run the GUI installer to install the EVM GUI software on your computer.

Note

Manually disable any antivirus software running on the computer before downloading the EVM GUI

installer onto the local hard disk. Depending on the antivirus settings, an error message may appear

or the installer.exe file may be deleted.

As shown in Figure 3-1, accept the license agreements and follow the on-screen instructions to complete the

installation.

Figure 3-1. Software Installation and Prompts

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