PulseBlasterESR-PRO-200-cPCI
on the board's s rface. Stat s bits are also available on IDC headers, allowing the ser or an external device
to monitor the stat s of the P lseBlaster device. For more information abo t the connections available,
please see “V. Connecting to P lseBlaster Devices.”
Timing Characteristics
The innovative architect re of the P lseBlaster processor core allows p lses/delays to be as short as one
clock cycle (5 ns) and last p to 252 clock cycles (260 days). Regardless of the timing d ration sed, the
timing resol tion is one clock cycle. A program can have both long and short p lses/delays in the same
program, and both will be acc rate to a single clock cycle.
Instruction Set Flow Control)
The P lseBlaster devices feat res a set of commands for highly flexible program flow control. The
specialized microcontroller allows for programs to incl de branches, s bro tines, and loops p to 8 nested
levels deep. These commands allow the ser to perform repetitio s events with ease.
Instr ction exec tion time can be set by the ser. The minim m instr ction exec tion time is five clock
cycles (25 ns), and the maxim m is 252 clock cycles (260 days). To create p lses with d ration shorter than
five clock cycles, the Short P lse Feat re will need to be sed. The Short P lse Feat re allows p lse
d ration to be as short as one clock cycle (5 ns); however, at least five clock cycles are still req ired for the
P lseBlaster processor core to process the instr ction. For more information abo t P lseBlaster processor
core architect re, please see the “Instr ction Set Architect re” of Using SpinAPI in C/C++ in P lseBlaster
Programming, fo nd at: http://www.spincore.com/s pport/spinapi/ sing_spin_api_pb.shtml.
On-Board Clock
The P lseBlaster device accepts an on-board 50 MHz oscillator. The on-board oscillator's freq ency is
internally m ltiplied to 200 MHz by sing a Phase-Locked Loop (PLL). The device can be externally clocked
by removing the oscillator and attaching an eq ivalent external so rce to the oscillator mo nt. The
P lseBlaster device does not have on-board termination for the clock inp t signal. Applying less than 0.0 V or
more than 3.3 V to the clock inp t pins will damage the P lseBlaster device.
CAUTION: Incorrectly attaching an external clock source will damage the Pulse lasterESR-PRO-200-
cPCI. Contact SpinCore Technologies, Inc. if you would like information on how to use an external clock
source.
Device Memory
The memory will hold p to 4096 instr ctions. Programs do not need to fill the memory; they can be as
short as desired. If larger device memory is req ired, please contact SpinCore Technologies, Inc.
http://www.spincore.com 7 2017/01/24
