Silicon Laboratories C8051F120 Manual de usuario

High-Speed Mixed-Signal ISP FLASH MCU Family

C8051F120/1/2/3/4/5/6/7

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

ANALOG PERIPHERALS

-SAR ADC

•12-Bit (C8051F120/1/4/5)

•10-Bit (C8051F122/3/6/7)

•±1LSBINL

•Programmable Throughput up to 100 ksps

•Up to 8 External Inputs; Programmable as Single-Ended or

Differential

•Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5

•Data-Dependent Windowed Interrupt Generator

•Built-in Temperature Sensor

-8-bit ADC

•Programmable Throughput up to 500 ksps

•8 External Inputs (Single-Ended or Differential)

•Programmable Amplifier Gain: 4, 2, 1, 0.5

-Two 12-bit DACs

•Can Synchronize Outputs to Timers for Jitter-Free Wave-

form Generation

-Two Analog Comparators

-Voltage Reference

-VDD Monitor/Brown-Out Detector

ON-CHIP JTAG DEBUG & BOUNDARY SCAN

-On-Chip Debug Circuitry Facilitates Full- Speed, Non-

Intrusive In-Circuit/In-System Debugging

-Provides Breakpoints, Single-Stepping, Watchpoints,

Stack Monitor; Inspect/Modify Memory and Registers

-Superior Performance to Emulation Systems Using ICE-

Chips, Target Pods, and Sockets

-IEEE1149.1 Compliant Boundary Scan

-Complete Development Kit

HIGH SPEED 8051 µC CORE

-Pipelined Instruction Architecture; Executes 70% of

Instruction Set in 1 or 2 System Clocks

-Up to 100 MIPS (C8051F120/1/2/3) or 50 MIPS

(C8051F124/5/6/7) Throughput using Integrated PLL

-2-cycle 16 x 16 MAC Engine (C8051F120/1/2/3)

-Flexible Interrupt Sources

MEMORY

-8448 Bytes Internal Data RAM (8k + 256)

-128k Bytes Banked FLASH; In-System programmable in

1024-byte Sectors

-External 64k Byte Data Memory Interface (programma-

ble multiplexed or non-multiplexed modes)

DIGITAL PERIPHERALS

-8 Byte-Wide Port I/O (C8051F120/2/4/6); 5V tolerant

-4 Byte-Wide Port I/O (C8051F121/3/5/7); 5V tolerant

-Hardware SMBus™ (I2C™ Compatible), SPI™, and

Two UART Serial Ports Available Concurrently

-Programmable 16-bit Counter/Timer Array with

6 Capture/Compare Modules

-5 General Purpose 16-bit Counter/Timers

-Dedicated Watch-Dog Timer; Bi-directional Reset Pin

CLOCK SOURCES

-Internal Precision Oscillator: 24.5 MHz

-Flexible PLL technology

-External Oscillator: Crystal, RC, C, or Clock

POWER SUPPLIES

-Supply Range: 2.7-3.6V (50 MIPS) 3.0-3.6V (100 MIPS)

-Power Saving Sleep and Shutdown Modes

100-PIN TQFP OR 64-PIN TQFP PACKAGING

-Temperature Range: -40°C to +85°C

JTAG

128KB

ISP FLASH

8448 B

SRAM

16 x 16 MAC

('F120/1/2/3)

10/12-bit

100ksps

ADC

CLOCK / PLL

CIRCUIT

PGA

VREF

12-Bit

DAC

TEMP

SENSOR

VOLTAGE

COMPARATORS

ANALOG PERIPHERALS

Port 0

Port 1

Port 2

Port 3

CROSSBAR

DIGITAL I/O

HIGH-SPEED CONTROLLER CORE

DEBUG

CIRCUITRY

INTERRUPTS

8051 CPU

(50 or 100MIPS)

12-Bit

DAC

8-bit

500ksps

ADC

Port 4

Port 5

Port 6

Port 7

External Memory Interface

100 pin

64 pin

PGA

UART0

SMBus

SPI Bus

PCA

Timer 0

Timer 1

Timer 2

Timer 3

Timer 4

UART1

AMUX

C8051F120/1/2/3/4/5/6/7

2 Rev. 1.2

Notes

C8051F120/1/2/3/4/5/6/7

Rev. 1.2 3

TABLE OF CONTENTS

1. SYSTEM OVERVIEW .........................................................................................................19

1.1. CIP-51™ Microcontroller Core ......................................................................................25

1.1.1. Fully 8051 Compatible ..........................................................................................25

1.1.2. Improved Throughput ............................................................................................25

1.1.3. Additional Features................................................................................................26

1.2. On-Chip Memory ............................................................................................................27

1.3. JTAG Debug and Boundary Scan ...................................................................................28

1.4. 16 x 16 MAC (Multiply and Accumulate) Engine..........................................................29

1.5. Programmable Digital I/O and Crossbar .........................................................................30

1.6. Programmable Counter Array .........................................................................................31

1.7. Serial Ports.......................................................................................................................32

1.8. 12-Bit Analog to Digital Converter.................................................................................33

1.9. 8-Bit Analog to Digital Converter...................................................................................34

1.10.Comparators and DACs...................................................................................................35

2. ABSOLUTE MAXIMUM RATINGS..................................................................................36

3. GLOBAL DC ELECTRICAL CHARACTERISTICS ......................................................37

4. PINOUT AND PACKAGE DEFINITIONS........................................................................39

5. ADC0 (12-BIT ADC, C8051F120/1/4/5 ONLY) ..................................................................49

5.1. Analog Multiplexer and PGA..........................................................................................49

5.2. ADC Modes of Operation ...............................................................................................51

5.2.1. Starting a Conversion.............................................................................................51

5.2.2. Tracking Modes .....................................................................................................52

5.2.3. Settling Time Requirements ..................................................................................53

5.3. ADC0 Programmable Window Detector.........................................................................60

6. ADC0 (10-BIT ADC, C8051F122/3/6/7 ONLY) ..................................................................67

6.1. Analog Multiplexer and PGA..........................................................................................67

6.2. ADC Modes of Operation ...............................................................................................69

6.2.1. Starting a Conversion.............................................................................................69

6.2.2. Tracking Modes .....................................................................................................70

6.2.3. Settling Time Requirements ..................................................................................71

6.3. ADC0 Programmable Window Detector.........................................................................78

7. ADC2 (8-BIT ADC) ...............................................................................................................85

7.1. Analog Multiplexer and PGA..........................................................................................85

7.2. ADC2 Modes of Operation .............................................................................................86

7.2.1. Starting a Conversion.............................................................................................86

7.2.2. Tracking Modes .....................................................................................................86

7.2.3. Settling Time Requirements ..................................................................................88

7.3. ADC2 Programmable Window Detector.........................................................................94

7.3.1. Window Detector In Single-Ended Mode .............................................................94

7.3.2. Window Detector In Differential Mode.................................................................95

8. DACS, 12-BIT VOLTAGE MODE......................................................................................99

8.1. DAC Output Scheduling..................................................................................................99

C8051F120/1/2/3/4/5/6/7

4 Rev. 1.2

8.1.1. Update Output On-Demand ...................................................................................99

8.1.2. Update Output Based on Timer Overflow...........................................................100

8.2. DAC Output Scaling/Justification.................................................................................100

9. VOLTAGE REFERENCE (C8051F120/2/4/6) .................................................................107

10. VOLTAGE REFERENCE (C8051F121/3/5/7) .................................................................109

11. COMPARATORS................................................................................................................111

12. CIP-51 MICROCONTROLLER........................................................................................119

12.1.Instruction Set................................................................................................................120

12.1.1. Instruction and CPU Timing................................................................................120

12.1.2. MOVX Instruction and Program Memory...........................................................120

12.2.Memory Organization ...................................................................................................125

12.2.1. Program Memory.................................................................................................125

12.2.2. Data Memory .......................................................................................................127

12.2.3. General Purpose Registers ...................................................................................127

12.2.4. Bit Addressable Locations ...................................................................................127

12.2.5. Stack .................................................................................................................127

12.2.6. Special Function Registers...................................................................................128

12.2.6.1.SFR Paging..................................................................................................128

12.2.6.2.Interrupts and SFR Paging...........................................................................128

12.2.6.3.SFR Page Stack Example ............................................................................130

12.2.7. Register Descriptions...........................................................................................143

12.3.Interrupt Handler ...........................................................................................................146

12.3.1. MCU Interrupt Sources and Vectors ...................................................................146

12.3.2. External Interrupts ...............................................................................................146

12.3.3. Interrupt Priorities................................................................................................148

12.3.4. Interrupt Latency..................................................................................................148

12.3.5. Interrupt Register Descriptions............................................................................149

12.4.Power Management Modes ...........................................................................................155

12.4.1. Idle Mode.............................................................................................................155

12.4.2. Stop Mode............................................................................................................155

13. MULTIPLY AND ACCUMULATE (MAC0) ...................................................................157

13.1.Special Function Registers ............................................................................................157

13.2.Integer and Fractional Math ..........................................................................................158

13.3.Operating in Multiply and Accumulate Mode...............................................................159

13.4.Operating in Multiply Only Mode.................................................................................159

13.5.Accumulator Shift Operations.......................................................................................159

13.6.Rounding and Saturation ...............................................................................................160

13.7.Usage Examples ............................................................................................................160

14. RESET SOURCES ..............................................................................................................167

14.1.Power-on Reset..............................................................................................................168

14.2.Power-fail Reset ............................................................................................................168

14.3.External Reset................................................................................................................168

14.4.Missing Clock Detector Reset .......................................................................................169

14.5.Comparator0 Reset ........................................................................................................169

14.6.External CNVSTR0 Pin Reset.......................................................................................169

C8051F120/1/2/3/4/5/6/7

Rev. 1.2 5

14.7.Watchdog Timer Reset ..................................................................................................169

14.7.1. Enable/Reset WDT ..............................................................................................169

14.7.2. Disable WDT .......................................................................................................170

14.7.3. Disable WDT Lockout.........................................................................................170

14.7.4. Setting WDT Interval...........................................................................................170

15. OSCILLATORS...................................................................................................................173

15.1.Programmable Internal Oscillator .................................................................................173

15.2.External Oscillator Drive Circuit...................................................................................175

15.3.System Clock Selection.................................................................................................175

15.4.External Crystal Example..............................................................................................177

15.5.External RC Example ....................................................................................................177

15.6.External Capacitor Example..........................................................................................177

15.7.Phase-Locked Loop (PLL) ............................................................................................178

15.7.1. PLL Input Clock and Pre-divider.........................................................................178

15.7.2. PLL Multiplication and Output Clock .................................................................178

15.7.3. Powering on and Initializing the PLL..................................................................179

16. FLASH MEMORY ..............................................................................................................185

16.1.Programming The Flash Memory .................................................................................185

16.1.1. Non-volatile Data Storage ...................................................................................185

16.1.2. Erasing FLASH Pages From Software ................................................................186

16.1.3. Writing FLASH Memory From Software ...........................................................187

16.2.Security Options ............................................................................................................188

17. BRANCH TARGET CACHE.............................................................................................193

17.1.Cache and Prefetch Operation .......................................................................................193

17.2.Cache and Prefetch Optimization..................................................................................194

18. EXTERNAL DATA MEMORY INTERFACE AND ON-CHIP XRAM.......................199

18.1.Accessing XRAM..........................................................................................................199

18.1.1. 16-Bit MOVX Example.......................................................................................199

18.1.2. 8-Bit MOVX Example.........................................................................................199

18.2.Configuring the External Memory Interface .................................................................199

18.3.Port Selection and Configuration ..................................................................................200

18.4.Multiplexed and Non-multiplexed Selection.................................................................202

18.4.1. Multiplexed Configuration ..................................................................................202

18.4.2. Non-multiplexed Configuration...........................................................................203

18.5.Memory Mode Selection ...............................................................................................204

18.5.1. Internal XRAM Only ...........................................................................................204

18.5.2. Split Mode without Bank Select ..........................................................................204

18.5.3. Split Mode with Bank Select ...............................................................................205

18.5.4. External Only.......................................................................................................205

18.6.Timing .......................................................................................................................206

18.6.1. Non-multiplexed Mode........................................................................................207

18.6.1.1.16-bit MOVX: EMI0CF[4:2] = ‘101’, ‘110’, or ‘111’................................207

18.6.1.2.8-bit MOVX without Bank Select: EMI0CF[4:2] = ‘101’ or ‘111’............208

18.6.1.3.8-bit MOVX with Bank Select: EMI0CF[4:2] = ‘110’...............................209

18.6.2. Multiplexed Mode................................................................................................210

C8051F120/1/2/3/4/5/6/7

6 Rev. 1.2

18.6.2.1.16-bit MOVX: EMI0CF[4:2] = ‘001’, ‘010’, or ‘011’................................210

18.6.2.2.8-bit MOVX without Bank Select: EMI0CF[4:2] = ‘001’ or ‘011’............211

18.6.2.3.8-bit MOVX with Bank Select: EMI0CF[4:2] = ‘010’...............................212

19. PORT INPUT/OUTPUT .....................................................................................................215

19.1.Ports 0 through 3 and the Priority Crossbar Decoder....................................................217

19.1.1. Crossbar Pin Assignment and Allocation ............................................................217

19.1.2. Configuring the Output Modes of the Port Pins ..................................................218

19.1.3. Configuring Port Pins as Digital Inputs...............................................................219

19.1.4. Weak Pull-ups......................................................................................................219

19.1.5. Configuring Port 1 Pins as Analog Inputs ...........................................................219

19.1.6. External Memory Interface Pin Assignments......................................................220

19.1.7. Crossbar Pin Assignment Example......................................................................222

19.2.Ports 4 through 7 (C8051F120/2/4/6 only) ...................................................................231

19.2.1. Configuring Ports which are not Pinned Out.......................................................231

19.2.2. Configuring the Output Modes of the Port Pins ..................................................231

19.2.3. Configuring Port Pins as Digital Inputs...............................................................232

19.2.4. Weak Pull-ups......................................................................................................232

19.2.5. External Memory Interface ..................................................................................232

20. SYSTEM MANAGEMENT BUS / I2C BUS (SMBUS0) .................................................237

20.1.Supporting Documents ..................................................................................................238

20.2.SMBus Protocol.............................................................................................................238

20.2.1. Arbitration............................................................................................................239

20.2.2. Clock Low Extension...........................................................................................239

20.2.3. SCL Low Timeout ...............................................................................................239

20.2.4. SCL High (SMBus Free) Timeout.......................................................................239

20.3.SMBus Transfer Modes.................................................................................................240

20.3.1. Master Transmitter Mode ....................................................................................240

20.3.2. Master Receiver Mode.........................................................................................240

20.3.3. Slave Transmitter Mode.......................................................................................241

20.3.4. Slave Receiver Mode ...........................................................................................241

20.4.SMBus Special Function Registers ...............................................................................242

20.4.1. Control Register...................................................................................................242

20.4.2. Clock Rate Register .............................................................................................244

20.4.3. Data Register........................................................................................................245

20.4.4. Address Register ..................................................................................................245

20.4.5. Status Register .....................................................................................................246

21. ENHANCED SERIAL PERIPHERAL INTERFACE (SPI0) .........................................249

21.1.Signal Descriptions........................................................................................................250

21.1.1. Master Out, Slave In (MOSI) ..............................................................................250

21.1.2. Master In, Slave Out (MISO) ..............................................................................250

21.1.3. Serial Clock (SCK) ..............................................................................................250

21.1.4. Slave Select (NSS)...............................................................................................250

21.2.SPI0 Master Mode Operation........................................................................................251

21.3.SPI0 Slave Mode Operation ..........................................................................................253

21.4.SPI0 Interrupt Sources...................................................................................................253

C8051F120/1/2/3/4/5/6/7

Rev. 1.2 7

21.5.Serial Clock Timing ......................................................................................................254

21.6.SPI Special Function Registers .....................................................................................256

22. UART0 ..................................................................................................................................263

22.1.UART0 Operational Modes ..........................................................................................264

22.1.1. Mode 0: Synchronous Mode................................................................................264

22.1.2. Mode 1: 8-Bit UART, Variable Baud Rate .........................................................265

22.1.3. Mode 2: 9-Bit UART, Fixed Baud Rate ..............................................................266

22.1.4. Mode 3: 9-Bit UART, Variable Baud Rate .........................................................267

22.2.Multiprocessor Communications...................................................................................268

22.2.1. Configuration of a Masked Address ....................................................................268

22.2.2. Broadcast Addressing ..........................................................................................268

22.3.Frame and Transmission Error Detection......................................................................269

23. UART1 ..................................................................................................................................275

23.1.Enhanced Baud Rate Generation...................................................................................276

23.2.Operational Modes ........................................................................................................277

23.2.1. 8-Bit UART .........................................................................................................277

23.2.2. 9-Bit UART .........................................................................................................278

23.3.Multiprocessor Communications...................................................................................279

24. TIMERS................................................................................................................................285

24.1.Timer 0 and Timer 1......................................................................................................285

24.1.1. Mode 0: 13-bit Counter/Timer.............................................................................285

24.1.2. Mode 1: 16-bit Counter/Timer.............................................................................286

24.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload.................................................287

24.1.4. Mode 3: Two 8-bit Counter/Timers (Timer 0 Only) ...........................................288

24.2.Timer 2, Timer 3, and Timer 4 ......................................................................................293

24.2.1. Configuring Timer 2, 3, and 4 to Count Down....................................................293

24.2.2. Capture Mode ......................................................................................................294

24.2.3. Auto-Reload Mode ..............................................................................................295

24.2.4. Toggle Output Mode (Timer 2 and Timer 4 Only)..............................................295

25. PROGRAMMABLE COUNTER ARRAY .......................................................................301

25.1.PCA Counter/Timer.......................................................................................................302

25.2.Capture/Compare Modules............................................................................................303

25.2.1. Edge-triggered Capture Mode .............................................................................304

25.2.2. Software Timer (Compare) Mode........................................................................305

25.2.3. High Speed Output Mode ....................................................................................306

25.2.4. Frequency Output Mode ......................................................................................307

25.2.5. 8-Bit Pulse Width Modulator Mode ....................................................................308

25.2.6. 16-Bit Pulse Width Modulator Mode ..................................................................309

25.3.Register Descriptions for PCA0 ....................................................................................310

26. JTAG (IEEE 1149.1)............................................................................................................315

26.1.Boundary Scan...............................................................................................................316

26.1.1. EXTEST Instruction ............................................................................................317

26.1.2. SAMPLE Instruction ...........................................................................................317

26.1.3. BYPASS Instruction ............................................................................................317

26.1.4. IDCODE Instruction ............................................................................................317

C8051F120/1/2/3/4/5/6/7

8 Rev. 1.2

26.2.Flash Programming Commands ....................................................................................318

26.3.Debug Support...............................................................................................................321

C8051F120/1/2/3/4/5/6/7

Rev. 1.2 9

LIST OF FIGURES

1. SYSTEM OVERVIEW .........................................................................................................19

Figure 1.1. C8051F120/124 Block Diagram..........................................................................21

Figure 1.2. C8051F121/125 Block Diagram..........................................................................22

Figure 1.3. C8051F122/126 Block Diagram..........................................................................23

Figure 1.4. C8051F123/127 Block Diagram..........................................................................24

Figure 1.5. On-Board Clock and Reset..................................................................................26

Figure 1.6. On-Chip Memory Map........................................................................................27

Figure 1.7. Development/In-System Debug Diagram ...........................................................28

Figure 1.8. MAC0 Block Diagram ........................................................................................29

Figure 1.9. Digital Crossbar Diagram....................................................................................30

Figure 1.10. PCA Block Diagram............................................................................................31

Figure 1.11. 12-Bit ADC Block Diagram................................................................................33

Figure 1.12. 8-Bit ADC Diagram ............................................................................................34

Figure 1.13. Comparator and DAC Diagram...........................................................................35

2. ABSOLUTE MAXIMUM RATINGS..................................................................................36

3. GLOBAL DC ELECTRICAL CHARACTERISTICS ......................................................37

4. PINOUT AND PACKAGE DEFINITIONS........................................................................39

Figure 4.1. TQFP-100 Pinout Diagram..................................................................................44

Figure 4.2. TQFP-100 Package Drawing...............................................................................45

Figure 4.3. TQFP-64 Pinout Diagram....................................................................................46

Figure 4.4. TQFP-64 Package Drawing.................................................................................47

5. ADC0 (12-BIT ADC, C8051F120/1/4/5 ONLY) ..................................................................49

Figure 5.1. 12-Bit ADC0 Functional Block Diagram............................................................49

Figure 5.2. Typical Temperature Sensor Transfer Function..................................................50

Figure 5.3. ADC0 Track and Conversion Example Timing ..................................................52

Figure 5.4. ADC0 Equivalent Input Circuits .........................................................................53

Figure 5.5. AMX0CF: AMUX0 Configuration Register.......................................................54

Figure 5.6. AMX0SL: AMUX0 Channel Select Register .....................................................55

Figure 5.7. ADC0CF: ADC0 Configuration Register ...........................................................56

Figure 5.8. ADC0CN: ADC0 Control Register.....................................................................57

Figure 5.9. ADC0H: ADC0 Data Word MSB Register.........................................................58

Figure 5.10. ADC0L: ADC0 Data Word LSB Register ..........................................................58

Figure 5.11. ADC0 Data Word Example.................................................................................59

Figure 5.12. ADC0GTH: ADC0 Greater-Than Data High Byte Register...............................60

Figure 5.13. ADC0GTL: ADC0 Greater-Than Data Low Byte Register................................60

Figure 5.14. ADC0LTH: ADC0 Less-Than Data High Byte Register....................................61

Figure 5.15. ADC0LTL: ADC0 Less-Than Data Low Byte Register .....................................61

Figure 5.16. 12-Bit ADC0 Window Interrupt Example: Right Justified Single-Ended Data .62

Figure 5.17. 12-Bit ADC0 Window Interrupt Example: Right Justified Differential Data.....63

Figure 5.18. 12-Bit ADC0 Window Interrupt Example: Left Justified Single-Ended Data....64

Figure 5.19. 12-Bit ADC0 Window Interrupt Example: Left Justified Differential Data.......65

6. ADC0 (10-BIT ADC, C8051F122/3/6/7 ONLY) ..................................................................67

C8051F120/1/2/3/4/5/6/7

10 Rev. 1.2

Figure 6.1. 10-Bit ADC0 Functional Block Diagram............................................................67

Figure 6.2. Typical Temperature Sensor Transfer Function..................................................68

Figure 6.3. ADC0 Track and Conversion Example Timing ..................................................70

Figure 6.4. ADC0 Equivalent Input Circuits .........................................................................71

Figure 6.5. AMX0CF: AMUX0 Configuration Register.......................................................72

Figure 6.6. AMX0SL: AMUX0 Channel Select Register .....................................................73

Figure 6.7. ADC0CF: ADC0 Configuration Register ...........................................................74

Figure 6.8. ADC0CN: ADC0 Control Register.....................................................................75

Figure 6.9. ADC0H: ADC0 Data Word MSB Register.........................................................76

Figure 6.10. ADC0L: ADC0 Data Word LSB Register ..........................................................76

Figure 6.11. ADC0 Data Word Example.................................................................................77

Figure 6.12. ADC0GTH: ADC0 Greater-Than Data High Byte Register...............................78

Figure 6.13. ADC0GTL: ADC0 Greater-Than Data Low Byte Register................................78

Figure 6.14. ADC0LTH: ADC0 Less-Than Data High Byte Register....................................79

Figure 6.15. ADC0LTL: ADC0 Less-Than Data Low Byte Register .....................................79

Figure 6.16. 10-Bit ADC0 Window Interrupt Example: Right Justified Single-Ended Data .80

Figure 6.17. 10-Bit ADC0 Window Interrupt Example: Right Justified Differential Data.....81

Figure 6.18. 10-Bit ADC0 Window Interrupt Example: Left Justified Single-Ended Data....82

Figure 6.19. 10-Bit ADC0 Window Interrupt Example: Left Justified Differential Data.......83

7. ADC2 (8-BIT ADC) ...............................................................................................................85

Figure 7.1. ADC2 Functional Block Diagram .......................................................................85

Figure 7.2. ADC2 Track and Conversion Example Timing ..................................................87

Figure 7.3. ADC2 Equivalent Input Circuit...........................................................................88

Figure 7.4. AMX2CF: AMUX2 Configuration Register.......................................................89

Figure 7.5. AMX2SL: AMUX2 Channel Select Register .....................................................90

Figure 7.6. ADC2CF: ADC2 Configuration Register ...........................................................91

Figure 7.7. ADC2CN: ADC2 Control Register.....................................................................92

Figure 7.8. ADC2: ADC2 Data Word Register .....................................................................93

Figure 7.9. ADC2 Data Word Example.................................................................................93

Figure 7.10. ADC2 Window Compare Examples, Single-Ended Mode .................................94

Figure 7.11. ADC2 Window Compare Examples, Differential Mode ....................................95

Figure 7.12. ADC2GT: ADC2 Greater-Than Data Byte Register...........................................96

Figure 7.13. ADC2LT: ADC2 Less-Than Data Byte Register................................................96

8. DACS, 12-BIT VOLTAGE MODE......................................................................................99

Figure 8.1. DAC Functional Block Diagram .........................................................................99

Figure 8.2. DAC0H: DAC0 High Byte Register .................................................................101

Figure 8.3. DAC0L: DAC0 Low Byte Register ..................................................................101

Figure 8.4. DAC0CN: DAC0 Control Register...................................................................102

Figure 8.5. DAC1H: DAC1 High Byte Register .................................................................103

Figure 8.6. DAC1L: DAC1 Low Byte Register ..................................................................103

Figure 8.7. DAC1CN: DAC1 Control Register...................................................................104

9. VOLTAGE REFERENCE (C8051F120/2/4/6) .................................................................107

Figure 9.1. Voltage Reference Functional Block Diagram..................................................107

Figure 9.2. REF0CN: Reference Control Register ..............................................................108

10. VOLTAGE REFERENCE (C8051F121/3/5/7) .................................................................109

Este manual sirve para los siguientes modelos

Tabla de contenidos

Otros manuales de Microcontrolador de Silicon Laboratories

Silicon Laboratories

Silicon Laboratories C8051F930 Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F02x-DK Manual de usuario

Silicon Laboratories

Silicon Laboratories CP250 Series Manual de usuario

Silicon Laboratories

Silicon Laboratories EFM8BB3-SLSTK2022A Manual de usuario

Silicon Laboratories

Silicon Laboratories Thunderboard Sense 2 Hoja de especificaciones

Silicon Laboratories

Silicon Laboratories EZR32LG330F256G55G Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F35x Manual de usuario

Silicon Laboratories

Silicon Laboratories EFM8SB1-SLSTK2010A Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F800 Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F36 Series Manual de usuario

Silicon Laboratories

Silicon Laboratories Telegesis ETRX357DVK Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F38 Series Manual de usuario

Silicon Laboratories

Silicon Laboratories AN515 Si4010 Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051T60x-DK Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F32 Series Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F30 series Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F93 Series Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F00x/01x-DK Manual de usuario

Silicon Laboratories

Silicon Laboratories AN1342 Manual de usuario

Silicon Laboratories

Silicon Laboratories CP2102N-MINIEK Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F31 Series Manual de usuario

Silicon Laboratories

Silicon Laboratories EFM8SB2 Manual de usuario

Silicon Laboratories

Silicon Laboratories EM35 Series Manual de usuario

Silicon Laboratories

Silicon Laboratories C8051F336DK Manual de usuario

Manuales populares de Microcontrolador de otras marcas

AMS

AMS AS7261 Demo Kit Manual de usuario

Novatek

Novatek NT6861 Manual de usuario

Espressif Systems

Espressif Systems ESP8266 SDK Guía de configuración

Nuvoton

Nuvoton ISD61S00 ChipCorder Guía

STMicrolectronics

STMicrolectronics ST7 Assembler Linker Manual de usuario

Texas Instruments

Texas Instruments Chipcon CC2420DK Manual de usuario

Lantronix

Lantronix Intrinsyc Open-Q 865XR SOM Manual de usuario

NEC

NEC 78GK0S/K 1+ Series Instrucciones de instalación y funcionamiento

Mikroe

Mikroe SEMITECH N-PLC Click Instrucciones de instalación y funcionamiento

Intel

Intel Agilex Manual de usuario

Cypress

Cypress CY4607 HX2VL Manual de usuario

DIGITAL-LOGIC

DIGITAL-LOGIC MICROSPACE Manual de usuario

Texas Instruments

Texas Instruments TMS320F2837 D Series Manual de usuario

CYPRES

CYPRES CY14NVSRAMKIT-001 Manual de usuario

Texas Instruments

Texas Instruments INA-DUAL-2AMP-EVM Manual de usuario

Espressif Systems

Espressif Systems ESP8266EX Instrucciones de funcionamiento

Abov

Abov AC33M8128L Manual de usuario

Laird

Laird BL654PA Manual de usuario