Renesas RS-485 Manual de usuario

Application Note

R15AN0009EU0100 Rev.1.00 Page 1

The demand for higher data throughput lead to the full-duplex RS-485 interface allowing for the simultaneous

receiving and transmitting of data using two twisted-pair cable (Figure 1). To reduce cable and installation cost

even further, a new type of full-duplex interface has emerged that allows data transmission over a single

twisted-pair cable (Figure 2).

In this new type of full-duplex interface, each transceiver connects to the bus using a 4-to-2 wire converter that

passes the transmit data from the local transceiver onto the bus, while at the same time extracting the receiving

data that is sent by the remote transceiver from the bus.

The interface is purely intended for point-to-point data links, as it requires two, permanently active signal sources.

Therefore, idling a signal source requires it to idle in a bus-high or bus-low state, rather than disabling the driver.

This application note explains the design of the bus node circuitry.

Contents

1. Bus Node Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1.1 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1.2 Bus Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1.3 4-to-2 Wire Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.4 Deriving the Bus Voltage to Driver Output Voltage Ratio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.5 Deriving the RB/RDRatio of the 4-to-2 Wire Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.6 Deriving the RBand RDResistor Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.7 Deriving the Driver Output Voltage, VOD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2. Calculation Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3. Complete Interface Circuit and Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 1. Traditional Full-Duplex Link with Enable

Controls over Two Twisted-Pair Cables Figure 2. New permanent active Full-Duplex Link over

Single Twisted-Pair Cable

Node 1 Node 2

Receive

Transmit

Node 1 Node 2

4-to-2 Wire

Conversion

4-to-2 Wire

Conversion

Receive

Transmit

RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable

R15AN0009EU0100 Rev.1.00 Page 2

Mar 4, 2022

RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note

1. Bus Node Circuit Design

There are three main aspects to be considered during the bus node design (Figure 3):

▪Current limiting: As the full-duplex operation requires both transceivers to transmit and receive data at the

same time, there are plenty of occasions where the signal polarities of both driver outputs are opposite to one

another. This can cause large differential currents to flow, which overloads the drivers and eventually leads to

thermal shutdown, a transceiver internal protection scheme required by EIA-485. Therefore, to prevent a driver

from overloading, two series resistors, RS, are placed into the driver output path that limit the current flow.

▪Bus node termination: To minimize or even eliminate signal reflections on the bus line, the bus node

impedance must match the characteristic impedance of the bus cable. This is accomplished with the

termination resistor, RT.

▪4-to-2 Wire conversion: Resistive voltage dividers, consisting of the bus resistors, RB, and the driver output

resistors, RD, are used to pass the local transmit data onto the bus and to extract the receive data that is sent

by the remote transmitter from the bus.

1.1 Current Limiting

To match the bus node impedance with the characteristic cable impedance, Z0, the value of RSshould be close to

half the value of Z0:

While it is possible to choose higher RSvalues to reduce the output current, they also reduce the bus voltage,

because of the voltage divider action with the termination resistor, RT.

1.2 Bus Termination

The purpose of the termination resistor, RT, is to adjust the input impedance of the bus node circuit such, that it

matches the characteristic cable impedance: ZIN = Z0. As shown in Figure 4, the bus node input impedance is the

parallel impedance of the termination resistor and the sum of the current limiting resistors and the driver output

impedance.

Before finding the value of RT, it is necessary to establish the driver output impedance, RO. ROis usually not

specified as a parametric value but can be derived from the V-I characteristic of the driver found in the datasheet.

Figure 3. Three Main Aspects of the Bus Node Circuit Design

(EQ. 1)

(EQ. 2)

Current

Limiting

Bus

Termination

4-to-2 Wire

Conversion

GND



= Z

RSZ02

ZIN RT2RSRO

+

 Z0

R15AN0009EU0100 Rev.1.00 Page 3

Mar 4, 2022

RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note

Figure 5 shows a best-fit line drawn through the driver V-I characteristic curve. The slope of this line represents

RO. In this case, the output impedance of the RAA788153 transceiver is derived with RO≈25Ω.

When the value of ROis known, calculate the value of the termination resistor by solving Equation 3 for RT:

1.3 4-to-2 Wire Conversion

The 4-to-2 wire conversion not only passes transmit signals from the driver to the bus and receive signals from the

bus to the receiver, but it must also cancel the portion of the transmit signal that is unavoidably looped back to the

receiver (Figure 6).

Because of the design structure of the 4-to-2 wire conversion, a part of the transmit signal is looped back into the

receiver path, where it is superimposed onto the receive signal. If not removed, the combined signal can cause

false triggering of the receiver input thresholds, therefore, leading to data errors.

The canceling of the loopback signal is achieved by feeding an inverted portion of the transmit signal to the

receiver inputs, where it adds to the loopback signal. To eliminate the loopback signal, the canceling signal must

be of the same amplitude but inverted polarity as the loopback signal.

Inverting the canceling signal is accomplished by connecting the non-inverting receiver input (A) to the inverting

driver output (Z), and the inverting receiver input (B) to the non-inverting driver output (Y). The amplitude of the

canceling signal is set by the resistor ratio of the RD-RBvoltage divider, which, in turn, depends on the ratio of bus

voltage to driver output voltages.

Figure 4. Bus Node Impedance Matching Figure 5. Deriving Driver Output Impedance

(EQ. 3)

Figure 6. Deriving Driver Output Impedance

DD1

= R

||(2R

+ R

) = Z

140

120

100

~ 25Ω

RAA788153

123405

Driver Output Current (mA)

Driver Output Voltage (V)

2RSRO

+Z0



2RSROZ0

–+

-------------------------------------------- 1

01–2RSRO

+

-----------------------------------------------------------

Receive

Loopback

Transmit

Canc elli ng

Bus

R15AN0009EU0100 Rev.1.00 Page 4

Mar 4, 2022

RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note

1.4 Deriving the Bus Voltage to Driver Output Voltage Ratio

To determine the bus voltage, focus on the data link between the two drivers and ignore the 4-to-2 wire conversion

network. This is done by ensuring that RBand RDare high-impedance enough to not cause any significant loading

effects on the bus.

Figure 7 shows the data link with the driver output voltages VOD1 and VOD2 generating the bus voltage, VBus.

Because of design symmetry, both driver output voltages are equally attenuated by the voltage diver action of 2RS

and RTto generate VBus. Denoting the voltage divider gain as k, express the bus voltage using Equation 4:

To determine k, convert the circuit in Figure 7 into the load circuits of both drivers (Figure 8). Because each bus

node is terminated to match Z0, the input impedance (Z0) of one bus node is parallel to the termination resistor,

RT, of the other bus node. Therefore, each driver output sees a load resistance of RL= 2RS+ RT||Z0.

From Figure 8, you can derive the gain of each bus node with:

Then, multiplying out and collecting terms gives Equation 5:

(EQ. 4)

Figure 7. Design Symmetry Ensures Equal Attenuation

Figure 8. Each Driver has a VBUS Contribution of VOD·k

(EQ. 5)

VBus VOD1 kVOD2

+k=

OD1

D1 R

OD2

Bus



OD1

D1 Z

OD2

Bus1

OD2

= 0)

Bus2

OD1

= 0)

VBus1

VOD1

-----------------

VBus2

VOD2

-----------------

RTZ0



2RSRT

+Z0



--------------------------------------

===

12R

S1Z

1R

++

--------------------------------------------------------------

R15AN0009EU0100 Rev.1.00 Page 5

Mar 4, 2022

RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note

1.5 Deriving the RB/RDRatio of the 4-to-2 Wire Conversion

From the differential 4-to-2 wire conversion network in Figure 9, construct its single-ended representation in

Figure 10. Recall that VOD1 is inverted to -VOD1 by the connections of the RDresistors between the receiver inputs

and the driver outputs (see also 4-to-2 Wire Conversion). To determine the RB/RDratio that is necessary to

prevent the local driver output (VOD1) from appearing at the local receiver input (VAB1) you must also include the

receiver input resistance (RIN) as it presents a common-mode load to the voltage divider output. RIN is commonly

specified in the datasheet.

The differential receiver input voltage of Node 1, VAB1, therefore, becomes:

Multiplying out then gives:

To arrive at an equation that includes the RB/RD, divide the numerators and denominators of both fractions by

RD×RIN:

As both fractions have the same denominators, combine both voltage terms onto one denominator:

Now substitute VBus using Equation 4 (VBus = VOD1 × k + VOD2 × k) and get:

After collecting terms, there are two separate voltage terms, one for VOD1 and another for VOD2:

Figure 9. 2-to-4 Wire Conversion Figure 10. Single-Ended Representation

(EQ. 6)

-V

Bus

-V

OD1

Bus

AB1

VAB1 VBus

RDRIN



RBRD

+RIN



-------------------------------------- VOD1

RBRIN



RDRB

+RIN



--------------------------------------

–=

VAB1 VBus

RDRIN

RBRIN RDRIN RBRD

------------------------------------------------------------------- VOD1

RBRIN

RBRIN RDRIN RBRD

-------------------------------------------------------------------

–=

VAB1 VBus

BRD

RBRIN

++

-----------------------------------------------------------VOD1

RBRD



BRD

RBRIN

++

-----------------------------------------------------------

–=

VAB1

VBus VOD1 RBRD

–

BRD

RBRIN

++

---------------------------------------------------------------

VAB1

VOD1 kVOD2

+kVOD1 RBRD

–

BRD

RBRIN

++

---------------------------------------------------------------------------------------------------------

VAB1

VOD1 kR

BRD

–VOD2 k+

BRD

RBRIN

++

----------------------------------------------------------------------------------------

R15AN0009EU0100 Rev.1.00 Page 6

Mar 4, 2022

RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note

Equation 6 shows that to eliminate VOD1, its bracket, k - RB/RD, must become zero. This is accomplished by

making RB/RDequals k:

With the VOD1 component eliminated, the receiver input voltage is purely dependent of VOD2:

Then, substituting k with Equation 7 gives Equation 8:

1.6 Deriving the RBand RDResistor Values

Figure 11 shows that there are two leakage current paths parallel to the termination resistor. Their combined

current value, ILK1 + ILK2, should be about 10% of IT, the current through the termination resistor, to minimize

loading of the main signal path. This requires that the sum of the resistor values (RB, RD) is about 20 times that of

the termination resistor:

At the same time, the gain requirement of Equation 7 demands that

Setting Equation 10 = Equation 9 and solving for RDgives the first resistor value with:

Substituting k with Equation 7 gives Equation 11:

(EQ. 7)

(EQ. 8)

(EQ. 9)

(EQ. 10)

Figure 11. Leakage Currents must be ≤10% of Termination Current

(EQ. 11)

--------k=

VAB1

VOD2

---

RIN

----------

------------------------------

VAB1

VOD2

RBRIN



-----------------------

---------------------------------

VOD2

--------1

RIN

----------





-------------------------------------------------

RBRD

+20RT



RBRDk=

LK1

Bus

LK2

20RT

k1+

--------------

RD20 RT2R

T2RS

+



20

RT2R

T2RS

+

RT2R

T2RS

++

------------------------------------------------

==

R15AN0009EU0100 Rev.1.00 Page 7

Mar 4, 2022

RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note

Then, applying Equation 10, calculate the resistor value for RB:

1.7 Deriving the Driver Output Voltage, VOD

Knowing the magnitude of VOD helps to estimate the receiver input voltage during circuit simulation. To find VOD,

calculate the load resistance of the driver in Figure 12 with:

Then, drawing the RLline into the driver V-I characteristic, VOD is found at the crossing point of both curves

(Figure 13).

2. Calculation Examples

Table 1 lists the sequence of steps for calculating the gain and resistor values for 100Ωand 120ΩCables.

(EQ. 12)

Figure 12. Driver Load Resistance Figure 13. Deriving VOD for a given RL

Table 1. Sequence of Calculation Steps

Parameter Symbol Equation / Comment Value Unit

Characteristic Cable

Impedance Z0RS-485 or CAT-5 120 100 Ω

Driver Output

Impedance RO

Established from the driver V-I characteristic in the

data sheet 25 25 Ω

Receiver Input

Impedance RIN

Taken from the Electrical Specifications in the data

sheet 96k 100 Ω

Current Limiting

Resistor RS

Calculated 60 50 Ω

E-96 series 59 49.9 Ω

Termination Resistor RT

Calculated 746 503 Ω

E-96 series 750 499 Ω

Forward Gain k 0.4671 0.455

Driver Loopback

Resistor RD

Calculated 10.475k 7.045k Ω

E-96 series 10.5k 6.98k Ω

Bus Resistor RB

Calculated 4.905k 3.176k Ω

E-96 series 4.87k 3.16k Ω

RBRDk=

RL2RSRTZ0



+2RS

1Z

+

-----------------------------------

+==

D1 Z0

RL= 2RS+ RT || Z0

140

120

100

RAA788153

123405

Driver Output Current (mA)

Driver Output Voltage (V)

------

12R

SRO

+–

-----------------------------------------------------------

12R

S1Z

1R

++

--------------------------------------------------------------

RD20 RT2R

T2RS

+



=

RBRDk=

R15AN0009EU0100 Rev.1.00 Page 8

Mar 4, 2022

RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note

3. Complete Interface Circuit and Waveforms

Figure 14 shows the complete interface circuit with a table listing the selected resistor values for bus nodes with

120Ωand 100Ωinput impedance. The 1Mbps full-duplex transceivers, RAA788153, are permanently enabled by

connecting the receiver enable pin, RE, to ground and the driver enable pin, DE, to VCC.

Figure 15 and Figure 16 depict the input and output waveforms. Applying a 100kHz (200kbps) square wave to the

data input pin of Node 1, DI1, results in a slightly delayed output of the same data rate at the receiver output of

Node 2, RO2. In the opposite direction, applying a 400kHz (800kbps) square wave to the data input pin of Node 2,

DI2, results in a slightly delayed output of the same data rate at the receiver output of Node 1, RO1.

The noisy signals in Figure 15, which also show overshoot and cross-coupling, are because of the mismatch

between the nodes input impedance of ZIN = 120Ωand the characteristic cable impedance of Z0= 100Ω. The

noise free signals in Figure 16 reflect the effects of impedance matching, when the bus node design is changed to

an input impedance of ZIN = 100Ω, therefore, matching Z0.

Resistor Ratio RB/RD0.4638 0.4577

Gain Error ε0.71 0.49 %

Driver Load Resistance RL221 183 Ω

Driver-2 Output Voltage VOD2

Established from the driver V-I characteristic in the

data sheet 4.0 3.94 V

Receiver-1 Input

Voltage VAB1 1.23 1.20 V

Figure 14. Complete Interface Circuit

Table 1. Sequence of Calculation Steps (Cont.)

Parameter Symbol Equation / Comment Value Unit

RBRD



--------------------

RL2RSRTZ0



VAB1

VOD2

D1R

1R

++

--------------------------------------------------------------

Node 1 Node 2

GND

VCC

XCVR

RO1

DI1

XCVR = RAA788153

RDRD

GND

VCC

XCVR

RO2

DI2

XCVR = RAA788153

ZIN =

RS=

RT=

RD=

RB=

120Ω

59Ω

750Ω

10.5kΩ

4.87kΩ

100Ω

49.9Ω

499Ω

6.98kΩ

3.16kΩ

100ft CAT-5 Cable

(Z0= 100Ω)

R15AN0009EU0100 Rev.1.00 Page 9

Mar 4, 2022

RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note

4. Revision History

Figure 15. Bus Nodes with ZIN = 120ΩCommunicating

Simultaneously over 100ft CAT-5 Cable (Z0= 100Ω)

Figure 16. Bus Nodes with ZIN = 100ΩCommunicating

Simultaneously over 100ft CAT-5 Cable (Z0= 100Ω)

Revision Date Description

1.00 Mar 4, 2022 Initial release.

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TOYOSU FORESIA, 3-2-24 Toyosu,

Koto-ku, Tokyo 135-0061, Japan

www.renesas.com

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