NEC 78K0/KB1+ Manual de usuario

Document No. U16846EJ1V0UD00 (1st edition)

Date Published November 2003 N CP(K)

Printed in Japan

PD78F0101H

PD78F0102H

PD78F0103H

78K0/KB1+

8-Bit Single-Chip Microcontrollers

Preliminary User’s Manual

2003

Preliminary User’s Manual U16846EJ1V0UD

[MEMO]

Preliminary User’s Manual U16846EJ1V0UD 3

NOTES FOR CMOS DEVICES

1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS

Note:

Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and

ultimatelydegradethedeviceoperation. Steps must betaken to stopgeneration of staticelectricity

as much as possible, and quickly dissipate it once, when it has occurred. Environmental control

must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using

insulatorsthateasilybuildstaticelectricity. Semiconductordevicesmustbestoredandtransported

in an anti-static container, static shielding bag or conductive material. All test and measurement

tools including work bench and floor should be grounded. The operator should be grounded using

wriststrap. Semiconductordevicesmustnotbetouchedwithbarehands. Similarprecautionsneed

to be taken for PW boards with semiconductor devices on it.

2 HANDLING OF UNUSED INPUT PINS FOR CMOS

Note:

No connection for CMOS device inputs can be cause of malfunction. If no connection is provided

tothe inputpins,it ispossible thataninternal inputlevel maybegenerated dueto noise,etc.,hence

causingmalfunction. CMOSdevices behavedifferentlythan BipolarorNMOS devices. Inputlevels

of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused

pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of

being an output pin. All handling related to the unused pins must be judged device by device and

related specifications governing the devices.

3 STATUS BEFORE INITIALIZATION OF MOS DEVICES

Note:

Power-on does not necessarily define initial status of MOS device. Production process of MOS

does not define the initial operation status of the device. Immediately after the power source is

turned ON, the devices with reset function have not yet been initialized. Hence, power-on does

not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the

reset signal is received. Reset operation must be executed immediately after power-on for devices

having reset function.

Windows and Windows NT are either registered trademarks or trademarks of Microsoft Corporation in the

United States and/or other countries.

PC/AT is a trademark of International Business Machines Corporation.

HP9000 series 700 and HP-UX are trademarks of Hewlett-Packard Company.

SPARCstation is a trademark of SPARC International, Inc.

Solaris and SunOS are trademarks of Sun Microsystems, Inc.

SuperFlash®is a registered trademark of Silicon Storage Technology, Inc. in several countries including the

United States and Japan.

Preliminary User’s Manual U16846EJ1V0UD

Caution: This product uses SuperFlash®technology licensed from Silicon Storage Technology, inc.

The information contained in this document is being issued in advance of the production cycle for the

product. The parameters for the product may change before final production or NEC Electronics

Corporation, at its own discretion, may withdraw the product prior to its production.

Not all products and/or types are available in every country. Please check with an NEC Electronics sales

representative for availability and additional information.

No part of this document may be copied or reproduced in any form or by any means without the prior written consent

of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document.

NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property

rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other

liability arising from the use of such products. No license, express, implied or otherwise, is granted under any

patents, copyrights or other intellectual property rights of NEC Electronics or others.

Descriptions of circuits, software and other related information in this document are provided for illustrative purposes

in semiconductor product operation and application examples. The incorporation of these circuits, software and

information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC

Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of

these circuits, software and information.

While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,

customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize

risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products,

customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and

anti-failure features.

NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific".

The "Specific" quality grade applies only to NEC Electronics products developed based on a customer-designated

"quality assurance program" for a specific application. The recommended applications of an NEC Electronics

products depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC

Electronics product before using it in a particular application.

•

M5D 02. 11-1

The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC

Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications

not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to

determine NEC Electronics' willingness to support a given application.

(Note)

(1)

(2)

"NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its

majority-owned subsidiaries.

"NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as

defined above).

Computers, office equipment, communications equipment, test and measurement equipment, audio and

visual equipment, home electronic appliances, machine tools, personal electronic equipment and

industrial robots.

Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster

systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life

support).

Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support

systems and medical equipment for life support, etc.

"Standard":

"Special":

"Specific":

Preliminary User’s Manual U16846EJ1V0UD 5

Regional Information

• Device availability

• Ordering information

• Product release schedule

• Availability of related technical literature

• Development environment specifications (for example, specifications for third-party tools and

components, host computers, power plugs, AC supply voltages, and so forth)

• Network requirements

In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary

from country to country.

[GLOBAL SUPPORT]

http://www.necel.com/en/support/support.html

NEC Electronics America, Inc. (U.S.)

Santa Clara, California

Tel: 408-588-6000

800-366-9782

NEC Electronics Hong Kong Ltd.

Hong Kong

Tel: 2886-9318

NEC Electronics Hong Kong Ltd.

Seoul Branch

Seoul, Korea

Tel: 02-558-3737

NEC Electronics Shanghai, Ltd.

Shanghai, P.R. China

Tel: 021-6841-1138

NEC Electronics Taiwan Ltd.

Taipei, Taiwan

Tel: 02-2719-2377

NEC Electronics Singapore Pte. Ltd.

Novena Square, Singapore

Tel: 6253-8311

J03.4

EC Electronics (Europe) GmbH

Duesseldorf, Germany

Tel: 0211-65 03 01

• Sucursal en España

Madrid, Spain

Tel: 091-504 27 87

Vélizy-Villacoublay,France

Tel: 01-30-675800

• Succursale Française

• Filiale Italiana

Milano, Italy

Tel: 02-66 75 41

• Branch The Netherlands

Eindhoven,TheNetherlands

Tel: 040-2445845

• Tyskland Filial

Taeby, Sweden

Tel: 08-63 80 820

• United Kingdom Branch

Milton Keynes, UK

Tel: 01908-691-133

Some information contained in this document may vary from country to country. Before using any NEC

Electronics product in your application, pIease contact the NEC Electronics office in your country to

obtain a list of authorized representatives and distributors. They will verify:

Preliminary User’s Manual U16846EJ1V0UD

INTRODUCTION

Readers This manual is intended for user engineers who wish to understand the functions of the

78K0/KB1+ and design and develop application systems and programs for these

devices.

The target products are as follows.

78K0/KB1+:

PD78F0101H, 78F0102H, 78F0103H

Purpose This manual is intended to give users an understanding of the functions described in the

Organization below.

Organization The 78K0/KB1+ manual is separated into two parts: this manual and the instructions

edition (common to the 78K/0 Series).

78K0/KB1+

User’s Manual

(This Manual)

78K/0 Series

User’s Manual

Instructions

•Pin functions

•Internal block functions

•Interrupts

•Other on-chip peripheral functions

•Electrical specifications (target)

•CPU functions

•Instruction set

•Explanation of each instruction

How to Read This Manual It is assumed that the readers of this manual have general knowledge of electrical

engineering, logic circuits, and microcontrollers.

•To gain a general understanding of functions:

→Read this manual in the order of the CONTENTS.

•How to interpret the register format:

→For a bit number enclosed in brackets, the bit name is defined as a reserved word

in the assembler, and is already defined in the header file named sfrbit.h in the C

compiler.

•To check the details of a register when you know the register name:

→Refer to APPENDIX C REGISTER INDEX.

•To know details of the 78K/0 Series instructions:

→Refer to the separate document 78K/0 Series Instructions User’s Manual

(U12326E).

Preliminary User’s Manual U16846EJ1V0UD 7

Conventions Data significance: Higher digits on the left and lower digits on the right

Active low representations: ××× (overscore over pin and signal name)

Note: Footnote for item marked with Note in the text

Caution: Information requiring particular attention

Remark: Supplementary information

Numerical representations: Binary

...×××× or ××××B

Decimal

...××××

Hexadecimal

...××××H

Differences Between 78K0/KB1+ and 78K0/KB1

Series Name

Item 78K0/KB1+ 78K0/KB1

Mask ROM version None Available

Power supply Single power supply Two power supplies

Self-programming function Available None

Flash

memory

version Option byte Ring-OSC can be stopped/cannot be

stopped selectable None

Power-on clear function 2.1 V ±0.1 V (fixed)Note 2.85 V ±0.15 V or 3.5 V ±0.2 V selectable

Minimum instruction execution time 0.125

s (at 16 MHz operation) 0.2

s (at 10 MHz operation)

Note This value may change after evaluation.

Related Documents The related documents indicated in this publication may include preliminary versions.

However, preliminary versions are not marked as such.

Documents Related to Devices

Document Name Document No.

78K0/KB1+ User’s Manual This manual

78K0/KB1 User’s Manual U15836E

78K/0 Series Instructions User’s Manual U12326E

Documents Related to Development Tools (Software) (User’s Manuals)

Document Name Document No.

Operation U14445E

Language U14446E

RA78K0 Assembler Package

Structured Assembly Language U11789E

Operation U14297ECC78K0 C Compiler

Language U14298E

Operation (WindowsTM Based) U15373ESM78K Series System Simulator Ver. 2.30 or Later

External Part User Open Interface

Specifications U15802E

ID78K Series Integrated Debugger Ver. 2.30 or Later Operation (Windows Based) U15185E

Project Manager Ver. 3.12 or Later (Windows Based) U14610E

Caution The related documents listed above are subject to change without notice. Be sure to use the latest

version of each document when designing.

Preliminary User’s Manual U16846EJ1V0UD

Documents Related to Development Tools (Hardware) (User’s Manuals)

Document Name Document No.

IE-78K0-NS In-Circuit Emulator U13731E

IE-78K0-NS-A In-Circuit Emulator U14889E

Documents Related to Flash Memory Programming

Document Name Document No.

PG-FP4 Flash Memory Programmer User’s Manual U15260E

Other Documents

Document Name Document No.

SEMICONDUCTOR SELECTION GUIDE −Products and Packages −X13769X

Semiconductor Device Mount Manual Note

Quality Grades on NEC Semiconductor Devices C11531E

NEC Semiconductor Device Reliability/Quality Control System C10983E

Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) C11892E

Note See the “Semiconductor Device Mount Manual” website (http://www.necel.com/pkg/en/mount/index.html).

Caution The related documents listed above are subject to change without notice. Be sure to use the latest

version of each document when designing.

Preliminary User’s Manual U16846EJ1V0UD 9

CONTENTS

CHAPTER 1 OUTLINE ............................................................................................................................ 15

1.1 Features...................................................................................................................................... 15

1.2 Applications................................................................................................................................ 16

1.3 Ordering Information................................................................................................................. 16

1.4 Pin Configuration (Top View).................................................................................................... 17

1.5 K1 Family Lineup ....................................................................................................................... 18

1.5.1 78K0/Kx1, 78K0/Kx1+ product lineup ..............................................................................................18

1.5.2 V850ES/Kx1, V850ES/Kx1+ product lineup.....................................................................................21

1.6 Block Diagram............................................................................................................................ 24

1.7 Outline of Functions.................................................................................................................. 25

CHAPTER 2 PIN FUNCTIONS............................................................................................................... 27

2.1 Pin Function List........................................................................................................................ 27

2.2 Description of Pin Functions.................................................................................................... 29

2.2.1 P00 to P03 (port 0)...........................................................................................................................29

2.2.2 P10 to P17 (port 1)...........................................................................................................................29

2.2.3 P20 to P23 (port 2)...........................................................................................................................30

2.2.4 P30 to P33 (port 3)...........................................................................................................................30

2.2.5 P120 (port 12)..................................................................................................................................30

2.2.6 P130 (port 13)..................................................................................................................................31

2.2.7 AVREF ..............................................................................................................................................31

2.2.8 AVSS ................................................................................................................................................31

2.2.9 RESET.............................................................................................................................................31

2.2.10 X1 and X2 ........................................................................................................................................31

2.2.11 CL1 and CL2....................................................................................................................................31

2.2.12 VDD ..................................................................................................................................................31

2.2.13 VSS ..................................................................................................................................................31

2.2.14 FLMD0 and FLMD1..........................................................................................................................31

2.3 Pin I/O Circuits and Recommended Connection of Unused Pins......................................... 32

CHAPTER 3 CPU ARCHITECTURE...................................................................................................... 34

3.1 Memory Space............................................................................................................................ 34

3.1.1 Internal program memory space ......................................................................................................38

3.1.2 Internal data memory space.............................................................................................................39

3.1.3 Special function register (SFR) area................................................................................................39

3.1.4 Data memory addressing.................................................................................................................40

3.2 Processor Registers.................................................................................................................. 43

3.2.1 Control registers...............................................................................................................................43

3.2.2 General-purpose registers ...............................................................................................................47

3.2.3 Special Function Registers (SFRs)..................................................................................................48

3.3 Instruction Address Addressing..............................................................................................52

3.3.1 Relative addressing..........................................................................................................................52

3.3.2 Immediate addressing......................................................................................................................53

3.3.3 Table indirect addressing.................................................................................................................54

3.3.4 Register addressing.........................................................................................................................54

Preliminary User’s Manual U16846EJ1V0UD

3.4 Operand Address Addressing..................................................................................................55

3.4.1 Implied addressing.......................................................................................................................... 55

3.4.2 Register addressing ........................................................................................................................ 56

3.4.3 Direct addressing ............................................................................................................................ 57

3.4.4 Short direct addressing ................................................................................................................... 58

3.4.5 Special function register (SFR) addressing..................................................................................... 59

3.4.6 Register indirect addressing............................................................................................................ 60

3.4.7 Based addressing............................................................................................................................ 61

3.4.8 Based indexed addressing.............................................................................................................. 62

3.4.9 Stack addressing............................................................................................................................. 63

CHAPTER 4 PORT FUNCTIONS...........................................................................................................64

4.1 Port Functions............................................................................................................................64

4.2 Port Configuration...................................................................................................................... 65

4.2.1 Port 0............................................................................................................................................... 66

4.2.2 Port 1............................................................................................................................................... 69

4.2.3 Port 2............................................................................................................................................... 74

4.2.4 Port 3............................................................................................................................................... 75

4.2.5 Port 12............................................................................................................................................. 76

4.2.6 Port 13............................................................................................................................................. 77

4.3 Registers Controlling Port Function........................................................................................ 77

4.4 Port Function Operations..........................................................................................................81

4.4.1 Writing to I/O port............................................................................................................................ 81

4.4.2 Reading from I/O port...................................................................................................................... 81

4.4.3 Operations on I/O port..................................................................................................................... 81

CHAPTER 5 CLOCK GENERATOR ...................................................................................................... 82

5.1 Functions of Clock Generator...................................................................................................82

5.2 Configuration of Clock Generator............................................................................................82

5.3 Registers Controlling Clock Generator....................................................................................84

5.4 System Clock Oscillator............................................................................................................91

5.4.1 High-speed system clock oscillator ................................................................................................. 91

5.4.2 Ring-OSC oscillator......................................................................................................................... 95

5.4.3 Prescaler......................................................................................................................................... 95

5.5 Clock Generator Operation ....................................................................................................... 95

5.6 Time Required to Switch Between Ring-OSC Clock and High-Speed System Clock.......100

5.7 Time Required for CPU Clock Switchover............................................................................. 100

5.8 Clock Switching Flowchart and Register Setting................................................................. 101

5.8.1 Switching from Ring-OSC clock to high-speed system clock .........................................................101

5.8.2 Switching from high-speed system clock to Ring-OSC clock .........................................................102

5.8.3 Register settings.............................................................................................................................103

CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00...........................................................................104

6.1 Functions of 16-Bit Timer/Event Counter 00......................................................................... 104

6.2 Configuration of 16-Bit Timer/Event Counter 00...................................................................105

6.3 Registers Controlling 16-Bit Timer/Event Counter 00..........................................................109

6.4 Operation of 16-Bit Timer/Event Counter 00 ......................................................................... 115

6.4.1 Interval timer operation...................................................................................................................115

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