Microchip Technology PLECS Manual de usuario

2020 Microchip Technology Inc. DS50002997A

PLECS Model

Quick Start Guide

for Vienna PFC

DS50002997A-page 2 2020 Microchip Technology Inc.

Information contained in this publication regarding device

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and may be superseded by updates. It is your responsibility to

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Note the following details of the code protection feature on Microchip devices:

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• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

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Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

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Trademarks

The Microchip name and logo, the Microchip logo, Adaptec,

AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,

chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,

flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,

LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,

Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,

PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,

Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,

SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,

TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA

are registered trademarks of Microchip Technology Incorporated in

the U.S.A. and other countries.

APT, ClockWorks, The Embedded Control Solutions Company,

EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load,

IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision

Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire,

SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,

TimePictra, TimeProvider, Vite, WinPath, and ZL are registered

trademarks of Microchip Technology Incorporated in the U.S.A.

Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any

Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard,

CryptoAuthentication, CryptoAutomotive, CryptoCompanion,

CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average

Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial

Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker,

KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,

MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,

Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,

PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple

Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,

SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,

USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and

ZENA are trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in

the U.S.A.

The Adaptec logo, Frequency on Demand, Silicon Storage

Technology, and Symmcom are registered trademarks of Microchip

Technology Inc. in other countries.

GestIC is a registered trademark of Microchip Technology Germany

II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in

other countries.

All other trademarks mentioned herein are property of their

respective companies.

ISBN: 978-1-5224-6122-7

For information regarding Microchip’s Quality Management Systems,

please visit www.microchip.com/quality.

2020 Microchip Technology Inc. DS50002997A-page 3

PLECS MODEL

QUICK START GUIDE

FOR VIENNA PFC

Table of Contents

Preface ........................................................................................................................... 4

Introduction ...................................................................................................................7

Chapter 1. PLECS Standalone Installation .................................................................. 8

Chapter 2. Folder Structure......................................................................................... 10

Chapter 3. PLECS Settings ......................................................................................... 11

Chapter 4. Starting a Simulation................................................................................. 14

Chapter 5. Model Configurations

5.1 Front-End Input ............................................................................................ 16

5.2 Power Stage ................................................................................................. 17

5.3 Controller ...................................................................................................... 18

Chapter 6. Modifying Control Parameters and Component Values ........................ 20

Chapter 7. Monitoring Signals

7.1 Multi-Domain Model ..................................................................................... 23

7.2 Monitoring a Signal with a Meter .................................................................. 24

7.3 Monitoring Signals on Multiple Plots ............................................................ 28

7.4 Monitoring Signals on a Single Plot .............................................................. 29

7.5 Monitoring Component Signals with Probe .................................................. 30

7.6 Monitoring Subsystem Signals with Probe ................................................... 31

Chapter 8. Saving and Exporting Scope Traces ....................................................... 33

Chapter 9. Power Meter ............................................................................................... 35

Worldwide Sales and Service .................................................................................... 37

PLECS MODEL

QUICK START GUIDE

FOR VIENNA PFC

2020 Microchip Technology Inc. DS50002997A-page 4

Preface

INTRODUCTION

This chapter contains general information that will be useful to know before using the

PLECS Model Quick Start Guide for Vienna PFC . Items discussed in this chapter

include:

•Document Layout

•Conventions Used in this Guide

•Recommended Reading

•The Microchip Website

•Customer Support

•Document Revision History

DOCUMENT LAYOUT

This document describes how to use the Vienna PFC PLECS as a development tool.

The manual layout is as follows:

•“Introduction”

•Chapter 1. “PLECS Standalone Installation”

•Chapter 2. “Folder Structure”

•Chapter 3. “PLECS Settings”

•Chapter 4. “Starting a Simulation”

•Chapter 5. “Model Configurations”

•Chapter 6. “Modifying Control Parameters and Component Values”

•Chapter 7. “Monitoring Signals”

•Chapter 8. “Saving and Exporting Scope Traces”

•Chapter 9. “Power Meter”

NOTICE TO CUSTOMERS

All documentation becomes dated, and this manual is no exception. Microchip tools and

documentation are constantly evolving to meet customer needs, so some actual dialogs

and/or tool descriptions may differ from those in this document. Please refer to our website

(www.microchip.com) to obtain the latest documentation available.

Documents are identified with a “DS” number. This number is located on the bottom of each

page, in front of the page number. The numbering convention for the DS number is

“DSXXXXXXXXA”, where “XXXXXXXX” is the document number and “A” is the revision level

of the document.

For the most up-to-date information on development tools, see the MPLAB®IDE online help.

Select the Help menu, and then Topics to open a list of available online help files.

Preface

2020 Microchip Technology Inc. DS50002997A-page 5

CONVENTIONS USED IN THIS GUIDE

This manual uses the following documentation conventions:

DOCUMENTATION CONVENTIONS

Description Represents Examples

Arial font:

Italic characters Referenced books MPLAB®IDE User’s Guide

Emphasized text ...is the only compiler...

Initial caps A window the Output window

A dialog the Settings dialog

A menu selection select Enable Programmer

Quotes A field name in a window or

dialog

“Save project before build”

Underlined, italic text with

right angle bracket

A menu path File>Save

Bold characters A dialog button Click OK

A tab Click the Power tab

N‘Rnnnn A number in verilog format,

where N is the total number of

digits, R is the radix and n is a

digit.

4‘b0010, 2‘hF1

Text in angle brackets < > A key on the keyboard Press <Enter>, <F1>

Courier New font:

Plain Courier New Sample source code #define START

Filenames autoexec.bat

File paths c:\mcc18\h

Keywords _asm, _endasm, static

Command-line options -Opa+, -Opa-

Bit values 0, 1

Constants 0xFF, ‘A’

Italic Courier New A variable argument file.o, where file can be

any valid filename

Square brackets [ ] Optional arguments mcc18 [options] file

[options]

Curly brackets and pipe

character: { | }

Choice of mutually exclusive

arguments; an OR selection

errorlevel {0|1}

Ellipses... Replaces repeated text var_name [,

var_name...]

Represents code supplied by

user

void main (void)

{ ...

}

Preface

2020 Microchip Technology Inc. DS50002997A-page 6

RECOMMENDED READING

This quick start guide describes how to use the Vienna PFC PLECS. Another useful

document is listed below. The following Microchip document is available and

recommended as a supplemental reference resource:

•MSCICPFC/REF5 User's Guide - “MSCSICPFC/REF5 3-Phase 30 kW Vienna

PFC Reference Design” (DS50002952)

THE MICROCHIP WEBSITE

Microchip provides online support via our website at www.microchip.com. This website

is used as a means to make files and information easily available to customers.

Accessible by using your favorite Internet browser, the website contains the following

information:

•Product Support – Data sheets and errata, application notes and sample

programs, design resources, user’s guides and hardware support documents,

latest software releases and archived software

•General Technical Support – Frequently Asked Questions (FAQs), technical

support requests, online discussion groups, Microchip consultant program

member listing

•Business of Microchip – Product selector and ordering guides, latest Microchip

press releases, listing of seminars and events, listings of Microchip sales offices,

distributors and factory representatives

CUSTOMER SUPPORT

Users of Microchip products can receive assistance through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

Customers should contact their distributor, representative or field application engineer

(FAE) for support. Local sales offices are also available to help customers. A listing of

sales offices and locations is included in the back of this document.

Technical support is available through the website at:

http://www.microchip.com/support

DOCUMENT REVISION HISTORY

Revision A (May 2020)

• Initial release of this document.

PLECS MODEL

QUICK START GUIDE

FOR VIENNA PFC

2020 Microchip Technology Inc. DS50002997A-page 7

Introduction

INTRODUCTION

This document describes the procedure for installing PLECS simulation software,

configuring the simulation settings, simulating the Vienna Power Factor Correction

(PFC) model, and tutorial for using PLECS features used in the Vienna PFC model.

PLECS (Piecewise-Linear Electrical Circuit Simulation) is a simulation tool for power

electronics circuits and systems. Using ideal switches, it simulates the dynamic

behavior of complex systems quickly and efficiently. It uses a multi-domain approach

to simultaneously simulate the control, electrical, magnetic, thermal, and mechanical

domains. The Vienna PFC model incorporates the control, electrical, magnetic, and

thermal domains to provide an accurate representation of the Vienna PFC Reference

Design.

The design files, user's guide, and PLECS model of Microchip's 30 kW Vienna PFC

Reference Design can be downloaded at the following link:

https://www.microchip.com/PFC

FIGURE 1: Vienna PFC Reference Design and PLECS Model.

2020 Microchip Technology Inc. DS50002997A-page 8

PLECS MODEL

QUICK START GUIDE

FOR VIENNA PFC

Chapter 1. PLECS Standalone Installation

Plexim, the developer of PLECS, offers two versions of the software: PLECS Blockset

and PLECS Standalone. PLECS Blockset operates within the Simulink environment,

using Matlab as its processing engine. PLECS Standalone is a complete power

electronics simulation platform with its own processing engine, which enables it to run

much faster than PLECS Blockset. Both versions have identical core capabilities and

models can be exchanged between the two versions.

The Vienna PFC Reference Design was modeled using PLECS Standalone. For a trial

version of PLECS Standalone, follow the instructions at the Plexim link at the end of

this section to download, install, and request trial license. Without a license, PLECS

Standalone operates in demo mode, allowing users to build and simulate models.

However, the models cannot be saved, and the session is time-limited to 60 minutes.

During the installation process, change the default destination folder path to

C:\Plexim\PLECS 4.x (64 bit), as shown in Figure 1-1.

FIGURE 1-1: Changing the Destination Folder Path in the Setup Wizard.

PLECS Model Quick Start Guide for Vienna PFC

DS50002997A-page 9 2020 Microchip Technology Inc.

When requesting a license, select the 'PLECs PIL' checkbox to include

Processor-In-the-Loop capability, as illustrated in Figure 1-2.

FIGURE 1-2: Requesting Standalone Trial License.

For a video walk-through of the PLECS Standalone installation, see:

•Windows: https://www.plexim.com/support/videos/installing-standalone-win

•Mac:https://www.plexim.com/support/videos/installing-standalone-mac

2020 Microchip Technology Inc. DS50002997A-page 10

PLECS MODEL

QUICK START GUIDE

FOR VIENNA PFC

Chapter 2. Folder Structure

Extract the provided Vienna PFC model zip file to: C:\Plexim.

FIGURE 2-1: Extracting Compressed Folders.

The zip file contains two folders: Projects and Component Models. The Projects folder

contains a subfolder for the Vienna PFC reference design. Future reference designs

will be added to this folder. Within the Vienna-PFC folder are subfolders containing

support files, including source code for running Processor-In-the-Loop. The

Component Models folder contains the thermal descriptions for the Microchip SiC

Schottky barrier diode and SiC MOSFET used in the Vienna PFC reference design.

FIGURE 2-2: Folder Structure.

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