LSI LSIFC929 Manual de usuario

S14073

LSIFC929DualChannel

Fibre Channel I/O

Processor

Technical

Manual

August 2001

Revision 2.0

Electromagnetic Compatibility Notices

This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

1. This device may not cause harmful interference, and

2. This device must accept any interference received, including interference that may cause undesired operation.

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15

of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a

residential installation. This equipment generates, uses, and can radiate radio frequency energy and, if not installed

and used in accordance with the instructions, may cause harmful interference to radio communications. However,

there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful

interference to radio or television reception, which can be determined by turning the equipment off and on, the user

is encouraged to try to correct the interference by one or more of the following measures:

•Reorient or relocate the receiving antenna.

•Increase the separation between the equipment and the receiver.

•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

•Consult the dealer or an experienced radio/TV technician for help.

Shielded cables for SCSI connection external to the cabinet are used in the compliance testing of this Product.

LSI Logic is not responsible for any radio or television interference caused by unauthorized modiﬁcation of this

equipment or the substitution or attachment of connecting cables and equipment other than those speciﬁed by

LSI Logic. The correction of interferences caused by such unauthorized modiﬁcation, substitution, or attachment will

be the responsibility of the user.

The LSI Logic LSIFC929 is tested to comply with FCC standards for home or ofﬁce use.

This Class B digital apparatus meets all requirements of the Canadian Interference-Causing Equipment Regulations.

Cet appareil numérique de la classe B respecte toutes les exigences du Règlement sur le matériel brouilleur du

Canada.

This is a Class B product based on the standard of the Voluntary Control Council for Interference from Information

Technology Equipment (VCCI). If this is used near a radio or television receiver in a domestic environment, it may

cause radio interference. Install and use the equipment according to the instruction manual.

LSI Logic Corporation

North American Headquarters

Milpitas, CA

408.433.8000

iii

This document is preliminary. As such, it contains data derived from functional

simulations and performance estimates. LSI Logic has not veriﬁed either the

functional descriptions, or the electrical and mechanical speciﬁcations using

production parts.

This document contains proprietary information of LSI Logic Corporation. The

information contained herein is not to be used by or disclosed to third parties

LSI Logic products are not intended for use in life-support appliances, devices,

or systems. Use of any LSI Logic product in such applications without written

consent of the appropriate LSI Logic ofﬁcer is prohibited.

DB14-000135-02, Third Edition (August 2001)

This document describes LSI Logic Corporation’s LSIFC929 Dual Channel Fibre

Channel I/O Processor and will remain the ofﬁcial reference source for all

revisions/releases of this product until rescinded by an update.

LSI Logic Corporation reserves the right to make changes to any products herein

at any time without notice. LSI Logic does not assume any responsibility or

liability arising out of the application or use of any product described herein,

except as expressly agreed to in writing by LSI Logic; nor does the purchase or

use of a product from LSI Logic convey a license under any patent rights,

copyrights, trademark rights, or any other of the intellectual property rights of

LSI Logic or third parties.

TRADEMARK ACKNOWLEDGMENT

The LSI Logic logo design and GigaBlaze are registered trademarks of LSI Logic

Corporation. ARM is a registered trademark of ARM Ltd.,, used under license.

All other brand and product names may be trademarks of their respective

companies.

To receive product literature, visit us at http://www.lsilogic.com.

For a current list of our distributors, sales ofﬁces, and design resource

centers, view our web page located at

http://www.lsilogic.com/contacts/na_salesofﬁces.html

LSIFC929 Dual Channel Fibre Channel I/O Processor v

Preface

This book is the primary reference and technical manual for the

LSIFC929 Fibre Channel I/O Processor. It contains a complete functional

description for the LSIFC929 and includes complete physical and

electrical speciﬁcations for the product.

Audience

This document was prepared for logic designers and applications

engineers and is intended to provide an overview of the LSI Logic

LSIFC929 and to explain how to use the LSIFC929 in the initial stages

of system design.

This document assumes that you have some familiarity with

microprocessors and related support devices. The people who beneﬁt

from this book are:

•Engineers and managers who are evaluating the LSIFC929 for

possible use in a system

•Engineers who are designing the LSIFC929 into a system

Organization

This document has the following chapters and appendixes:

•Chapter 1, Introduction,provides a general description of the

LSIFC929.

•Chapter 2, Fibre Channel Overview,brieﬂy describes some key

elements of Fibre Channel, including Layers, Topologies, and

Classes of Service.

•Chapter 3, LSIFC929 Overview,provides an introduction to the

basic features of the LSIFC929, including the host interface, protocol

assist engines, and support components.

•Chapter 4, Signal Descriptions,lists and describes the signals on

the LSIFC929.

•Chapter 5, Register Descriptions,brieﬂy describes the PCI address

space, the Conﬁguration Registers, and the Host Interface Registers.

•Chapter 6, Speciﬁcations,describes the electrical speciﬁcations of

the LSIFC929, and provides pinout information and packaging

dimensions.

•Appendix A, Register Summary, is a register summary.

•Appendix B, Reference Speciﬁcations, lists several speciﬁcations

and applicable World Wide Web URLs that may be of beneﬁt to the

reader.

•Appendix C, Glossary of Terms and Abbreviations, is a glossary

of terms and abbreviations.

Related Publications

Fusion-MPT Message Passing Interface Speciﬁcation,

Number DB14-000174-00

Conventions Used in This Manual

The word assert means to drive a signal true or active. The word

deassert means to drive a signal false or inactive. Signals that are active

LOW end in an “/.”

Hexadecimal numbers are indicated by the preﬁx “0x” —for example,

0x32CF. Binary numbers are indicated by the preﬁx “0b” —for example,

0b0011.0010.1100.1111.

Preface vii

Revision Record

Revision Date Remarks

0.3 04/2000 First Advance Information printing.

1.0 05/2001 First Preliminary release.

Changes:

Converted the Manual to LSI format.

Table 4.2 - RTRIM description changed.

Table 4.2 - RXLOS0 and RXLOS1 descriptions changed.

Table 4.4 - Test Modes removed from MODE[7:0] description.

Section 5.3.2 - Note reworded.

Only.

Table 6.8 - Min/Max values and test conditions changed.

Figure 4.1 and Tables 4.1 and 4.2 have been moved to the end of Chapter

6, making the layout of this Manual consistent with our current guidelines.

They are now Figure 6.16 and Tables 6.16 and 6.17

Table 4.1 - new signals are added to the device, incorporating hot swap

capabilities. They are also added to Figure 6.16 and Tables 6.16 and 6.17.

2.0 07/2001 Release of Final Manual.

Changes:

Deleted Section 1.7.

Removed “Draft” references from Manual.

Table 6.1 - Changed ESD maximum spec to 1.5 kV.

Section 6.2.2 - Referred user to the Fibre Channel Physical Interfaces

speciﬁcation (FC-PI, Rev. 11) for Fibre Channel Interface Timings.

Appendix B, Table 6.8 - Updated the list of Reference Speciﬁcations.

LSIFC929 Dual Channel Fibre Channel I/O Processor ix

Contents

Chapter 1 Introduction

1.1 Overview 1-1

1.1.1 Hardware Features 1-1

1.1.2 FC Features 1-2

1.1.3 Software Features 1-3

1.1.4 OS Support 1-3

1.1.5 Targeted Applications 1-3

1.2 General Description 1-4

1.2.1 Multifunction PCI 1-5

1.2.2 Simple Autospeed Negotiation Algorithm 1-5

1.2.3 Failover 1-5

1.3 Hardware Overview 1-6

1.3.1 PCI Interface 1-7

1.3.2 32-Bit Memory Controller 1-7

1.3.3 I/O Processor 1-8

1.3.4 System Interface 1-8

1.3.5 Integrated 2 Gbaud Transceivers 1-8

1.3.6 Link Controllers 1-8

1.3.7 Transmitters 1-9

1.3.8 Receivers 1-9

1.3.9 Context Managers 1-9

1.4 Initiator Operations 1-9

1.5 Target Operations 1-9

1.6 Diagnostics 1-9

Chapter 2 Fibre Channel Overview

2.1 Introduction 2-1

2.2 FC Layers 2-2

2.3 Frames 2-3

2.4 Exchanges 2-4

2.5 FC Ports 2-7

2.6 FC Topologies 2-7

2.6.1 Point-to-Point Topology 2-8

2.6.2 Fabric Topology 2-8

2.6.3 Arbitrated Loop Topology 2-8

2.7 Classes of Service 2-9

Chapter 3 LSIFC929 Overview

3.1 Introduction 3-1

3.1.1 Data Flows 3-2

3.2 Message Interface 3-3

3.2.1 Messages 3-3

3.2.2 Message Flow 3-4

3.3 SCSI Message Class 3-5

3.4 LAN Message Class 3-6

3.5 Target Message Class 3-7

3.6 Support Components 3-8

3.6.1 SSRAM Memory 3-8

3.6.2 Flash ROM 3-9

3.6.3 Serial EEPROM 3-9

Chapter 4 Signal Descriptions

Chapter 5 Registers

5.1 PCI Addressing 5-1

5.2 PCI Bus Commands Supported 5-2

5.3 PCI Cache Mode 5-3

5.3.1 Support for PCI Cache Line Size Register 5-4

5.3.2 Selection of Cache Line Size 5-4

5.3.3 Memory Write and Invalidate Command 5-4

5.3.4 Read Commands 5-6

5.4 Unsupported PCI Commands 5-7

5.5 Programming Model 5-7

5.6 PCI/Multifunction PCI Conﬁguration Registers 5-7

5.6.1 Multifunction PCI 5-8

5.7 Host Interface Registers 5-24

5.8 Shared Memory 5-32

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