JVC KD-LX555R Manual de usuario

SERVICE MANUAL

2003/5

CD RECEIVER

4979320034

KD-LX555R

TABLE OF CONTENTS

1 Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Disassembly method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Adjustment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

4 Description of major ICs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

KD-LX555R

STDM

SOURCE

Area Suffix

E ------ Continental Europe

1-32 (No.49793)

SECTION 4

Description of major ICs

4.1 BA6956AN (IC830, IC831) : Reversible motor driver

• Block diagram

• Pin function • Truth table

TSD

CONTROL LOGIC

1 2 3 4 5 6 7 8 9

REF

OUT2

RNF

OUT1

Vcc

FIN

GND

RIN

Pin No. Symbol Function

1 VREF Output high voltage level control terminal

2 OUT2 Output terminal for motor

3 RNF GND of driver division

4 OUT1 Output terminal for motor

5 VM Power supply for driver division

6 Vcc Power supply for signal division

7 FIN Input terminal for control logic

8GNDGND

9 RIN Input terminal for control logic

FIN RIN OUT1 OUT2 MODE

H L H L Forward rotation mode

L H L H Reverse rotation mode

H H L L Break Mode

L L OPEN OPEN Stand-by mode

(No.49793)1-33

4.2 BR24C01AFV-W-X (IC1502) : EEPROM

•Pinlayout

• Block diagram

• Pin function

*1 An open drain output requires a pull-up resister.

A0 A1 A2 GND

Vcc WP SCL SDA

GND

Vcc

SCL

1kbit EEPROM ARRAY

7bit

ADDRESS

DECODER SLAVE/WORD

ADDRESS REGISTER

7bit

8bit

DATA

CONTROL LOGIC

HIGH VOLTAGE GEN. Vcc LEVEL DETECT

ACK

START STOP

Pin name I/O Description

Vcc - Power supply

GND - Ground (0v)

A0,A1,A2 IN Slave address set

SCL IN Serial clock input

SDA IN / OUT Slave and word addressserial data input serial data output *1

WP IN Write protect input

1-34 (No.49793)

4.3 BR24C32F (IC703) : EEPROM

• Pin Layout

• Pin layout & Block diagram

• Pin function

4.4 HD74HC126FP (IC771) : Changer Control

SDASCLWP

BR24C32/F

VCC

GNDA2A1A0

PIN NAME I/O Function

VCC - Power Supply

GND - Ground (0V)

A0-A2 I Slave Address Set

SCL I Serial Clock Input

SDA I/O Slave and Word Address.

Serial Data Input$ Serial Data Output *1

WP I Write Protect Input

Vcc

SCL

GND

32 Kbit EEPROM ARRAY

8bit

12bit

DATA

SLAVE WORD

ADDRESS REGISTER

ADDRESS

DECODER

START STOP

CONTROL LOGIC

VCC LEVEL DETECT

HIGH VOLTAGE GEN.

ACK

OE1

OE2

Vss

Vcc

OE4

OE3

HD74HC126

(No.49793)1-35

4.5 BU1923F (IC51) : RDS decoder

•Pinlayout

• Block diagram

QUAL

RDATA

Vref

MUX

VDD1

VSS1

VSS3

CMP

RCLK

N.C.

VDD2

VSS2

8th Switched

capacitor filter

PLL

57kHz

RDS/ARI

PLL

1187.5Hz Bi-phase

decoder Differential

decoder

Measurement

circuit

Reference

clock

100k

120k

anti-aliasing

filter

comparator

Analog

Power supply

Digital

Power supply

13 14 10 9

MUX

Vref

VDD1

VSS1

VDD2

VSS2

Xl X0 T1 T2

RDAT

QUAL

RCLK

CMP

VSS3

1-36 (No.49793)

4.6 HA13164A (IC961) : Regulator

• Terminal layout

• Block diagram

• Pin function

123456789101112131415

Pin No. Symbol Function

1 EXTOUT Output voltage is VCC-1 V when M or H level applied to CTRL pin.

2 ANTOUT Output voltage is VCC-1 V when M or H level to CTRL pin and H level to ANT-CTRL.

3 ACCIN Connected to ACC.

4 VDDOUT Regular 5.7V.

5 SW5VOUT Output voltage is 5V when M or H level applied to CTRL pin.

6 COMPOUT Output for ACC detector.

7 ANT CTRL L:ANT output OFF H:ANT output ON

8 VCC Connected to VCC.

9 BATT DET Low battery detect.

10 AUDIO OUT Output voltage is 9V when M or H level applied to CTRL pin.

11 CTRL L:BIAS OFF M:BIAS ON H:CD ON

12 CD OUT Output voltage is 8V when H level applied to CTRL pin.

13 ILM AJ Adjustment pin for ILM output voltage.

14 ILM OUT Output voltage is 10V when M or H level applied to CTRL pin.

15 GND Connected to GND.

15 13

ILM AJGND GND

10u

0.1u

AUDIO OUT

CD OUT

CTRL

ANT CTRL

EXT OUT

ANT OUT

VCC ACC

Surge Protector

BIAS TSD

100u C2

0.1u

ACC

BATT.DET OUT

COMPOUT

VDD OUT

SW5VOUT

ILMOUT

0.1u

UNIT R:

C:F

note1) TAB (header of IC)

connected to GND

TAB

(No.49793)1-37

4.7 HD74HCT126T-X : (IC1500,IC1503) Buffer

• Pin arrangement • Pin function

H : High level

L : Low level

X : Irrelevant

Z : Off (Hhigh-impedance)state of a 3-stage output

• Block diagram

Vcc

GND

Input Output

CA Y

LX Z

HL L

HH H

1-38 (No.49793)

4.8 LA47505 (IC941) : Power amp.

• Terminal layout

Muting &

On Time Control

Circuit

protective

circuit

Mute

circuit

Protective

circuit

Ripple

Filter

Stand by

Switch

206

(No.49793)1-39

• Terminal layout

• Pin function

AC CONT1

GND1

OUTFR-

STBY

OUTFR+

Vcc1/2

OUTRR-

GND2

OUTRR+

VREF

INRR

INFR

SGND

INFL

INRL

ONTIME

OUTRL+

GND3

OUTRL-

Vcc3/4

OUTFL+

MUTE

OUTFL-

GND4

Pin No. Symbol Function

1 AC CONT1 Header of IC

2 GND1 Power GND

3 OUTFR- Outpur(-) for front Rch

4 STBY Stand by input

5 OUTFR+ Output (+) for front Rch

6 Vcc1/2 Power input

7 OUTRR- Output (-) for rear Rch

8 GND2 Power GND

9 OUTRR+ Output (+) for rear Rch

10 VREF Ripple filter

11 INRR Rear Rch input

12 INFR Front Rch input

13 SGND Signal GND

14 INFL Front Lch input

15 INRL Rear Lch input

16 ONTIME Power on time control

17 OUTRL+ Output (+) for rear Lch

18 GND3 Power GND

19 OUTRL- Output (-) for rear Lch

20 Vcc3/4 Power input

21 OUTFL+ Output (+) for front

22 MUTE Muting control input

23 OUTFL- Output (-) for front

24 GND4 Power GND

25 NC No connection

1-40 (No.49793)

4.9 LA6579H-X (IC1681) : 4-Channel bridge driver

• Pin layout & Block diagram

FR FR

VIN1

VIN1-B

VIN1+B

S-GND

VIN1-S

MUTE

VREFIN

VCCS

3.3VREG

REGIN

VIN2G

VIN2

VIN3G

VIN3

VIN1-A

VIN1+A

VCCP1

VO+

VO-

VO2+

VO2-

VO3+

VO3-

VO4+

VO4-

VCCP2

VIN4

VIN4G

[H]

[L]

VIN1_SW

[H]: OP-AMP_A

[L]: OP-AMP_B

33k 11k Signal system

power supply

All outputs ON/OFF

H : ON

L : OFF MUTE

Level shift Level shift

Power system GND

Signal system

power supply

3.3VREG

(External:PTP Tr)

Power system

GND

Level shift Level shift

33k 11k

-11k

33k

11k

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