Analog Devices EVAL-ADM1075EBZ Manual de usuario

EVAL-ADM1075EBZ User Guide

UG-304

One Technology Way •P. O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: 781.329.4700 •Fax: 781.461.3113 •www.analog.com

Evaluating the ADM1075 −48 V Hot-Swap Controller and Digital Power Monitor with

PMBus Interface

FEATURES

Full support evaluation kit for the ADM1075

Supports LFCSP device package

Board populated and tested with −48 V, 10 A, 680 µF design

Input voltage range of −36 V to −75 V

PMBus™ communication supported

Isolated PMBus interface for −48 V operation

Special N-MOSFET footprint to accommodate different FET

packages

Supports up to 3 sense resistors in parallel

Supports up to 3 field effect transistors (FETs) in parallel

3 on-board ADT75 accurate temperature sensors

Supports cascade setup for multiple boards

Toggle and push-button switches for easy input control

LED indicated status outputs

PACKAGE CONTENTS

EVAL-ADM1075EBZ evaluation board

HARDWARE REQUIREMENTS

USB-to-serial-I/O interface USB-SDP-CABLEZ (The USB-SDP-

CABLEZ is not supplied in the evaluation kit and should be

ordered separately from Analog Devices, Inc. Only one

USB-SDP-CABLEZ is required in the multiboard cascade

setup.)

8-way, 150 mm Micro-MaTch ribbon cable (optional)

SOFTWARE REQUIREMENT

Analog Devices hot-swap and power monitoring evaluation

software

GENERAL DESCRIPTION

The E VA L -ADM1075EBZ is a compact full feature evaluation

board for the ADM1075-1ACPZ and ADM1075-2ACPZ devices.

The layout gives users a clear visual of all the peripheral compo-

nents and the hot-swap power path. The layout also maximizes

the ability of the board to dissipate heat for some of the key

components on the power path, allowing evaluation of high

current hot-swap setups.

Three sense-resistor slots and three multipackage FET slots give

users great flexibility and allow them to simulate a wide range of

application setups.

Multiple test points allow easy access to all critical points/pins.

Seven LEDs give users a direct visual indication of variations in

the board status, such as system input voltage, isolation power,

IC PWRGD output, LATCH output, and GPO outputs. Three

ADT75 digital temperature sensors on the back of the board

allow users to obtain the FET temperature through an I2C bus

in real time.

The board supports I2C communication, allowing users to

communicate with the ADM1075 and the ADT75. A 64 Kb I2C

EEPROM is used to store the ADC resistor divider and sense

resistor values on board for use with the evaluation software.

The evaluation kit also supports cascade setup so that multiple

evaluation boards can be connected and share the same I2C bus.

The boards are fully compatible with the ADM1075 evaluation

software tool, which can be downloaded at

http://www.analog.com/hotswaptools.

Users need a USB-SDP-CABLEZ USB-to-I2C dongle to use the

evaluation software tools. A Micro-MaTch ribbon cable may also

be required if multiple evaluation boards are cascaded. This

cable can be ordered through Farnell.

The evaluation board is prepopulated and tested with a −48 V

(−36 V minimum to −75 V maximum), 10 A hot-swap design

with a 680 µF output capacitor. The part is configured to retry

seven times; however, the board is easily reconfigurable to select

different retry schemes (see Table 6).

Complete specifications for the ADM1075 can be found in the

ADM1075 data sheet available from Analog Devices and should

be consulted in conjunction with this user guide when using the

evaluation board.

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT

WARNING AND LEGAL TERMS AND CONDITIONS.Rev. C | Page 1 of 19

UG-304 EVAL-ADM1075EBZ User Guide

TABLE OF CONTENTS

Features .............................................................................................. 1

Package Contents.............................................................................. 1

Hardware Requirements .................................................................. 1

Software Requirement...................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Evaluation Board Description......................................................... 3

Evaluation Board Hardware ............................................................ 5

Switch, Jumper, and LED Functions...........................................5

Evaluation Board Overview .............................................................6

Evaluation Board Lab Setup.............................................................9

Board Specifications......................................................................9

Test Plots...................................................................................... 10

Evaluation Board Schematics and Artwork................................ 11

Ordering Information.................................................................... 14

Bill of Materials........................................................................... 14

REVISION HISTORY

8/14—Rev. B to Rev. A

Changes to Figure 17...................................................................... 11

Changes to Figure 18...................................................................... 12

Changes to Table 8 .......................................................................... 14

4/13—Rev. A to Rev. B

Changes Figure 1 .............................................................................. 3

Changes to Table 7............................................................................ 9

Changes to Figure 17...................................................................... 11

Changes to Table 8.......................................................................... 14

9/12—Rev. 0 to Rev. A

Changes to Package Contents, to Hardware Requirements,

and to General Description............................................................. 1

Changes to Evaluation Board Description Section...................... 3

Changes to Figure 2 .......................................................................... 4

Changes to Table 2 ............................................................................ 5

Changes to Figure 10........................................................................ 9

11/11—Revision 0: Initial Version

Rev. C | Page 2 of 19

EVAL-ADM1075EBZ User Guide UG-304

EVALUATION BOARD DESCRIPTION

The evaluation board is designed to demonstrate many different

features of the ADM1075. Not all components are required in a

typical design. The functional block diagram in Figure 1 shows

the key components of the evaluation board.

The typical lab setup is shown in Figure 2. The hot-swap line input

voltage is connected across the RTN IN and −48V IN connectors.

A resistive load can be connected across RTN OUT and −48V

OU T. The min i-USB connector is used to supply 5 V power to the

isolated section of the board while the USB-SDP-CABLEZ is

connected to the 10-way connector, SK3, for isolated I2C

communication.

Isolation is required in most −48 V applications because there is a

large ground potential difference between the −48 V section of the

board and a PC or microcontroller. The ADuM1250 is used to

demonstrate I2C isolation on the board, and the ADuM3200 is used

to demonstrate isolation of other digital signals. The ADuM5404

provides quad-channel digital isolation with isoPower®. An

integrated dc-to-dc converter provides up to 500 mW of regulated,

isolated power from the isolated side to the −48 V side. When

the isolated section is powered, the isoPower is switched in to

power the 5 V components on the primary side of the board.

FAULT TIMER

FET POWER

FOLDBACK

CONTROL

DIGITAL

AND

PMBus

12-BIT ADC

POWER

MULTIPLIER

POWER

ACCUMULATOR

GATE CONTROL

CURRENT LIMIT

DRAIN

RESTARTSHDN

LATCH

GPO1/ALERT1/CONV

GPO2/ALERT2

SDAO

SDAI

SCL

ADR

ADC_AUX

PWRGD

SPLYGD

UNDERVOLTAGE

AND

OVERVOLTAGE

DETECTOR

AND

REFERENCE

GENERATOR

VIN

ADC_V

VCAP

UVL

UVH

SENSE+

GATE

PLIM

N-FET

SENSE

= 2mΩ

DROP

–48V RTN (0V)

–48V

VEE

SENSE–

ISET

TIMER SS VEE_G VEE

VEE

PWRGD_ISO

SPLYGD_ISO

LOAD

= 680μF

= 3kΩ

560kΩ

16kΩ

825kΩ

11.3kΩ

470nF

150kΩ

1kΩ

1.8MΩ

1μF

VEE

SHDN_ISO

RESTART_ISO

SDA_ISO

SCL_ISO

LATCH_ISO

GPO2_ISO

LATCH

GPO2

SPLYGD

ADuM5404

ADuM1250

ADuM3200

10070-101

Figure 1. Functional Block Diagram

Rev. C | Page 3 of 19

UG-304 EVAL-ADM1075EBZ User Guide

10070-102

Figure 2. Board Lab Setup

Table 1. Emitter Follower Configuration

Component Value Effect

R57 0 Ω System power to Emitter Follower 1

R25 Not populated Isolates Emitter Follower 1 from Emitter Follower 2

R59

Not populated

Power 5 V LED off other emitter follower (Emitter Follower 2)

R43 0 Ω Powers 5 V LED off Emitter Follower 2

R58 0 Ω Powers VIN directly via emitter follower 1

D5 11 V Zener Powers VIN directly with ~10.5 V

The ADM1075 can be powered via a shunt resistor from the hot-

swap line voltage or can be powered directly from a 9.2 V to 11.5 V

supply. The shunt power option is the default on the evaluation

board; however, an emitter follower can be reconfigured to generate

the chip voltage directly. The required board modifications are

shown in Table 1. More information on powering the ADM1075

can be found in the ADM1075 data sheet. The default power

configuration is shown in Figure 3, and the emitter follower

configuration is shown in Figure 4.

LOAD

ADM1075

EMITTER

FOLLOWER

1TERMINAL

BLOCK

TERMINAL

BLOCK

ISOLATED AREA

LEDs

DEFAULT POWER PATH

OPTIONAL POWER PATH

EMITTER

FOLLOWER

ISOLATED 5V

5V 5V

RTN

–48V

12V

SHUNT iCouplers

isoPower

USB

MINI

TEMP

SENSORS

EEPROM

10070-103

Figure 3. Board Power (Shunt)

LOAD

ADM1075

EMITTER

FOLLOWER

1TERMINAL

BLOCK

TERMINAL

BLOCK

ISOLATED AREA

LEDs

DEFAULT POWER PATH

OPTIONAL POWER PATH

CONFIGURABLE POWER PATH

EMITTER

FOLLOWER

ISOLATED 5V

10.5V

RTN

–48V

USB

MINI

TEMP

SENSORS

EEPROM

10070-104

iCouplers

isoPower

Figure 4. Board Power (Emitter Follower)

Rev. C | Page 4 of 19

EVAL-ADM1075EBZ User Guide UG-304

EVALUATION BOARD HARDWARE

SWITCH, JUMPER, AND LED FUNCTIONS

Table 2. Connector Functions

Connector Description

RTN IN, −48V IN Hot-swap line voltage inputs that also power the board components. Input voltage is 36 V to 75 V.

RTN OUT, −48V OUT Hot-swap line voltage outputs.

J6 5 V auxiliary board voltage. Not required; emitter follower circuit used to generate 5 V from 48 V input.

SK1, SK2 Bottom and top cascade connectors; connect with a Micro-MaTch ribbon cable to link with other

EVAL-ADM1075EBZ boards.

J9 I2C/PMBus communication dongle connector. From top down: VEE, SDA, SCL. Note that the dongle should only be

connected at this side (primary side) if using a 0 V to 48 V supply. If using a −48 V to 0 V supply, the USB port can be

damaged. This 3-pin connector is designed to be used with the USB-SMBUS-CABLEZ dongle. Not required if using

USB-SDP-CABLEZ.

J7 Isolated side I2C/PMBus communication dongle connector. From top down: SCL, SDA, GND. This 3-pin connector is

designed to be used with the USB-SMBUS-CABLEZ dongle. Not required if using USB-SDP-CABLEZ.

J8 5 V isolation supply voltage (power supply).

J5 5 V isolation supply voltage (mini-USB).

SK3 10-way isolated side connector for USB-SDP-CABLEZ; I2C communication and 5 V supply.

Table 3. Switch Functions

Switch Description

S_SHDN2 Toggle switch to shut down hot swap. Right = hot swap enabled, and left = hot swap disabled.

S_SHDN

Push-button switch to generate shutdown. Can be used to clear faults. Note that

SHDN

has a seven-retry counter. After

seven SHDN events, GPO2 goes active low. A restart or clear via PMBus is required to enable the hot swap again.

S_DeLATCH Push-button switch to clear latch after seven shutdown events (not on Rev. 0 boards).

S_RST Push-button switch to generate 10 sec restart.

Table 4. LED Functions

LED Description

D_INPUT Voltage input > ~10 V detected. Active high; green.

D_LATCH LATCH, active low; red.

D_PWRGD PWRGD, active low; green.

D_SPLYGD SPLYGD, active low; green.

D_GPO1 GPO1/ALERT1/CONV, active low; yellow.

D_GPO2 GPO2/ALERT2, active low; yellow.

D_ISO Isolation 5 V power supply. Active high; blue (not on Rev. 0 boards).

Table 5. On-Board ICs

IC Description

U1 ADM1075 main IC

U2 64 kb I2C EEPROM

U3 ADuM3200, dual-channel digital isolator

U4 ADuM1250, dual I2C isolator

U5 ADuM5404, quad-channel isolator with integrated dc-to-dc converter

UT1 to UT3 ADT75, ±2°C accurate, 12-bit digital temperature sensor, sensing temperature on the MOSFETs

Table 6. Retry Configuration

BOM Component

Retry Scheme R_7retry R_1rty_10s R_7rty_10s

No Retries (Latch Off) Not populated Not populated Not populated

7 Retries, Then Latch Off (Default) 0 Ω Not populated Not populated

1 Retry Every 10 Seconds Not populated 0 Ω Not populated

7 Retries Every 10 Seconds Not populated Not populated 0 Ω

Rev. C | Page 5 of 19

UG-304 EVAL-ADM1075EBZ User Guide

EVALUATION BOARD OVERVIEW

10070-001

Figure 5. Evaluation Board Top Side (Rev. A)

Rev. C | Page 6 of 19

EVAL-ADM1075EBZ User Guide UG-304

10070-002

Figure 6. Evaluation Board Bottom Side

10070-003

Figure 7. Multipackage N-MOSFET Footprint

Rev. C | Page 7 of 19

UG-304 EVAL-ADM1075EBZ User Guide

Rev. C | Page 8 of 19

10070-004

Figure 8. Recommended Sense Resistor Layout (Not on Rev. 0 Boards)

For the best current sensing accuracy with the footprint shown

in Figure 8, chip resistors without a nickel barrier layer (usually

in green) are recommended. The data in this user guide may

not be applicable to all resistors and results may vary depending

on resistor composition and size. Test alternative resistors

independently. It is the responsibility of the user to ensure that

the layout dimensions and structure of the footprint comply

with the individual SMT manufacturing requirements. Analog

Devices does not accept responsibility for any issues that may

arise because of using this footprint.

1.20mm

3.40mm

0.60mm

0.50mm

1.20mm

4.00mm

8.40mm

1.60mm

3.40mm

0.50mm

10070-005

Figure 9. Optimum Footprint Dimensions (Based on Welwyn ULR Green

Resistor and Layout in Figure 8)

EVAL-ADM1075EBZ User Guide UG-304

EVALUATION BOARD LAB SETUP

10070-012

Figure 10. Board Lab Setup

BOARD SPECIFICATIONS

Table 7. Board Specifications

Parameter Rating

UVL 32.4 V

UVH 36 V

OV Rising 74.0 V

OV Falling

69.9 V

Load Capacitance

680 µF

Trip Current (Nominal) 9.56 A

Regulation Current (Nominal) 10 A

Constant Power Level 155 W

Rev. C | Page 9 of 19

UG-304 EVAL-ADM1075EBZ User Guide

TEST PLOTS

10070-013

Figure 11. Power-Up Profile; Channel 1 = VIN (Yellow); Channel 2 = VDS (Blue);

Channel 3 = Gate (Pink); Channel 4 = System Current (Green);

M1 = FET Power (CH2 × CH4) (Orange)

10070-014

Figure 12. Power-Up into a Fault (TIMER); Channel 1 = VIN (Yellow); Channel 2 =

VDS (Blue); Channel 3 = TIMER (Pink); Channel 4 = System Current (Green)

10070-015

Figure 13. TIMER During a Fault; Channel 1 = VIN (Yellow); Channel 2 = VDS

(Blue); Channel 3 = TIMER (Pink); Channel 4 = System Current (Green)

10070-016

Figure 14. Severe OC Event; Channel 1 = VIN (Yellow); Channel 2 = VDS (Blue);

Channel 3 = Gate (Pink); Channel 4 = System Current (Green);

M1 = FET Power (CH2 × CH4) (Orange)

10070-017

Figure 15. Short Circuit Event; Channel 1 = VIN (Yellow); Channel 2 = VDS

(Blue); Channel 3 = Gate (Pink); Channel 4 = System Current (Green);

M1 = FET Power (CH2 × CH4) (Orange)

10070-018

Figure 16. Short-Circuit Event (Zoom); Channel 1 = VIN (Yellow); Channel 2 =

VDS (Blue); Channel 3 = Gate (Pink); Channel 4 = System Current (Green)

Rev. C | Page 10 of 19

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