Analog Devices ADZS-BF707-BLIP2 Guía del usuario

ADZS-BF707-BLIP2 Board

Evaluation System Manual

Revision 1.0, April 2015

Part Number

82-100126-01

Analog Devices, Inc.

One Technology Way

Norwood, Mass. 02062-9106

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may not be reproduced in any form without prior, express written consent

from Analog Devices, Inc.

Printed in the USA.

Disclaimer

Analog Devices, Inc. reserves the right to change this product without

prior notice. Information furnished by Analog Devices is believed to be

accurate and reliable. However, no responsibility is assumed by Analog

Devices for its use; nor for any infringement of patents or other rights of

third parties which may result from its use. No license is granted by impli-

cation or otherwise under the patent rights of Analog Devices, Inc.

Trademark and Service Mark Notice

The Analog Devices logo, Blackfin, CrossCore, and EngineerZone are reg-

istered trademarks of Analog Devices, Inc.

Blackfin+ is a trademark of Analog Devices, Inc.

All other brand and product names are trademarks or service marks of

their respective owners.

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Regulatory Compliance

The ADZS-BF707-BLIP2 board is designed to be used solely in a labora-

tory environment. The board is not intended for use as a consumer end

product or as a portion of a consumer end product. The board is an open

system design which does not include a shielded enclosure and therefore

may cause interference to other electrical devices in close proximity. This

board should not be used in or near any medical equipment or RF devices.

The ADZS-BF707-BLIP2 board is in the process of being certified to

comply with the essential requirements of the European EMC directive

2004/108/EC and therefore carries the “CE” mark.

The BLIP2 board evaluation system contains ESD (electrostatic discharge)

sensitive devices. Electrostatic charges readily accumulate on the human

body and equipment and can discharge without detection. Permanent dam-

age may occur on devices subjected to high-energy discharges. Proper ESD

precautions are recommended to avoid performance degradation or loss of

functionality. Store unused BLIP2 boards in the protective shipping pack-

age.

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ADZS-BF707-BLIP2 Board Evaluation System Manual v

CONTENTS

PREFACE

Product Overview ............................................................................ x

Purpose of This Manual ................................................................. xii

Intended Audience ......................................................................... xii

Manual Contents .......................................................................... xiii

What’s New in This Manual .......................................................... xiii

Technical Support .......................................................................... xiv

Supported Processors ...................................................................... xiv

Supported Tools .............................................................................. xv

Product Information ....................................................................... xv

Analog Devices Web Site ........................................................... xv

EngineerZone ........................................................................... xvi

Notation Conventions .................................................................... xvi

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Contents

vi ADZS-BF707-BLIP2 Board Evaluation System Manual

USING ADZS-BF707-BLIP2 BOARD

Package Contents ......................................................................... 1-2

Default Configuration .................................................................. 1-2

BLIP2 Board Installation .............................................................. 1-3

BLIP2 Board Session Startup ........................................................ 1-4

Evaluation License ........................................................................ 1-6

Mobile DDR Memory .................................................................. 1-7

SPI Flash ...................................................................................... 1-8

UART1 Interface .......................................................................... 1-8

USB Interface ............................................................................... 1-8

SD Interface ................................................................................. 1-9

Debug Interface ............................................................................ 1-9

Power-On-Self Test ....................................................................... 1-9

RF Wireless Interface .................................................................... 1-9

Power Architecture ..................................................................... 1-10

Example Programs ...................................................................... 1-10

Reference Design Information ..................................................... 1-11

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ADZS-BF707-BLIP2 Board Evaluation System Manual vii

Contents

ADZS-BF707-BLIP2 BOARD HARDWARE REFERENCE

System Architecture ...................................................................... 2-2

Push Buttons ................................................................................ 2-4

GPIO Push Buttons (SW1 and SW2) ....................................... 2-5

Reset Push Button (SW3) ........................................................ 2-5

WAKE IO Push Button (SW4) ................................................ 2-5

LEDs ............................................................................................ 2-6

GPIO Status LED (LED1) ...................................................... 2-7

SYS_FAULT LED (LED4) ....................................................... 2-7

Connectors ................................................................................... 2-8

JTAG/SWD/SWO Connector (P3) ........................................ 2-10

USB Connector (P4) ............................................................. 2-10

USB to UART Connector (P8) .............................................. 2-10

Power Connector (P5) ........................................................... 2-11

RF Wireless Connector (J2) ................................................... 2-11

SD Connector (J3) ................................................................ 2-11

ADZS-BF707-BLIP2 BOARD BILL OF MATERIALS

ADZS-BF707-BLIP2 BOARD SCHEMATIC

INDEX

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Contents

viii ADZS-BF707-BLIP2 Board Evaluation System Manual

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ADZS-BF707-BLIP2 Board Evaluation System Manual ix

PREFACE

Thank you for purchasing the ADZS-BF707-BLIP2 board, Analog

Devices, Inc. low-cost evaluation system for the ADSP-BF70x family of

Blackfin®processors.

The ADSP-BF707 processor is a member of the Blackfin family of prod-

ucts. Blackfin processors combine a dual-MAC state-of-the-art signal

processing engine, the advantages of a clean, orthogonal RISC-like micro-

processor instruction set, and single-instruction, multiple-data (SIMD)

multimedia capabilities into a single instruction-set architecture. New

enhancements to the Blackfin+™ core add 32-bit MAC and 16-bit com-

plex MAC support, cache enhancements, branch prediction and other

instruction set improvements, all while maintaining instruction set com-

patibility to previous Blackfin products.

The ADZS-BF707-BLIP2 board is shipped with all of the necessary hard-

ware—you can start the evaluation immediately. The package contains the

standalone evaluation board, CE-approved power supply, and USB cable.

The BLIP2 board ships with an ICE-1000 emulator.

A RF Wireless connector is provided for connecting the BLIP2 board to

an Analog Devices Wireless Sensor Network (WSN) cluster board

(EV-ADRN-WSN-2Z).

The on-board mechanical switches are push buttons.

Product Overview

x ADZS-BF707-BLIP2 Board Evaluation System Manual

The evaluation board is designed to be used in conjunction with the

CrossCore®Embedded Studio (CCES) development tools to test capabil-

ities of the ADSP-BF70x processors. The development environment aids

advanced application code development and debug, such as:

• Create, compile, assemble, and link application programs written

in C++, C, and assembly

• Load, run, step, halt, and set breakpoints in application programs

• Read and write data and program memory

• Read and write core and peripheral registers

Product Overview

The board features:

• Analog Devices ADSP-BF707 processor

• 184-ball BGA package

• 24 MHz crystal oscillator for processor

• 24 MHz crystal oscillator for USB

• Mobile DDR memory (DMC0) chip

• 32M bit x 16 x 4 banks (2G bit)

• MT46H128M16LFDD-48WT

• Quad SPI Flash (SPI2)

• 32M bit serial flash memory

• Windbond W25Q32

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