Aeroflex GR-UT699 Manual de usuario

GR-UT699

Development Board

User Manual

AEROFLEX GAI LER AB

Rev. 0.6, 2013-03-28

2 GR-UT699 Development Board

User Manual

nformation furnished by Aeroflex Gaisler AB is believed to be accurate and reliable.

However, no responsibility is assumed by Aeroflex Gaisler AB for its use, nor for any infringements

of patents or other rights of third parties which may result from its use.

No license is granted by implication or otherwise under any patent or patent rights of Aeroflex

Gaisler AB.

Aeroflex Gaisler AB tel +46 31 7758650

Kungsgatan 12 fax +46 31 421407

411 19 Göteborg [email protected]

Sweden www.aeroflex.com/gaisler

All information is provided as is. There is no warranty that it is correct or suitable for any purpose,

neither implicit nor explicit.

3 GR-UT699 Development Board

User Manual

TABLE OF CONTENT

1 INTRODUCTION...........................................................................................................7

1.1 Overview......................................................................................................................7

1.2 References...................................................................................................................9

1.3 Handling....................................................................................................................... 9

1.4 Abbreviations.............................................................................................................10

2 ELECTRICAL DE IGN...............................................................................................11

2.1 Block Diagram............................................................................................................11

2.2 UT699 AS C............................................................................................................... 11

2.3 Memory...................................................................................................................... 12

2.3.1 SRAM.........................................................................................................................13

2.3.2 FLASH.......................................................................................................................13

2.3.3 EEPROM....................................................................................................................13

2.3.4 MEMORY EXPANS ON CONNECTOR.....................................................................13

2.4 CAN nterface............................................................................................................14

2.4.1 Configuration of Bus Termination...............................................................................14

2.4.2 Configuration of Slew Rate.........................................................................................15

2.5 Spacewire (LVDS) nterfaces.....................................................................................15

2.5.1 SPW interface circuit..................................................................................................15

2.5.2 SPWCLK....................................................................................................................16

2.6 Serial nterface...........................................................................................................17

2.7 Debug Support Unit (DSU) Serial nterface................................................................17

2.8 Oscillators and Clock nputs.......................................................................................19

2.8.1 System Clock.............................................................................................................19

2.8.2 SPW_CLK..................................................................................................................19

2.8.3 Ethernet Clock............................................................................................................19

2.8.4 PC Clock...................................................................................................................20

2.9 Power Supply and Voltage Regulation......................................................................20

2.10 Ethernet nterface......................................................................................................20

2.11 PC nterface..............................................................................................................21

2.11.1 Host/System Slot Configuration.................................................................................22

2.11.2 Peripheral Slot Configuration.....................................................................................23

2.12 Other nterfaces and Circuits.....................................................................................24

2.12.1 GP O..........................................................................................................................24

2.12.2 Reset Circuit and Button............................................................................................24

2.12.3 Watchdog...................................................................................................................25

2.12.4 JTAG interface...........................................................................................................25

2.12.5 Mezzanine/Memory Expansion...................................................................................25

3 ETTING UP AND U ING THE BOARD...................................................................27

4 INTERFACE AND CONFIGURATION.....................................................................32

4.1 List of Front/Back Panel Connectors..........................................................................32

4.2 List of Oscillators, Switches and LED's......................................................................42

4.3 List of Jumpers...........................................................................................................43

4 GR-UT699 Development Board

User Manual

LI T OF TABLE

Table 3-1: Default Status of Jumpers/Switches..............................................................................27

Table 4-1: List of Connectors.........................................................................................................32

Table 4-2: J1 UART-1 - Serial nterface (RS232) connections .....................................................34

Table 4-3: J2 RJ45-ETHERNET Connector...................................................................................34

Table 4-4: J3 AS C– JTAG Connector ..........................................................................................34

Table 4-5: J4A (upper connector) CANBUS-1 interface connections............................................35

Table 4-6: J4B (lower connector) CANBUS-0 interface connections..............................................35

Table 4-7: J5 SPW-0 interface connections .................................................................................35

Table 4-8: J6 SPW-1 interface connections .................................................................................36

Table 4-9: J7 SPW-2 interface connections .................................................................................36

Table 4-10: J8 SPW-3 interface connections................................................................................36

Table 4-11: Expansion connector J9 Pin-out (see section 2.12.5 for pin order).............................38

Table 4-12: J10 P O Header Pin out..............................................................................................38

Table 4-13: Expansion connector J11 Pin-out (see section 2.12.5 for pin order)..........................39

Table 4-14: J12 DSU-Serial over USB MiniAB...............................................................................40

Table 4-15: J13 POWER – External Power Connector..................................................................40

Table 4-16: J14 POWER – External Power Connector..................................................................40

Table 4-17: SOD MM socket J15 Pin-out.......................................................................................42

Table 4-18: List and definition of Oscillators..................................................................................42

Table 4-19: List and definition of PCB mounted LED's...................................................................42

Table 4-20: List and definition of Switches.....................................................................................42

Table 4-21: D P Switch S3 'P O[7..0]' definition.............................................................................42

Table 4-22: D P Switch S4 'P O[15..8]' definition............................................................................43

Table 4-23: List and definition of PCB Jumpers.............................................................................43

5 GR-UT699 Development Board

User Manual

LI T OF FIGURE

Figure 1-1: GR-UT699 Development Board.....................................................................................8

Figure 2-1: Block Diagram of GR-UT699 board.............................................................................11

Figure 2-2: UT699 AS C................................................................................................................. 12

Figure 2-3: On-Board Memory Configuration.................................................................................13

Figure 2-4: Block Diagram of the CAN interface............................................................................14

Figure 2-5: Transceiver and Termination Configuration (one of 2 interfaces shown).....................15

Figure 2-6: Transceiver and Termination of the SPW interfaces (2 of 4 interfaces shown)............16

Figure 2-7: Serial interface............................................................................................................. 17

Figure 2-8: Debug Support Unit connections.................................................................................17

Figure 2-9: Clock Distribution Scheme...........................................................................................19

Figure 2-10: Power Regulation Configuration.................................................................................20

Figure 2-11: Block diagram of Ethernet nterface...........................................................................21

Figure 2-12: Block diagram for PC System Slot connections........................................................22

Figure 2-13: Block diagram of PC Peripheral connections............................................................23

Figure 2-14: P O interface.............................................................................................................. 24

Figure 2-15: Watchdog configuration.............................................................................................25

Figure 2-16: Mezzanine Connector Pin Number Ordering..............................................................26

Figure 3-1: GRMON Output Screenshot #1...................................................................................29

Figure 3-2: GRMON Output Screenshot #2...................................................................................31

Figure 4-1: Front Panel View (pin 1 of connectors marked)...........................................................33

Figure 4-2: PCB Top View..............................................................................................................44

Figure 4-3: GR-UT699 Assembly Photo.........................................................................................45

REVI ION HI TORY

Revision Date Page Description

0.1 DRAFT 2008-05-01 All New document/draft

0.2 2008-09-16 §2.5.2

§2.12.1

Added note about SPWCLK oscillator

Added notes about PC _ NT[A B C D] signals

Modified Figure 2-9

Updated Figure 4-2.

0.3 2008-10-27 All Formatting changes

0.4 2009-01-07 7,28,29,

41,42

Updated Figure 1-1, Figure 3-1, Figure 3-2, Figure 4-2, Figure 4-3

0.5 2012-12-10 §1.2

§2.3.4

§2.12.15

Added a link to reference document about Mezzanine Connectors

Added description of Mezzanine connectors and pin numbering

0.6 2013-03-28 §2.11.1,

§2.11.2

§3

Corrected references to JP8 / JP10 in PC jumper configurations

Added paragraph explaining grmon command for using Digilent HS-1 JTAG

cable.

6 GR-UT699 Development Board

User Manual

ntentionally Blank

7 GR-UT699 Development Board

User Manual

1 INTRODUCTION

1.1 Overview

This document describes the GR-UT699 Development Board.

The purpose of this equipment is to provide developers with a convenient hardware platform

for the evaluation and development of software for the Aeroflex UT699RH RadHard 32-bit

Fa lt-Tolerant LEON 3FT/SPARCTM V8 Processor AS C device. The UT699 is a Leon3FT

based custom AS C for Aerospace applications.

The GR-UT699 Unit comprises a custom designed PCB with a 6U Compact PC front panel,

making the board suitable either for stand-alone bench top development, or for installation in

a 6U High Compact PC rack. All the principle interfaces and functions are accessible on

front panel connectors.

The interface connectors on the Front Panel of the unit provide:

Figure 1-1: GR-UT699 Development Board

8 GR-UT699 Development Board

User Manual

•One Serial UART interface (RS232)

•Ethernet

•JTAG - DSU

•Two CAN bus interfaces

•Four Spacewire interfaces

•Serial DSU UART (Mini-AB USB connector)

•16 pins General Purpose /O Port

•Push Buttons for RESET and BREAK

•LED indicators

To enable convenient connection to the interfaces, the connector types and pin-outs are

compatible with the standard connector types for these types of interfaces.

Additionally the board is equipped with a 32 bit Master/target PC interface via standard

Compact PC Connector interface on the back edge of the PCB.

The PCB contains the following main items as detailed in section 2 of this document:

•UT699RH AS C

•Memory

•SRAM 80 Mbit (1 banks x 2Mword x 40 bit, typ. 10ns)

(optional second bank is not fitted as standard)

•SDRAM SOD MM socket (up to 64Mword x 40 bit with 512Mbyte module)

•FLASH 128Mbit (4M x 32 bit, typ. 90ns)

•EEPROM D L32 socket (1 bank x 1Mbit, organised x8 bit wide)

•additional memory via memory expansion connector

•nterfaces

•two CAN interfaces

•four Spacewire LVDS electrical interfaces

•one serial UART (RS232) interface

•10/100MBit Ethernet PHY

•DSU - Serial (over USB Converter) interface

•DSU - JTAG (over JTAG connector) interface

•GP O (16 signals) general purpose input/output port

•Power, Reset, Clock and Auxiliary circuits

1.2 References

RD-1 GR-UT699_schematic.pdf, Schematic

RD-2 GR-UT699_assy_drawing.pdf, Assembly Drawing

RD-3 UT699RH Datasheet

RD-4 GR-MEZZ Technical Note, Technical Note about Mezzanine connectors

9 GR-UT699 Development Board

User Manual

1.3 Handling

ATTENTION : OB ERVE PRECAUTION FOR

HANDLING ELECTRO TATIC EN ITIVE DEVICE

This unit contains sensitive electronic components which can be damaged by Electrostatic

Discharges (ESD). When handling or installing the unit observe appropriate precautions and

ESD safe practices.

When not in use, store the unit in an electrostatic protective container or bag.

When configuring the jumpers on the board, or connecting/disconnecting cables, ensure that

the unit is in an unpowered state.

1.4 Abbreviations

D L Dual n-Line

ESD Electro-Static Discharge

FP Front Panel

FT Fault-Tolerant

GP O General Purpose nput / Output

/O nput/Output

P ntellectual Property

LVDS Low Voltage Digital Signalling

M Media ndependent nterface

MUX Multiplexer

PCB Printed Circuit Board

SPW Spacewire

10 GR-UT699 Development Board

User Manual

2 ELECTRICAL DE IGN

2.1 Block Diagram

The GR-UT699 board provides the electrical functions and interfaces as represented in the

block diagram, Figure 2-1.

Figure 2-1: Block Diagram of GR-UT699 board

The Main PCB is of standard Double Eurocard format (233.35 x 160mm) and, in principle,

could be used 'stand-alone' on the bench-top simply using an external +5V power supply.

The board is fitted with a Compact PC front panel, and is compatible with mounting in a 6U

Compact PC rack.

2.2 UT699 A IC

The UT699RH ASC is packaged in a 352-pin Ceramic Quad Flatpack, and is soldered in to

the PCB.

Details of the interfaces, operation and programming of the UT699 AS C is given in the

UT699 Datasheet, RD-3.

UT699RH

A IC

SPW ETHER-

NET PHY

CANBUS

SER AL

DSU

UART

RS232

MEMORY

EXPANS ON

POWER

AUX

FLASH

EEPROM

SDRAM

SRAM

GP O /F

POWER

16 x GP O USB-

SER AL

2 x CAN 4 x SPW 10/100 Mb

ETHERNET

1 x RS232

UART

D P

SW TCHES

COMPACT PC

NTERFACE

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