Texas Instruments TPS7H2140-SEP Manual de usuario

EVM User's Guide: TPS7H2140EVM

TPS7H2140-SEP Evaluation Module (EVM)

Description

The TPS7H2140EVM provides a platform to

demonstrate the operation and features of the

TPS7H2140-SEP eFuse. The EVM provides test

points, jumpers, connection terminals, and labeled

easy-to-access components allowing for customized

configurations of device features. The board also

includes a voltage regulator to enable device

functionality without the need for secondary power

sources for IO configuration.

Features

1. Operating voltage 4.5 V– 32 V

2. Programmable current limit with external resistor

3. Output channels can be connected in parallel for

higher current applications

4. Multiplex current sense output

TPS7H2140EVM Board

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TPS7H2140-SEP Evaluation Module (EVM) 1

1 Evaluation Module Overview

1.1 Introduction

The TPS7H2140EVM is the evaluation module (EVM) for the TPS7H2140-SEP and provides a platform to

evaluate performance and features. This user's guide provides descriptions for the connectors and test points,

the schematic, bill of materials, and board layout of the EVM.

The EVM is designed to be easily configurable for use under different operating conditions or requirements. By

default, the EVM is configured as shown in Table 1-1. To change the configuration of the device, please refer

to the TPS7H2140-SEP data sheet (SLVSH46) to calculate values of any passive components that need to be

changed.

1.2 Kit Contents

• EVM Board (1)

• EVM Kit User's Guide (1)

1.3 Specification

Load # 1

Load # 2

Load # 3

Load # 4

EN1, 2, 3, 4

DIAG_EN

SEH

SEL

FAULT

GND

OUT1

OUT2

OUT3

OUT4

THER

5 V

RCS

RCL

VIN

MCU

RPU

Figure 1-1. Typical Application Diagram

Table 1-1. TPS7H2140EVM Default Configuration

Specification Value Description

Input voltage

VIN 12 V Falls within the recommended device input voltage range of 4.5 V to 32 V.

Parallel Output Channels CH1-CH4 Allows current capacity of all four channels to be shared for higher current applications.

Output current

IOUT

0 to 4 A Allows per-channel output current to remain under the default configured current limit of 1.3

Current limit

1.3 A

Does not exceed the maximum recommended output current of 1.35 A per channel.

Set by:

R11 = 3.01 kΩ

R15 = 3.01 kΩ

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Table 1-1. TPS7H2140EVM Default Configuration (continued)

Specification Value Description

Maximum current sense 2.7 A

Allows for accurate current sense through the default configured current limit.

Set by:

R29 = 442 Ω

1.4 Device Information

The TPS7H2140-SEP is a quad-channel, 4.5 V to 32 V, 160-mΩ eFuse with an adjustable current limit and

high accuracy current sense. Additionally, the TPS7H2140-SEP features short-to-GND protection, loss-of-GND

protection, thermal overload protection, and inductive load negative voltage clamp. The device contains four

N-channel MOSFETs for independent control of all four channels using a discrete enable signal for each

output channel. The device supports diagnostic reporting with both digital status output and analog current

sense report. Diagnostics can be disabled for multiplexing the sense pin between different devices. External

programmable current limit improves the whole system’s reliability by limiting the inrush or overload current.

Thermal shutdown behavior can be configured between latch off or auto-retry.

• Data sheet: TPS7H2140-SEP Radiation Tolerant 32-V, 160-mΩ Quad-Channel eFuse

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TPS7H2140-SEP Evaluation Module (EVM) 3

2 Hardware

2.1 Connection Descriptions

This section describes the connectors on the EVM as well and how to properly connect, set up, and use the

TPS7H2140EVM.

2.1.1 Connectors

TPS7H2140EVM

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Table 2-1. Summary of Connectors and Test Points

Reference Designator Function

J1 (pin 1) IN Input voltage and current

J1 (pin 2) GND

J13 V_IO Input for IO voltage

J14 GND

J24 (pin 1) OUT1 Output voltage and current for channel 1

J24 (pin 2) GND

J25 (pin 1) OUT2 Output voltage and current for channel 2

J25 (pin 2) GND

J26 (pin 1) OUT3 Output voltage and current for channel 3

J26 (pin 2) GND

J27 (pin 1) OUT4 Output voltage and current for channel 4

J27 (pin 2) GND

TP1, J10 IN

Test point

TP17, J16 OUT1

TP19, J17 OUT2

TP21, J18 OUT3

TP23, J19 OUT4

TP2, TP14, TP16, TP18, TP20, TP22, TP24 GND

TP3 EN1

TP4 EN2

TP5 EN3

TP6 EN4

TP7 THER

TP8 DIAG_EN

TP9 SEH

TP10 SEL

TP11 FAULT

TP12 CL

TP15, J15 CS

J2 V_IO - EN1 - GND

Shunt for mode selection

J3 V_IO - EN2 - GND

J4 V_IO - EN3 - GND

J5 V_IO - EN4 - GND

J6 V_IO - THER - GND

J7 V_IO - DIAG_EN - GND

J8 V_IO - SEH - GND

J9 V_IO - SEL - GND

J11 CL - GND

J12 GND - GND_IC

J20 Open-load detection pull-up OUT1

J21 Open-load detection pull-up OUT2

J22 Open-load detection pull-up OUT3

J23 Open-load detection pull-up OUT4

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2.2 Variable Resistors for CS and CL

2.2.1 Current Sense Resistor

• For the most accurate and detailed guidance, please refer to the Accurate Current Sense section of the

TPS7H2140-SEP data sheet.

High-accuracy current sensing allows better real-time monitoring and more accurate diagnostics without further

calibration. High-accuracy current sensing provides real-time output current monitoring. A current mirror is used

to source 1/KCS of the load current, and is reflected as VCS = ICS × RCS. KCS is a constant value (300) across

temperature and supply voltage. Verify that the CS voltage is in the linear region (0–4 V) when in normal

operation.

When in a fault condition, the CS pin works as a diagnostics report pin. When open load/short to VIN happen

in on-state, VCS almost equals to zero. When current limit, thermal shutdown/swing, or open load/short to VIN

in disabled-state happen, the voltage is clamped at VCS_FAULT. Channel selection for both current and fault

reporting is accomplished through the multiplexer digital inputs (SEL and SEH), which can be configured using

jumper J8 (SEH) and jumper J9 (SEL).

Equation 1 is the equation for the current-sense resistor, R29.

RCS =VCS

ICS =

VCS ×KCS

IOUTx (1)

IOUTx

VCS

VCS_FAULT

Fault

Report

VCS_LINEAR

Current

Monitor

On-State: Current Limit, Thermal Fault



-State: Open Load, Short to Input, Reverse Polarity

Figure 2-1. Current-Sense Output-Voltage Curve

Take the following points into consideration when calculating RCS.

• Verify that VCS is within the current-sense linear region (VCS_LINEAR, IOUTx_LINEAR) across the full range of the

load current. Check RCS with Equation 2.

RCS =VCS

ICS ≤

VCS_LINEAR MAX  × KCS

IOUTx MAX (2)

• In fault mode, verify that ICS is within the source capacity of the CS pin (ICS_FAULT). Check RCS with Equation

RCS =VCS

ICS ≥

VCS_FAULT MAX 

ICS_FAULT MIN (3)

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2.2.2 Current Limit Resistors

• For the most accurate and detailed guidance, please refer to the Adjustable Current Limit section of the

TPS7H2140-SEP data sheet

External resistors are used to convert a proportional load current into a voltage, which is compared with an

internal reference voltage. When the voltage on the CL pin exceeds the reference voltage, the output current is

clamped.

The inherent current limit (ICL_INTERNAL) is still present when using an external current limit. The smaller value

between the internal or external set value decides the actual nominal current limit. If the user decides to not use

an external programmable current, then tie the CL pin to ground.

Use Equation 4 and Equation 5 to calculate the value of RCL. The internal band gap voltage, VCL_TH, has a

typical value of 0.8 V. KCL (2500) is the output current and the current-limit set value and is constant across

temperature and supply voltage.

ICL =VCL_TH

RCL =IOUT

KCL (4)

RCL =VCL_TH × KCL

IOUT (5)

The current-limit resistors, R11 and R15 are both 3.01kΩ resistors connected in parallel. Populate/depopulate

R11 and R15 to vary CL. When a shunt is inserted in J11, there is no external current limit function, the internal

current limit is active.

2.3 Open-Load Detection Pull-Up Resistors

• For the most accurate and detailed guidance, please refer to the Open-Load Detection section of the

TPS7H2140-SEP data sheet

The TPS7H2140-SP has the ability to detect an open load on a disabled output channel. For this feature

to be functional, a pull-up resistor is required between VIN and the output channel. The TPS7H2140EVM

board includes pull-up resistors and jumpers to toggle this functionality. By inserting shunts in J20-J24, each

output channel can be pulled up through the included 20 kΩ resistors to enable the open-load detection. When

an open load is detected on any disabled channel, the FAULT pin is pulled low. Therefore, when using the

TPS7H2140EVM with less than all four channels being loaded, the shunts for each disabled and unloaded

channel must be removed for the FAULT pin to report accurately.

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2.4 Connecting Channels In Parallel

The TPS7H2140EVM provides the ability to connect output channels in parallel for higher current applications

than one channel can allow. Channels can be connected in parallel by soldering 0 Ω resistors to pads on the

PCB. Output channels are connected together by soldering 4, 0 Ω resistors on the bottom layer of the PCB.

For each channel being connected, TI recommends to solder an additional 0 Ω resistor on the top layer to

synchronize the enable signals for each of the bonded channels.

Table 2-2 lists which pads have 0 Ω resistors attached to enable parallel channel operation for each 2-channel

combination.

Table 2-2. Output Channel Bonding Connections

Channels To Bond Reference Designators

CH1 - CH2 R12 (EN), R16, R19, R22, R25

CH2 - CH3 R13 (EN), R18, R21, R24, R27

CH3 - CH4 R14 (EN), R17, R20, R23, R26

Any number of adjacent channels can be connected together and channels combinations are not limited to the

pairs shown in Table 2-2.

When a 0 Ω resistor is connected between the enable signals of two or more channels, TI recommends to use

only one enable jumper to control the enable status for each bonded channel. Remove the other enable jumpers

for the bonded channel set.

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3 Implementation Results

3.1 Separated Output Results

The following tests were performed using an EVM which was modified from the default configuration, found in

Table 1-1, by removing the parallel connections between all channels.

CAUTION

When the device is limiting output current, the amount of power dissipated can be large. If left

unchecked, then this can cause the board to heat up quickly. If the thermal overload behavior of the

device is configured in retry mode, then the board remains hot until overcurrent state is corrected.

3.1.1 Power Up and Power Down

Figure 3-1. Power-up

Figure 3-2. Power-down

Both tests were performed using VIN = 12 V and a load of 12 Ω.

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3.1.2 Enable and Disable

Figure 3-3. Channel Enable

Figure 3-4. Channel Disable

Both tests were performed using VIN = 12 V and a load of 12 Ω.

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