ST UM0804 Manual de usuario

February 2010 Doc ID 16303 Rev 2 1/25

UM0804

User manual

EVALSPEAr300 - evaluation board for the SPEAr300

1 Description

The EVALSPEAr300 evaluation board for SPEAr300 is intended to be used for three main

purposes:

■To allow you to quickly evaluate and debug software for the SPEAr300

■Act as a learning tool to rapidly get familiar with the SPEAr300 features

■Provide a starting point for the development of the final application board

It is equipped with most of the interfacRev 2es offered by the SPEAr300.

Figure 1. EVALSPEAr300 evaluation board

www.st.com

Contents UM0804

2/25 Doc ID 16303 Rev 2

Contents

1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Contents of the kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Connectors locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Features and block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5 Start up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.1 Unpacking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.2 Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.3 Booting procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

6 Block descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.1 Dynamic memory subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.1.1 Memory chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.1.2 Local power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.1.3 Signal termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.2 Static memory subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.2.1 Serial Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.2.2 Serial I2C EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.2.3 NAND Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.2.4 SPI Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6.3 Ethernet subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6.4 USB 2.0 subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6.4.1 Host ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6.4.2 Device port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6.5 Debug interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6.6 Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

6.7 A/D interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

6.8 Real time clock (battery powered) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

UM0804 Contents

Doc ID 16303 Rev 2 3/25

6.9 General power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6.10 General-purpose I/Os . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6.11 Reset switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6.12 LCD Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6.13 SDIO interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

7 Jumper settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7.1 Switch 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7.2 Switch 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

8 Expansion connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

8.1 Board schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

9 Evaluation board bill of materials (BOM) . . . . . . . . . . . . . . . . . . . . . . . 15

Appendix A Licence agreements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

List of tables UM0804

4/25 Doc ID 16303 Rev 2

List of tables

Table 1. Switch 2 bits [2:1] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 2. Switch 2 (SoC functional configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 3. Switch 2 (debug configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 4. Switch 2 (functional configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 5. Switch 3 (strapping options) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 6. Capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 7. Connectors, inductors and transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 8. Semiconductors and crystals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 9. Resistors and switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

UM0804 List of figures

Doc ID 16303 Rev 2 5/25

List of figures

Figure 1. EVALSPEAr300 evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2. Connectors locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Serial cable setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Contents of the kit UM0804

6/25 Doc ID 16303 Rev 2

2 Contents of the kit

The EVALSPEAr300 evaluation board kit contains:

●SPEAr300 evaluation board

●AC/adapter (output voltage 5 V)

●2 Plug Adapter (USA/Europe)

●User manual documentation

3 Connectors locations

Figure 2. Connectors locations

Manual Reset J3 A2D J6 FIrDA

J11 Power Jack

+5V

J1 USB2 Device

J2 USB2

Host1

Host2

J9 Ethernet

J5 SDIO

J7 GPI/O J8 LCD

SPEAr300

SW3 Boot

Selection

J14 ETM9

Trace-B

J13 ETM9

Trace-A

J4 JTAG

JP5 COM1

Settin

J10 COM1

SW2 Functional

Configuration

UM0804 Features and block diagram

Doc ID 16303 Rev 2 7/25

4 Features and block diagram

4.1 Features

●SPEAr300 embedded MPU

●Up to 2 Gb DDR2 333 MHz (std 128 MB)

●Up to 16 MB Serial Flash memory (std 8 MB)

●Up to 2 Gb NAND Flash memory (std 64 MB)

●4 Kb Serial I2C

●4 Mb SPI Flash memory

●Two USB 2.0 full Host port channels

●One USB 2.0 HS Device

●10/100 Ethernet port

●One serial port (up to 115 Kbaud)

●Debug ports (JTAG + ETM9)

●8 ADC channels (10 bit, 1 Msamples)

●8 GPIOs

●LCD I/F up to 24 bits-per-pixel (bpp)

●SD Card interface

4.2 Block diagram

Figure 3. Block diagram



DebugI/F

USB2

USB2

10/100

SPEAr300

 

SerialI/F

8ChannelsA2D LCDI/F

E2PROM

NOR

FLASH

NAND

FLASH

Power

Supply

ExpansionConnectorBottomSide

SPIFLASH

Start up UM0804

8/25 Doc ID 16303 Rev 2

5 Start up

5.1 Unpacking

ELECTROSTATIC WARNING:

The EVALSPEAr300 Evaluation board is shipped in protective anti-static packaging.

The board must not be subjected to high electrostatic potentials. General practices

for working with static sensitive devices should be applied when working with this

board.

●Wear an anti-static wristband - Wearing a simple anti-static wristband can help to

prevent ESD from damaging the Spear300 evaluation board.

●Self-grounding - Touch a grounded conducting material before handling and

periodically while handling the Spear300 evaluation board.

●Use an anti-static pad - When configuring the Spear300 evaluation board, place it on

an antic-static pad to reduce the possibility of ESD damage.

●Only handle the board edges - When handling the Spear300 evaluation board.

5.2 Connection

●Connect a serial cable (RS232 on J4) to a host PC (see Figure 4).

●On a host PC running Windows or Linux, start the Terminal program.

●Connect the AC Adapter to a power outlet.

●Power ON the board (plug the jack of the AC/Adapter on J11). A sequence of boot

messages is displayed, followed by the Linux console prompt.

For more information, refer to the SPEAr300 evaluation board software getting started user

manual available on www.st.com/spear.

5.3 Booting procedure

The SPEAr300 Board is able to boot a Linux kernel pre-installed in the serial NOR Flash.

At power on, the serial port outputs a brief header message with some uBoot information

(uBoot version, SDK version, and some internal hardware information). At this point you can

choose to:

1. Stop the system directly in uBoot: For this you have to press the spacebar on the

host computer keyboard before the boot delay time expires (default is 3 seconds).

2. Boot Linux: The system logs you in automatically as super user and the Linux shell

prompt is displayed on the screen.

UM0804 Block descriptions

Doc ID 16303 Rev 2 9/25

6 Block descriptions

6.1 Dynamic memory subsystem

The Dynamic memory subsystem is composed of three major parts:

6.1.1 Memory chip

The memory used is a Micron DDR2 device and its part number is: MT47H64M16HR-3. Its

size is 128 Mb x 8 (16 Mb x 8 x 8 banks).

6.1.2 Local power supply

It is based on a Monolithic Voltage regulator for the chip set and DDR2/3 (PM6641). It is

generated locally in order to minimize the layout impact and also to avoid any noise injection

between different subsystems.

6.1.3 Signal termination

A parallel termination is added on the clock lines to compensate, if needed, the layout

dissymmetry. Two 100 Ohm resistors are used for each line in order to obtain an impedance

of 50 ohm. All the other terminations are directly inside the pads (both on the SPEAr300 and

the memory sides).

6.2 Static memory subsystem

6.2.1 Serial Flash memory

This block is based on an M25P64 ST Serial Flash memory device. The size of this chip is 8

MB.

A resistor (R8) is also provided to protect the Flash memory from any unwanted write

access.

6.2.2 Serial I2C EEPROM

This block is based on the M24C04W ST Serial I2C EEPROM. The size of this chip is 4 Kb.

A resistor (R107) is also provided to protect the EEPROM from any unwanted write access.

6.2.3 NAND Flash memory

This block is based on Nand512W3A2CZA6 ST NAND Flash memory. The size of this chip

is 512 Mbit.

6.2.4 SPI Flash memory

This block is based on the M25P40 ST Serial Flash memory. The size of this chip is 4 Mb.

A resistor (R64) is also provided to protect the Flash memory from any unwanted write

access.

Block descriptions UM0804

10/25 Doc ID 16303 Rev 2

6.3 Ethernet subsystem

This subsystem is based on the Ethernet PHY STE100P (U9) and a connector (J9) that also

includes also all the required magnetics (Line transformer ratio 1:1).

Several LEDs are present to indicate the status of the line:

●The green LED in the connector is driven on continuously when 100 Mb/s network

operating speed is detected.

●The yellow LED in the connector blinks when there is TX or RX activity. This LED is

driven on continuously when the Link test detects a good link condition.

●The yellow LED (D4) is driven on continuously when a full duplex configuration is

detected. This LED blinks at a 20 Hz frequency when a collision status is detected in

the half duplex configuration.

●The yellow LED (D3) blinks at a 10 Hz frequency when ongoing receiving or

transmitting is detected.

●The yellow LED (D2) is driven on continuously when 10 Mb/s network operating speed

is detected.

6.4 USB 2.0 subsystem

6.4.1 Host ports

The board has two host ports (J2) that are fully compliant with the USB 2.0 specification

(two controllers with one port each). This means that the two hosts can work in concurrent

mode with the maximum possible bandwidth. Each host has also full control of the VBUS

supplied by the ST2052 power switch that also provides overcurrent protection in case of a

short circuit in the USB cable.

6.4.2 Device port

A USB 2.0 device port is also provided (J1).

6.5 Debug interface

Two debug interfaces are provided:

1. The JTAG interface can be used for "static" debug. This means that it is possible to set

a breakpoint and, when the system stops, to verify the contents of the memory and/or

registers and modify them if needed.

2. The ETM9 interface can be used for "dynamic" debug. The ETM9 block embedded in

the SPEAr300 chip, sends all the information about the AHB transactions during the

code execution to the external trace box and the external box stores this information in

a local buffer. This makes it possible, by stopping the CPU activity, to analyze the actual

program flow. For example, if a particular data abort occurs, you can set a breakpoint

on the data abort location and then, when the breakpoint is reached, you can analyze

the buffer trace. With this information, it becomes a simple task to identify the event that

produced the problem.

The following configurations can be selected by setting SW2 bits [2:1].

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