User's Guide
SMB10-SN03-P22A
SMB10
Garonne
Phase/Frequency Discriminator
3.2.2 Signal Ground
A clean signal ground
GND
is provided as a reference for measurements purpose.
Do not connect this pin
to a ground signal
, use a dierential sense circuit.
3.2.3 Lock-Detect Output
This active-low digital output can be used as a feedback signal in a lock-acquisition procedure. The
/LOCKED
signal goes low when an "in-lock" condition is approached,
i.e.
if the time delay between
the rising edges of the inputs of the PFD circuit remains within
80 ps
. These events are averaged through
a smoothing lter before the buer stage. To allow the
/LOCKED
output to be asserted, the in-lock
condition has to be maintained during
300 ns
at least.
3.2.4 Acquire/Track Output
This output can be used as a feedback signal in a lock-acquisition procedure. It is a copy of the
Lock-Detect
Output
signal. The
Acquire/Track
output signal goes low when a lock condition is approached,
i.e.
if
the time delay between the rising edges of the inputs of the PFD circuit remains within
80 ps
. These events
are averaged through a smoothing lter before the buer stage.
A typical lock-acaquisition procedure is described : until the digital
Acquire/Track
output remains
high, the controller operates in phase acquisition mode and a search pattern is applied to the slave laser's
frequency. This mode of operation is switched to the tracking mode when the signal goes low : here, the
controller's loop-gain is maximal to maintain lock and track the master's phase changes. To allow the
Acquire/Track
output to be asserted, the in-lock condition has to be maintained during
300 ns
at least.
[Note]
The
Acquire/Track Output
signal is directly routed to the SMA91 Autolock Controller module
through the DIO stack-through connector. To connect this signal to the Autolock Controller module, the
jumper JMP1 must be soldered. Refer to the SMA91 Autolock Controller's documentation for more details.
3.2.5 Prescaler Control Inputs
The divide ratio
N
of the prescaler is set by 3 digital inputs
/PDR0
,
/PDR1
and
/PDR2
. The 3-bit
control word depends on the integrated circuit used for the prescaler as indicated in Tables 1 and 2.
The
Prescaler Local Settings
switches must be o to allow digital control using the lines of the DIO bus
.
PDR0 PDR1 PDR2 N
low high high 8
low high low 4
low low low 2
Table 1:
MC12093-Prescaler control using the digital inputs.
PDR0 PDR1 PDR2 N
high high high 80
high high low 40
high low low 20
low low low 10
Table 2:
MC12080-Prescaler control using the digital inputs.
SISYPH
Signals & Systems for Physics
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