NXP Semiconductors CLRC663 Manual de usuario
AN11022
CLRC663 evaluation board quick start guide
Rev. 1.6 — 17 May 2023 Application note
Document Information
Information Content
Keywords CLRC663, CLRC663 plus, CLEV6630A, CLEV6630B, CLRC663 evaluation board, CLRC663
customer board, CLRC663 GUI, GUI, CLRC663 Support Tool, NFC Cockpit
Abstract This document describes the CLEV6630A and CLEV6630B (CLRC663 evaluation board), and
how to use it. It describes the NFC Cockpit (Version 3.6), which allows an easy basic access to
the CLRC663 registers and EEPROM in combination with basic reader functionality.
NXP Semiconductors AN11022
CLRC663 evaluation board quick start guide
Revision history
Rev Date Description
1.6 20230517 Update to latest NFC Reader Library and MCUXpresso IDE
Section 7 "Radio Equipment Directive (RED)" added
1.5 20180528 Including CLEV6630A
1.4 20170515 MCUXpresso IDE installation and usage chapter added
Software example descriptions added
1.3 20170503 Update with new CLEV6630B V2.0 and NFC Cockpit
1.2 20150114 RC663 Schematic updated
1.1 20120712 Some Figures updated because of quality reasons, Section Licenses updated
1.0 20120216 Initial release
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NXP Semiconductors AN11022
CLRC663 evaluation board quick start guide
1 Introduction
This document describes the CLEV6630A and CLEV6630B (CLRC663 evaluation board), which provides an
easy evaluation of the features and functions of the CLRC663 and CLRC663 plus families.
It provides the first steps to operate the board, using the NFC Cockpit (Version 3.6 or higher).
The default antenna is a 65 mm x 65 mm antenna with some metal layer inside the antenna area. This antenna
is not an optimum antenna as such, but intends to demonstrate the performance and register settings of the
CLRC663 under typical design constraints like LCD or some metal (e.g. PCB) inside the antenna area.
In this document the term „MIFARE Classic card“ refers to a MIFARE Classic IC-based contactless card, the
term „MIFARE DESFire card“ refers to a MIFARE DESFire IC-based contactless card.
1.1 CLRC663 registers and EEPROM concept
The CLRC663 uses internal registers to adapt and optimize the functionality and performance for each of the
supported protocols and data rates dependent on the connected antenna, matching network and receiver path.
It offers an EEPROM, which contains the default settings for all the supported protocols (locked). These settings
are loaded into the registers with the LoadProtocol command for each supported protocol and data rate.
The default EEPROM configuration settings are optimized for the generic use, based on the 65mmx65mm
antenna of the board CLEV6630A / CLEV6630B, and cannot be updated by the user as such. Individual
settings must be overwritten by the host µC after the LoadProtocol.
Alternatively, customized settings can be used for the major relevant registers in an extra EEPROM area. Then
the command LoadReg must be used to copy the customized EEPROM content into the registers.
Some of these settings can or even must be adapted towards a new antenna design (e.g. the RX settings).
Some EEPROM configuration data is independent from the used protocols and defines e.g. the startup behavior
of the CLRC663 or the functionality of LowPower Card detection and requires attention as well for optimum
performance of the chip.
1.2 CLEV6630A / CLEV6630B concept
The basic concept of the CLEV6630A / CLEV6630B is to enable the user to perform a quick evaluation of
the CLRC663, and also connect their own antenna to the CLRC663 board. In addition, dedicated boards which
allow to solder custom matching components are available. The NFC Cockpit can be used to optimize the
CLRC663 antenna tuning, to perform the related TX and RX optimization without touching any source code.
All the relevant CLRC663 registers can be modified and fine-tuned using the NFC Cockpit. For the most
relevant registers, the customized settings can typically be stored in the CLRC663 EEPROM.
The NFC Cockpit also allows a dump of the complete user EEPROM content into an XML file. This file then
can be loaded again into the EEPROM. That allows to manage and exchange different user or antenna
configurations. In addition, the register settings found to work well using the NFC Cockpit, can be used during
user code development as well.
As soon as the register settings for the targeted protocols and data rates are defined, the NFC Reader Library
including the HAL can be used to start the development of the user application. Examples illustrate the usage of
the library for typical use cases.
The source code examples of the NFC Reader Library can be used to develop an own application directly
on the LPC1769 (see Figure 3), or can serve as a starting point for porting the NFC Library to any other
microcontroller platform.
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NXP Semiconductors AN11022
CLRC663 evaluation board quick start guide
2 Hardware
The CLEV6630, as shown in Figure 1 and Figure 2, provides many test functions which might not be used for
the typical hardware and software evaluation. It can be used as a simple standard reader without modification, it
can be used to define and optimize the analog settings for any connected antenna or it can be used to develop
and modify any RFID and NFC application based on the NFC Reader Library.
The CLEV6630A and CLEV6630B share the same hardware, except these differences:
1. CLEV6630A uses the CLRC66302, while CLEV6630B uses the CLRC66303.
2. The CLEV6630A PCB color is red, while the CLEV6630V is blue.
3. The antenna tuning is slightly different (see 2.2.3).
2.1 Hardware introduction
The CLRC663 is supplied with a supply voltage, which can be chosen between: internal and external supply.
For the internal supply either 5 V or 3.3 V can be used. The external power supply can be an AC or DC supply
(polarity does not matter) with at least 7.5 V, since the board provides a rectifier and LDO to supply the circuit
with 5 V and 3.3 V.
The CLRC663 is connected to an NXP LPC1769 µC via SPI. A specific firmware on the LPC1769 allows to use
the CLEV6630A / CLEV6630B together with the NFC Cockpit.
The connection to the PC is done via USB: USB micro connectors are supported. The use of the shielded USB
cable is required to meet the FCC/CE specifications.
Another connection option allows to connect an LPC-LINK2 board the CLEV6630A / CLEV6630B with a debug
cable. This allows the development of custom software or the execution of the NFC Reader Library code
including samples.
In case a different host microcontroller shall be used, the SPI interface is available for connection to an external
host (the on board LPC1769 is not used in this case).
Figure 1. CLEV6630B Customer evaluation board
Note: The CLEV6630A looks identical, but with a red PCB.
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NXP Semiconductors AN11022
CLRC663 evaluation board quick start guide
Figure 2. CLEV6630B top view
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NXP Semiconductors AN11022
CLRC663 evaluation board quick start guide
2.2 Schematics
The complete schematics of the CLRC663 evaluation board are shown in the Figure 3, Figure 4, Figure 5,
Figure 7, and Figure 8.
2.2.1 LPC1769
The CLEV6630A / CLEV6630B contains an NXP LPC1769 (see Figure 3).
An LPC Linker can be connected to the LPC1769 via the JTAG interface (see Figure 4).
Figure 3. LPC1769
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CLRC663 evaluation board quick start guide
Figure 4. JTAG interface and serial EEPROM
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CLRC663 evaluation board quick start guide
2.2.2 Power supply
The default settings use the power supply from the USB connector. For the maximum performance and a better
test capability, the external power supply should be connected. The AC or DC power input can cover any power
supply providing an AC or DC voltage between 7.5 and 12 V.
Following figure shows the USB supply, external supply and and LPC1769 supply.
Figure 5. Power supply
As soon as the board is supplied with power, the red LED LD100 must be on.
The CLRC663 evaluation board provides two LDOs, one for 5 V and one for 3.3 V. 5 V LDO is only be used, if
the external power supply is connected and used (J101 default). Using USB power might not give the best RF
performance, since the USB voltage level might not be stable 5 V.
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Application note Rev. 1.6 — 17 May 2023
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NXP Semiconductors AN11022
CLRC663 evaluation board quick start guide
Figure 6. CLEV6630A / CLEV6630B jumpers
Three jumpers can be used to evaluate the different power supply options:
•J101: either external or USB power supply (default)
•J303: either VBAT = 5 V or 3.3 V (default)
•J300: closed (default) or to measure the ITVDD (bridge with an ampere meter) or to supply the CLRC663
(center pin of J300) with external TVDD from external DC power supply
Note: The best RF performance can be achieved with external power supply.
2.2.3 CLRC663
The clock is based on a 27.12 MHz crystal.
During the antenna tuning and overall hardware design typically the ITVDD must be checked. This can be done
with the JP300 (“TVDD”), either using an external power supply or just using an ampere meter instead of the
jumper.
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Application note Rev. 1.6 — 17 May 2023
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NXP Semiconductors AN11022
CLRC663 evaluation board quick start guide
The relevant test signals can be derived from the digital test pins at the bottom of the board and the two analog
test pins AUX1 and AUX2.
Figure 7. CLEV6630A / CLEV6630B CLRC663
The antenna connection uses the standard tuning circuit. The EMC filter is designed with a cut-off frequency of
fEMC ≈ 21 MHz, and the antenna impedance is tuned to Z ≈ 20 Ω.
Figure 8. CLEV6630B antenna circuit
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Application note Rev. 1.6 — 17 May 2023
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