NXP Semiconductors PN544 Guía

AN145715

PN544 Antenna Design Guide

Rev. 1.5 — 28th August 2009 Application Note

Document information

Info Content

Keywords NFC, PN544, Antenna Design, RF Design

Abstract This application notes provides guidance on antenna and RF design for

NFC device PN544.

NXP Semiconductors AN145715

PN544 Antenna Design Guide

Application Note Rev. 1.5 — 28th August 2009 2 of 43

Contact information

For additional information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: [email protected]

Revision history

Rev Date Description

1.0 18/02/2008 Initial Release

1.1 14/05/2008 Updates on demo board antenna default matching

1.2 27/02/2009 Update on antenna topology

1.3 12/03/2009 Minor Updates

1.4 30/06/2009 Appendix B added

1.5 28/08/2009 URX max changed to 1.7V

NXP Semiconductors AN145715

PN544 Antenna Design Guide

Application Note Rev. 1.5 — 28th August 2009 3 of 43

1. 0Introduction

1.1 11B11BPurpose and scope

This application draft is intended to give a practical guide to estimate and tune antenna

components for the PN544 antenna topology. The PN544 is capable of performing

Reader/Writer (R/W) as well as target mode functionalities. This guide is not primarily

based on a strong mathematical background but on a practical approach towards PN544

antenna tuning. Therefore it is recommended to read and use this document as

described in the chapter 50H50H49H3 “Tuning Procedure”.

To get hands-on experience it is recommended to use an antenna which has

approximately the same outlines as the one used throughout this document.

This document will be adapted for upcoming versions and may contain a modification of

the following topology or even contain further antenna topologies.

NXP Semiconductors AN145715

PN544 Antenna Design Guide

Application Note Rev. 1.5 — 28th August 2009 4 of 43

2. 1B1BPN544 Topology

The PN544 topology is outlined in 51H51H50HFig 1. It can be seen that only one antenna (Zant) is

used for Reader/Writer-and Card mode. The number of turns for this antenna topology

using the PN544 demo board is six.

57B56B57B56B

Fig. 1 PN544 antenna topology

The following component tolerances (maximum values) are required for an appropriate

tuning:

Component Maximum tolerance Component Maximum tolerance

L0 5% RQ5%

C0 5% Rx 5%

C1 2% R2 5%

C2a 2% CRX 5%

C2b 2% CVMID 5%

The antenna size used throughout this document is 3 cm x 5 cm. Refer also to 52H52H51HTable 1

for more details. 53H53H52HFig 2 shows the PCB-schematic of the antenna which is used in this

CRX

NXP Semiconductors AN145715

PN544 Antenna Design Guide

Application Note Rev. 1.5 — 28th August 2009 5 of 43

document. The MatchTX1 and MatchTX2 points are connected to the damping resistors

Rqas well as to the capacitors C2b for the ANT1 and ANT2 pins (see also 54H54H53HFig 1).

For the sake of simplicity 55H55H54HFig 2 is a sketch of a possible PN544 demo board

antenna.

Connections MatchTX1, MatchTX2 and ANT1, ANT2 on the provided NXP PN544

demo board are routed differently.

This has no impact on the tuning procedure described.

Fig. 2 6-turn demo board antenna sketch

Antenna outlines

Physical outlines of the antenna board are shown here

description value dimensions

size 3 x 5 cm

# turns R/W 6

Copper width 0.05 cm

Spacing 0.05 cm

Copper height 35 μm

NXP Semiconductors AN145715

PN544 Antenna Design Guide

Application Note Rev. 1.5 — 28th August 2009 6 of 43

3. 2B2BTuning Procedure

Please follow the steps below for tuning the antenna. The antenna is matched without

powering the PN544 IC. A detailed description of each step will follow after this chapter.

Step 1: At first the antenna has to be matched to the PN544 as described in

chapter 56H56H55H4. In this phase C2b is not assembled.

Outcome: Basic tuning with resonance frequency of 13.56MHz at 80Ohm

PN544

TX2

TX1

TVSS

VMID

CRX

CVMID

C0C2

EMC

Filter

Matching

Circuit

Antenna

13.56MHz at

approximately

80Ohm

Matching circuitry and smith chart of antenna in step 1

Step 2: After tuning the antenna, C2b needs to be assembled to connect to ANT1 and

ANT2 pins. The C2 value is therefore split-up. This means if C2 is calculated and

assembled with 47pF in Step 1, then this values is split up into 20pF for C2a and 27pF

for C2b (see chapter 56H6B6BStep 4 – Card mode tuning).

Outcome: C2 splits into C2a and C2b. (By assembling C2b, the matching circuit

is now configured for card mode)

Note: The resonance frequency of the card mode is measured contactless as

described in 57HAppendix B

Block diagram with ANT1 and ANT2 connected

CRX

NXP Semiconductors AN145715

PN544 Antenna Design Guide

Application Note Rev. 1.5 — 28th August 2009 7 of 43

Step 3: This step includes the validation of the Reader/Writer matching, which is

simulated by shortening the two C2b capacitors with a 10 Ohm resistor. An

asymmetric impedance curve with Rmatch=80Ohm at 13.56Mhz shall be seen on the

network analyzer. Further details on fine-tuning can be found in chapter 57H57H6.

Outcome: Asymmetric Reader/Writer tuning at 13.56MHz with Rmatch=80Ohm

Smith chart of the asymmetric Reader/Writer tuning

Step 4: By removing the 10Ohm resistor, the matching circuit is configured for card

mode. The PN544 has to be powered and configured as card. The resonance

frequency should be in the range of 14.5 to 16Mhz. Further details on tuning can be

found in chapter 58H58H58H7.

Outcome: Card tuning in between 14.5MHz to 16MHz measured with impedance

analyzer.

Attention

Step 3 and Step 4 may be repeated to find a good compromise between

Reader/Writer and card mode tuning. The target of the tuning is to find component

values such that in

•Reader/Writer mode -> Rmatch=80Ohm at 13.56Mhz

•Card mode -> fres =14.5 – 16 MHz

NXP Semiconductors AN145715

PN544 Antenna Design Guide

Application Note Rev. 1.5 — 28th August 2009 8 of 43

4. 3B3BStep 1 – Antenna Matching

The RF block diagram shows the circuitry design with all relevant components required

to connect an antenna to the PN544. It also ensures the transmission of energy and data

to the target device as well as the reception of a target device answer.

Fig. 3 Block diagram of the complete RF part

59H59H59HFig 6 shows only the RF part. For a proper operation the supplies and the host interface

have to be connected

The EMC filter reduces 13.56MHz harmonics and performs an impedance

transformation.

The Matching Circuit acts as an impedance transformation block and joins the antenna

to the EMC-filter.

The Antenna coil itself generates the magnetic field.

The RX path provides the signal to the PN544 internal receiving stage.

R2 R

NXP Semiconductors AN145715

PN544 Antenna Design Guide

Application Note Rev. 1.5 — 28th August 2009 9 of 43

4.1 12B12BEquivalent circuit

The following subchapters describe the matching procedure. It starts with the

determination of the antenna parameters and ends with a fine tuning of the antenna

circuitry.

4.1.1 26B26BDetermination of series equivalent circuit

The antenna loop has to be connected to an impedance or network analyzer to measure

the series equivalent components.

The equivalent circuit (see 60H60H60HFig 7) must be determined under final environmental

conditions especially if the antenna will be operated in metal environment or a

ferrite will be used for shielding.

Antenna

Fig. 4 Series equivalent circuit

Typical values:

La= 0.3...3µH

Ca= 3...30pF

Ra= 0.3...8Ω

fra = self-resonance frequency of the antenna

The antenna capacitance Cacan be calculated with:

()

ara

aLf

⋅⋅

The antenna parasitic capacitance Ca should be kept low to achieve a self-resonance

frequency > 35 MHz.

4.1.2 27B27BCalculation of damping resistor RQ

The quality factor of the antenna is calculated with

aRL

Q⋅

(1)

NXP Semiconductors AN145715

PN544 Antenna Design Guide

Application Note Rev. 1.5 — 28th August 2009 10 of 43

If the calculated value of Qais higher than the target value of 35, an external damping

resistor RQhas to be inserted on each antenna side to reduce the Q-factor to a value of

35 (±10%).

The value of RQ(each side of the antenna) is calculated by

⎟

⎠

⎞

⎜

⎝

⎛−

⋅

⋅= a

R35

5.0

4.1.3 28B28BDetermination of parallel equivalent circuit

The parallel equivalent circuit of the antenna together with the added external

damping resistor RQhas to be measured. The quality factor should be checked again to

be sure to achieve the required value of Q=35.

The equivalent circuit (61H61H61HFig 8) must be determined under final environmental conditions

especially if the antenna will be operated in metal environment or a ferrite will be

used for shielding.

Antenna

Rpa Lpa

Cpa

Fig. 5 Parallel equivalent circuit

The following formula applies

apa

RR L

⋅+

⋅

2)(

4.2 13B13BEMC filter design

The EMC filter circuit for the PN544 fulfills two functions: the filtering of the signal and

impedance transformation block. The main properties of the impedance transformation

are:

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