Motorola MC68838 Manual de usuario
© MOTOROLA INC., 1992
MC68838
Media Access Controller
User’s Manual
Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design.
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© MOTOROLA INC., 1992
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MOTOROLA MC68838 USER’S MANUAL iii
TABLE OF CONTENTS
Paragraph Page
Number Title Number
Section 1
Introduction
1.1 Overview...........................................................................................................1-2
1.2 Chip Features..................................................................................................1-2
Section 2
Functional Description
2.1 Node Processor Interface Logic...................................................................2-1
2.2 Receive Data Path..........................................................................................2-1
2.2.1 Receive Latch..............................................................................................2-2
2.2.2 Receive CRC Checker...............................................................................2-3
2.2.3 Sent Count...................................................................................................2-3
2.2.4 Counters.......................................................................................................2-3
2.2.5 Receive Finite State Machine...................................................................2-3
2.2.6 Address Comparator..................................................................................2-4
2.2.7 Receive Host Interface...............................................................................2-4
2.3 Transmit Data Path.........................................................................................2-4
2.3.1 Transmit Data Host lnterface....................................................................2-5
2.3.2 Send Frame Logic......................................................................................2-5
2.3.3 Capture Token Logic..................................................................................2-5
2.3.4 Transmit CRC Generator...........................................................................2-6
2.3.5 Transmit Finite State Machine..................................................................2-6
2.3.6 Timers...........................................................................................................2-6
2.3.7 Transmit Data Latch (and Repeat Function)..........................................2-7
2.4 Test and Clock Logic......................................................................................2-7
Section 3
Register Description
3.1 Register Types.................................................................................................3-3
3.1.1 Read/Write Registers..................................................................................3-3
3.1.2 Read/Control Write Registers...................................................................3-3
3.1.3 Read-Only/Clear Registers.......................................................................3-3
3.1.4 Read-Only Registers..................................................................................3-3
3.2 Control and Status Registers........................................................................3-4
3.2.1 Control Register A (MAC_CNTRL_A).....................................................3-4
3.2.2 Control Register B (MAC_CNTRL_B).....................................................3-8
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TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
3.2.3 Receive Status Register (RX_STATUS).................................................3-13
3.2.4 Transmit Status Register (TX_STATUS)................................................3-15
3.3 Interrupt Registers...........................................................................................3-17
3.3.1 Interrupt Event Register A (INTR_EVENT_A)........................................3-17
3.3.2 Interrupt Event Register B (INTR_EVENT_B)........................................3-20
3.3.3 Interrupt Event Register C (INTR_EVENT_C)........................................3-23
3.3.4 Interrupt Mask Register A (INTR_MASK_A)...........................................3-23
3.3.5 Interrupt Mask Register B (INTR_MASK_B)...........................................3-23
3.3.6 Interrupt Mask Register C (INTR_MASK_C)..........................................3-23
3.4 Counter Registers...........................................................................................3-24
3.4.1 Frame Count Register (FRAME_CT).......................................................3-25
3.4.2 Lost Count, Error Count Register (LOST_CTERROR_CT) .................3-25
3.4.3 Token Count Register (TOKEN_CT).......................................................3-25
3.5 Station Parameter Registers.........................................................................3-25
3.5.1 My Short Address Register (MSA)...........................................................3-25
3.5.2 My Long Address Register (MLA_A, MLA_B, MLA_C)........................3-26
3.5.3 Target Request Time Register (T_REQ).................................................3-26
3.5.4 TVX, TRT Initial Timer Parameter Register (TVX_VALUE, T_MAX)..3-26
3.6 Protocol Timing Registers.............................................................................3-27
3.6.1 TVX Timer Register (TVX_TIMER)...........................................................3-27
3.6.2 TRT Timer Register (TRT_TIMER_A, TRT_TIMER_B)..........................3-27
3.6.3 THT Timer, Sent Count Registers (THT_TIMER_A,
THT_TIMER_B, SENT_COUNT)..............................................................3-28
3.6.4 TRT Time Remaining Register (T_NEG_A, T_NEG_B).......................3-29
3.6.5 Information Field Register (INFO_REG_A).............................................3-29
3.6.6 Void Time Counter Register (VOID_TIME).............................................3-29
3.7 Internal Registers............................................................................................3-30
3.7.1 Revision Number Register (REV_NO_REG)..........................................3-30
3.7.2 Packet Request Register (PKT_REQUEST)..........................................3-30
3.7.3 Built-In Self-Test Signature Register (BIST_SIGNATURE)................3-31
3.7.4 Receive CRC Register (RX_CRC)...........................................................3-32
3.7.5 Transmit CRC Registers (TX_CRC).........................................................3-32
Section 4
Signal Description
4.1 Clock Signals..................................................................................................4-1
4.2 Node Processor Interface..............................................................................4-2
4.3 MAC-PHY Interface........................................................................................4-3
4.4 Receive System Interface..............................................................................4-3
4.5 Transmit System Interface.............................................................................4-4
4.6 CAM Interface..................................................................................................4-5
4.7 Test Signals.....................................................................................................4-6
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MOTOROLA MC68838 USER’S MANUAL v
TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
Section 5
Bus Operation
5.1 NPI Operation..................................................................................................5-1
5.2 Read Cycle.......................................................................................................5-1
5.3 Write Cycle.......................................................................................................5-3
Section 6
MAC-PHY Interface Operation
Section 7
Receive Data Path Operation
7.1 Receive Data Processing..............................................................................7-1
7.2 Receive Data System Interface....................................................................7-1
7.3 Receive Data Path Operation.......................................................................7-1
Section 8
Transmit Data Path Operation
8.1 Transmit Data Path Control...........................................................................8-1
8.2 MAC Packet Transmission............................................................................8-3
8.3 Packet Request Header.................................................................................8-4
Section 9
CAM Interface Operation
9.1 CAM Interface Operation...............................................................................9-1
9.1.1 Normal (Nonextended) Match Mode.......................................................9-1
9.1.2 Extended Match Mode...............................................................................9-2
9.2 Extensions to A and C Bit Handling............................................................9-4
Section 10
Test Operation
10.1 Built-In Self-Test Operation.........................................................................10-1
10.2 Scan Path Operation....................................................................................10-2
Section 11
Electrical Characteristics
11.1 Maximum Ratings.........................................................................................11-1
11.2 Recommended Operating Conditions......................................................11-1
11.3 Thermal Characteristics...............................................................................11-1
11.4 Electrical Characteristics.............................................................................11-2
11.5 Node Processor Interface Timing..............................................................11-2
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vi MC68838 USER’S MANUAL MOTOROLA
TABLE OF CONTENTS (Concluded)
Paragraph Page
Number Title Number
11.6 MAC-FSI Timing............................................................................................11-4
11.7 MAC-ELM Timing..........................................................................................11-5
11.8 CAM Interface Timing...................................................................................11-6
Section 12
Ordering Information and Mechanical Data
12.1 Ordering Information....................................................................................12-1
12.2 Pin Assignments...........................................................................................12-2
12.2.1 120-Lead Ceramic Pin Grid Array w/Ceramic Lid (KB).....................12-2
12.2.2 120-Lead Plastic Quad Gull Wing (FC)................................................12-3
12.3 Package Dimensions...................................................................................12-4
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MOTOROLA MC68838 USER’S MANUAL vii
LIST OF ILLUSTRATIONS
Figure Page
Number Title Number
1-1 Motorola FDDI Architecture.....................................................................................1-1
2-1 MAC Block Diagram.................................................................................................2-2
4-1 MAC Functional Pinout............................................................................................4-1
5-1 Node Processor Bus Read Cycles........................................................................5-2
5-2 Node Processor Bus Write Cycles.........................................................................5-3
7-1 Receive Data Flowchart...........................................................................................7-4
8-1 TXRDY and Packet Request Header Timing.......................................................8-2
9-1 CAM Interface Signals (EXT_DA_MATCH = 0)..................................................9-2
9-2 CAM Interface Signals (EXT_DA_MATCH = 1)..................................................9-3
9-3 CAM Interface Timing (Receiving Token Frame for Normal and
Extended Match Mode)........................................................................................9-3
11-1 Node Processor Interface Timing........................................................................11-3
11-2 MAC-FSI Timing......................................................................................................11-4
11-3 MAC-ELM Timing....................................................................................................11-5
11-4 CAM Interface Timing.............................................................................................11-6
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viii MC68838 USER’S MANUAL MOTOROLA
LIST OF TABLES
Table Page
Number Title Number
3-1 MAC Registers...........................................................................................................3-2
6-1 RCDATx/TXDATx Encoding....................................................................................6-1
7-1 RCCTLx and RPATHx Relationship......................................................................7-3
9-1 MAC A and C Bit Control.........................................................................................9-4
10-1 BIST Register Values.............................................................................................10-2
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MOTOROLA MC68838 USER’S MANUAL ix
LIST OF ACRONYMS
ANSI—American National Standard Institute
ATE—Automatic Test Equipment
BIST—Built-In Self-Test
CAM—Content Addressable Memory
CMOS—Complementary Metal-Oxide Semiconductor
CRC—Cyclic Redundancy Check
CT—Count, Actions for MAC FSM
DA—Destination Address
ELM—Elasticity Buffer and Link Management Device
FC—Frame Control Field of FDDI Frame
FCG—FDDI Clock Generator
FCS Field—32-Bit CRC Appended to Transmitted Frames
FCS—Frame Check Sequence
FDDI—Fiber Distributed Data Interface
FDX—Full Duplex
FS—Frame Status
FSI—FDDI System Interface
FSM—Finite State Machine
INFO—Information Field
LAN—Local Area Network
LFSR—Linear Feedback Shift Register
LLC—Logical Link Control
MAC—Media Access Controller
MUX—Multiplex
NP—Node Processor
NPA—Node Processor Address Bus
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xMC68838 USER’S MANUAL MOTOROLA
LIST OF ACRONYMS (Continued)
NPD—Node Processor Data Bus
NPI—Node Processor Interface
NSA—Next Station Address
PHY—Physical Layer of FDDI Standard
SA—Source Address
SMT—Station Management
TRT—Token Rotation Time
TTL—Transistor-Transistor Logic
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