MiTAC MSC-1610 Manual de usuario

1

MSC-1610

Socket 370

w/VGA w/Dual LAN w/Audio

PCI Half-Size CPU Card

User’s Manual

MiTAC INC.

No.2, Chung-Hsiao street, Chidu, Keelung , Taiwan.

Tel: 886-2-2456-2255

Fax : 886-2-2456-9595

Part Number: : 5611M1610879 R1.1

2

Copyright Notice

This publication is protected by copyright and all rights are

reserved. No part or whole of it may be reproduced or

transmitted in any form or by any means, electronic or

mechanical, including photocopying and recording without prior

consent of MiTAC INC.

The information in this document has been carefully checked

and is believed to be accurate. However, MiTAC INC.. assumes

no responsibility for any errors that may appear in this document.

The material contained herein is for informational purposes only.

The information contained in this document is subject to change

without any notices.

Acknowledgments

Award is a registered trademark of Award Software International,

Inc.

IBM, PC/AT, PS/2 and OS/2 are trademarks of International

Business Machines Corporation.

Intel, Pentium and Pentium/MMX are registered trademarks of

Intel Corporation.

Windows 95/98/ Me/ 2002/ XP and Windows NT are registered

trademarks of Microsoft Corporation.

All other product names or trademarks are properties of their

respective owners.

Contents

3

About This Manual

This manual provides information on the MSC-1610 single board

computer.

Chapter 1 provides general information, system assignment

tables, features and specifications of MSC-1610.

Chapter 2 contains dimensional drawings, jumper setting

information and connector pin assignments.

Chapter 3 describes component installations, device driver

installations, watchdog timer installation, and DiskOn Chip

installations.

Chapter 4 describes AWARD BIOS setup information, BIOS

POST code and how to update BIOS.

Contents

4

Contents

CHAPTER 1: INTRODUCTION............................................... 1

1.1 CHECK LIST ........................................................................................... 1

1.2 FEATURES .............................................................................................. 1

1.3 SPECIFICATIONS ..................................................................................... 4

1.4 SYSTEM ASSIGNMENTS .......................................................................... 3

1

1.

.4

4.

.1

1

I

I/

/O

O

P

Po

or

rt

t

A

Ad

dd

dr

re

es

ss

s

M

Ma

ap

p.

..

.3

3

1

1.

.4

4.

.2

2

D

DM

MA

A

C

Ch

ha

an

nn

ne

el

l

A

As

ss

si

ig

gn

nm

me

en

nt

ts

s.

..

.4

4

1

1.

.4

4.

.3

3

I

In

nt

te

er

rr

ru

up

pt

t

A

As

ss

si

ig

gn

nm

me

en

nt

ts

s.

..

.4

4

1

1.

.4

4.

.4

4

M

Me

em

mo

or

ry

y

A

Ad

dd

dr

re

es

ss

s

M

Ma

ap

p.

..

.5

5

1

1.

.4

4.

.5

5

S

Sy

ys

st

te

em

m

T

Ti

im

me

er

r

M

Ma

ap

p.

..

.5

5

CHAPTER 2: HARDWARE CONFIGURATION ................... 6

2.1 COMPONENTS LOCATION .................................................................... 6

2.2 JUMPERS ................................................................................................ 7

2

2.

.2

2.

.1

1

C

CP

PU

U

B

Ba

as

se

e

S

Sp

pe

ee

ed

d

S

Se

el

le

ec

ct

t

(

(J

JP

P1

11

1,

,

J

JP

P1

12

2)

).

..

.8

8

2

2.

.2

2.

.2

2

P

Po

ow

we

er

r

S

So

ou

ur

rc

ce

e

(

(J

JP

P1

1,

,

J

J4

4,

,

J

J1

1)

).

..

.8

8

2

2.

.2

2.

.3

3C

CO

OM

M2

2

M

Mo

od

de

e

S

Se

el

le

ec

ct

t

(

(J

JP

P2

2)

).

..

.8

8

2

2.

.2

2.

.4

4

V

VG

GA

A

E

En

na

ab

bl

le

e

/

D

Di

is

sa

ab

bl

le

e

(

(J

JP

P1

10

0)

).

..

.8

8

2

2.

.2

2.

.5

5

L

LC

CD

D

V

Vo

ol

lt

ta

ag

ge

e

S

Se

el

le

ec

ct

ti

io

on

n

(

(J

JP

P5

5)

).

..

.8

8

2

2.

.2

2.

.6

6

D

Di

is

sk

k

O

On

n

C

Ch

hi

ip

p

(

(M

M-

-S

Sy

ys

st

te

em

m)

)

A

Ad

dd

dr

re

es

ss

s

S

Se

el

le

ec

ct

t

(

(J

JP

P9

9)

).

..

.9

9

2

2.

.2

2.

.7

7

W

Wa

at

tc

ch

h

D

Do

og

g

T

Ti

im

me

er

r

(

(J

JP

P8

8)

).

..

.9

9

2

2.

.2

2.

.8

8

R

RT

TC

C

CM

MO

OS

S

C

Cl

le

ea

ar

r

(

(J

JP

P1

10

0)

).

..

.9

9

2

2.

.2

2.

.9

9

E

ET

TH

HE

ER

RN

NE

ET

T

P

Po

or

rt

t

1

E

En

na

ab

bl

le

e

/

D

Di

is

sa

ab

bl

le

e

(

(J

JP

P4

4)

).

..

.9

9

2

2.

.2

2.

.1

10

0

E

ET

TH

HE

ER

RN

NE

ET

T

P

Po

or

rt

t

2

2E

En

na

ab

bl

le

e

/

D

Di

is

sa

ab

bl

le

e

(

(J

JP

P7

7)

).

..

.9

9

2.3 CONNECTORS....................................................................................... 10

2

2.

.3

3.

.1

1

S

St

ta

an

nd

db

by

y

P

Po

ow

we

er

r

C

Co

on

nn

ne

ec

ct

to

or

r

(

(J

J1

1)

).

..

.1

12

2

2.

.3

3.

.2

2

F

Fr

ro

on

nt

t

P

Pa

an

ne

el

l

C

Co

on

nn

ne

ec

ct

to

or

r

(

(J

J4

4)

).

..

.1

12

2

2.

.3

3.

.3

3

E

Ex

xt

te

er

rn

na

al

l

K

Ke

ey

yb

bo

oa

ar

rd

d

C

Co

on

nn

ne

ec

ct

to

or

r

(

(J

J2

2)

).

..

.1

12

2

2.

.3

3.

.4

4

U

US

SB

B

P

Po

or

rt

t

1

c

co

on

nn

ne

ec

ct

to

or

r

(

(U

US

SB

B1

1)

).

..

.1

12

2

2.

.3

3.

.5

5

I

In

nf

fr

ra

ar

re

ed

d

C

Co

on

nn

ne

ec

ct

to

or

r

(

(I

IR

R)

).

..

.1

12

2

2.

.3

3.

.6

6

E

Ex

xt

te

er

rn

na

al

l

P

Po

ow

we

er

r

C

Co

on

nn

ne

ec

ct

to

or

r

(

(P

P1

1)

).

..

.1

13

3

2

2.

.3

3.

.7

7

P

PS

S2

2

K

Ke

ey

yb

bo

oa

ar

rd

d

/

M

Mo

ou

us

se

e

C

Co

on

nn

ne

ec

ct

to

or

r

(

(K

KB

BM

MS

S)

).

..

.1

13

3

2

2.

.3

3.

.8

8

V

VG

GA

A

C

CR

RT

T

C

Co

on

nn

ne

ec

ct

to

or

r

(

(V

VG

GA

A)

).

..

.1

13

3

2

2.

.3

3.

.9

9

L

LC

CD

D

C

Co

on

nn

ne

ec

ct

to

or

r

(

(L

LC

CD

D)

).

..

.1

14

4

2

2.

.3

3.

.1

10

0

H

HD

DD

D

(

(I

ID

DE

E)

)

C

Co

on

nn

ne

ec

ct

to

or

rs

s

(

(I

ID

DE

E1

1,

,

I

ID

DE

E2

2)

).

..

.1

15

5

Contents

5

2

2.

.3

3.

.1

11

1

F

FD

DD

D

C

Co

on

nn

ne

ec

ct

to

or

r

(

(F

FD

DD

D)

).

..

.1

16

6

2

2.

.3

3.

.1

12

2

S

Se

er

ri

ia

al

l

P

Po

or

rt

t

2

C

Co

on

nn

ne

ec

ct

to

or

r

(

(C

CO

OM

M2

2)

)

–

R

RS

S2

23

32

2/

/4

42

22

2/

/4

48

85

5

C

Co

on

nn

ne

ec

ct

to

or

r.

..

.1

17

7

2

2.

.3

3.

.1

13

3

C

CP

PU

U

F

Fa

an

n

C

Co

on

nn

ne

ec

ct

to

or

r

(

(F

FA

AN

N1

1)

).

..

.1

17

7

2

2.

.3

3.

.1

14

4

L

LA

AN

N

P

Po

or

rt

t

C

Co

on

nn

ne

ec

ct

to

or

r

(

(L

LA

AN

N1

1/

/L

LA

AN

N2

2)

).

..

.1

17

7

2

2.

.3

3.

.1

15

5

P

Pa

ar

ra

al

ll

le

el

l

P

Po

or

rt

t

/

/C

CO

OM

M1

1/

/U

US

SB

B2

2/

/A

Au

ud

di

io

oC

Co

on

nn

ne

ec

ct

to

or

r(

(C

CN

N1

1)

).

..

.1

18

8

CHAPTER 3: SYSTEM INSTALLING .................................. 19

3.1 INSTALLING THE DIMMS..................................................................... 20

3.2 INSTALLING THE CPU .......................................................................... 21

3.3 COMPLETING THE INSTALLATION ......................................................... 22

3.4 VIA SERVICE PACK (VIA 4IN 1).......................................................... 22

3

3.

.4

4.

.1

1

V

VI

IA

A

4

i

in

n

1

D

Dr

ri

iv

ve

er

r

I

In

ns

st

ta

al

ll

la

at

ti

io

on

n

P

Pr

ro

oc

ce

ed

du

ur

re

e:

:.

..

.2

22

2

3

3.

.4

4.

.2

2

A

Ab

bo

ou

ut

t

V

VI

IA

A

4

I

IN

N

1

d

dr

ri

iv

ve

er

rs

s:

:.

..

.2

23

3

3.5 INSTALLING AUDIO DRIVER .............................................................. 24

3.6 INSTALLING VGA DRIVER .................................................................. 25

3

3.

.6

6.

.1

1

V

VG

GA

A

D

Dr

ri

iv

ve

er

r

f

fo

or

r

W

Wi

in

nd

do

ow

ws

s

9

95

5/

/9

98

8.

..

.2

25

5

3

3.

.6

6.

.2

2

V

VG

GA

A

D

Dr

ri

iv

ve

er

r

f

fo

or

r

W

Wi

in

nd

do

ow

ws

s

N

NT

T

4

4.

.0

0.

..

.2

26

6

3

3.

.6

6.

.3

3

V

VG

GA

A

D

Dr

ri

iv

ve

er

r

f

fo

or

r

W

Wi

in

nd

do

ow

ws

s

2

20

00

0.

..

.2

29

9

3

3.

.6

6.

.4

4

V

VG

GA

A

D

Dr

ri

iv

ve

er

r

f

fo

or

r

W

Wi

in

nd

do

ow

ws

s

X

XP

P.

..

.3

30

0

3.7 CONFIGURING ETHERNET INTERFACE .................................................. 31

3

3.

.7

7.

.1

1

C

Co

on

nn

ne

ec

ct

t

th

he

e

N

Ne

et

tw

wo

or

rk

k

C

Ca

ab

bl

le

e.

..

.3

31

1

3

3.

.7

7.

.2

2

M

Ma

ak

ki

in

ng

g

a

S

Se

et

tu

up

p

F

Fl

lo

op

pp

py

y

D

Di

is

sk

k.

..

.3

32

2

3

3.

.7

7.

.3

3

C

Co

on

nf

fi

ig

gu

ur

ri

in

ng

g

t

th

he

e

N

Ne

et

tw

wo

or

rk

k

a

an

nd

d

I

In

ns

st

ta

al

ll

li

in

ng

g

t

th

he

e

D

Dr

ri

iv

ve

er

rs

s.

..

.3

32

2

3.8 INSTALLING DISKONCHIP OF M-SYSTEMS........................................... 39

3

3.

.8

8.

.1

1

I

In

ns

st

ta

al

ll

li

in

ng

g

t

th

he

e

D

Di

is

sk

k-

-O

On

n-

-C

Ch

hi

ip

p

2

20

00

0

:

:.

..

.3

39

9

3

3.

.8

8.

.2

2

C

Co

on

nf

fi

ig

gu

ur

ri

in

ng

g

t

th

he

e

D

Di

is

sk

kO

On

nC

Ch

hi

ip

p

2

20

00

0

a

as

s

t

th

he

e

b

bo

oo

ot

t

d

de

ev

vi

ic

ce

e:

:.

..

.4

40

0

3

3.

.8

8.

.3

3

C

Co

on

nf

fi

ig

gu

ur

ri

in

ng

g

t

th

he

e

D

Di

is

sk

kO

On

nC

Ch

hi

ip

p

2

20

00

0

a

as

s

t

th

he

e

f

fi

ir

rs

st

t

d

dr

ri

iv

ve

e:

:.

..

.4

40

0

CHAPTER 4: BIOS CONFIGURATION ............................... 42

4.1 ENTERING SETUP ................................................................................. 42

4.2 THE MAIN MENU................................................................................. 43

4.3 STANDARD CMOS SETUP ................................................................... 44

4.4 IDE PRIMARY MASTER........................................................................ 45

4.5 ADVANCED BIOS FEATURES ............................................................... 46

4.6 ADVANCED CHIPSET FEATURES ........................................................... 47

4.7 INTEGRATED PERIPHERALS .................................................................. 48

4.8 POWER MANAGEMENT SETUP ............................................................. 49

Contents

6

4.9 PC HEALTH STATUS ............................................................................. 50

4.10 FREQUENCY/VOLTAGE CONTROL ...................................................... 51

4.11 LOAD FALL-SAFE DEFAULTS.............................................................. 52

4.12 LOAD OPTIMIZED DEFAULTS ............................................................. 53

4.13 POWER ON BOOT............................................................................... 53

4.14 BIOS REFERENCE – POST CODES.................................................... 54

4.15 UPDATING BIOS................................................................................ 59

1

C h a p t e r 1

Introduction

This chapter gives a brief introduction and provides the

specifications of the MSC-1610 Half-sized single board computer.

1.1 Check List

Before getting started, please check if your

MSC-1610package includes the following items:

 MSC-1610 Socket 370 CPU board x 1pc

 Driver & Utility CD x 1pc

 FDD cable x 1 pc

 HDD cable x 1 pc

 Printer extension cable with bracket x 1 pc

 Audio extension cable with bracket x 1 pc

 COM1/COM2 cable with bracket x 1pc

 USB extension cable. (Option)

 User’s manual x 1 pc

1.2 Features

The MSC-1610 is a full featured, industrialized, half-size

single board computer with a high-frequency Intel Pentium

III®, or Celeron®processor (FC-PGA & FC-PGA2 package)

that brings advanced CPU technology and processing power

to the latest PCI applications. The Via Apollo Pro133T

Chipset built into the single board computer is the most

efficient and reliable way to upgrade existing PCI systems to

Pentium III technology.

MSC-1610 User’s Manual

2

The MSC-1610 uses the PCI form factor with Socket 370 to

fit in FC-PGA and FC-PGA2 processor from Intel. The PCI

design contains one gold leaf edge connectors compatible

with PCI connectors to allow all peripherals to interface with

the processor. This lets the MSC-1610 take advantage of the

high pin density and strict electro-mechanical criteria

imposed on PCI connectors.

The MSC-1610single board computer is further enhanced by

the CHIPS 69030 Graphics Accelerator to deliver the most

advanced graphics and video support available. The 69030

supports a wide variety of monochrome and color panels,

such as: Single-Panel, Single-Drive (SS) and Dual-Panel,

Dual-Drive (DD), standard and high resolution, passive STN

and active matrix TFT LCD, and EL panels. With HiQColor

technology, up to 256 gray scales are supported on passive

STN LCDs. Up to 16.7M different colors can be displayed

on passive STN LCDs and up to 16.7M colors on 24 bit

active matrix LCDs.

The MSC-1610combines the many features needed for

system operation into one compact single board computer.

These include 10/100 TX LAN adapter, Ultra/DMA drive

controllers, high performance serial ports, enhanced parallel

port, and the latest BIOS features. Additional enhancements

to the MSC-1610 include four USB ports and a

programmable watchdog timer. Single dual in-line memory

module (DIMM) sockets support up to 512MB of

synchronous DRAM (SDRAM) memory. An internal 64-bit

second level (L2) cache supports 128/512k of memory. The

L2 cache speed is half the CPU core frequency. The Celeron

L2 cache equals 128k running at full CPU core.

Chapter 1: Introduction

3

The VIA Apollo Pro133T chipset in the MSC-1610

incorporates the latest microprocessor technology from Intel

to provide the increased bandwidth needed to operate your

system bus at speeds up to 133MHz. (The VIA Apollo

Pro133T chipset uses one chipset for three 66MHz

100MHz and 133MHz system designed in Pentium III, and

Celeron processors with speeds of 733, 850 and 1.26 GHz.).

The VIA Apollo Pro133T chipset is a two-chip set

comprised of the VT82C694T North Bridge Controller and

the VT82C686B South Bridge Controller. PC100/133

SDRAM provide the bandwidth necessary for running

demanding software and Internet applications while

benefiting from the reliability and cost advantages of

SDRAM infrastructure. The VIA Apollo Pro133T chipset is

a PCI Rev 2.2 compliant that supports 3.3V and 5V 33MHz

PCI operations. The VIA694T chip includes Desktop Power

Management support, enhanced DMA controller and an

integrated IDE controller with Ultra DMA/100 support. In

addition, it provides USB host interface support for four

USB ports and a System Management Bus (SMB) with

support for DIMM Serial PD.

MSC-1610 User’s Manual

4

1.3 Specifications

 Processors Supported

 Intel Pentium III

- FC-PGA2 133Mhz FSB (1.13GHz-1.26GHz)

- FC-PGA 100 /133MHZ (500E-1GHz)

 Intel Celeron (FC-PGA & FC-PGA2)

- FC-PGA2 100MHz FSB (1AGHz- 102GHz)

- FC-PGA 66 / 100MHz (533A-1GHz)

 Processor Clock Frequency and Bus Speed

 66 /100 /133MHz internal frequency and bus speed

 Memory Capacity

 32MB minimum

 512MB maximum

 DIMM Support

 1 DIMM, gold contacts, 168-pin

 Non-ECC / ECC compatible

 Memory Speed Required

 64 / 72-bit SDRAM ( 66 / 100 / 133 MHz )

 BIOS

 Hi-Flex Pentium AWARD BIOS, Flash EPROM

support, Plug-and-Play compatible

 2Mb flash upgradeable supporting BIOS upgrade via

software

 Full support for Year 2000 and leap-year date functions

MiTAC MSC-1610 Manual de usuario

Manuales populares de Placa madre de otras marcas