Linear Technology DC2191A Guía de configuración rápida

dc2191afa

DEMO MANUAL DC2191A

DESCRIPTION

RF Transmitter Using LTC2000

16-Bit, 2.5Gsps to 2.7Gsps DAC

Demonstration circuit 2191A supports the LT C

2000, a

high speed, high dynamic range DAC driving the LT5579

upconverting mixer.

The circuitry on the DAC IF output is optimized for analog

frequenciesfromDCto500MHz.Thecircuitry on the LO input

is optimized for frequencies from 1000MHz to 4300MHz.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

PERFORMANCE SUMMARY

The circuitry on the RF output is optimized for frequencies

from 2200MHz to 2600MHz.

Design files for this circuit board are available at

http://www.linear.com/demo/DC2191

Specifications are at TA= 25°C

PARAMETER CONDITIONS MIN TYP MAX UNITS

Supply Voltage – DC2191 This supply must provide up to 1100mA 4.8 5.0 5.2 V

Sampling Frequency (Sample Clock Frequency)* 300 2500 or 2700 MHz

Sample Clock Level (Single-Ended) Use a 50Ω Source 0 15 dBm

LVDS Inputs Differential Input Voltage Range

Common Mode Voltage Range

±0.2

0.4

±0.6

1.8

LO Input Frequency Range 750 4300 MHz

*DC2191A-A Features the LTC2000-16, 16-Bit, 2.5Gsps DAC

dc2191afa

DEMO MANUAL DC2191A

QUICK START PROCEDURE

DC2191 is easy to set up to evaluate the performance of the

LTC2000 + LT5579. Refer to Figure 1 for proper measure-

ment equipment set-up and follow the procedure below.

SOFTWARE

The software for the DC2191, LTDACGen is available at

www.linear.com/LTDACGEN free of charge. It simplifies

the creation of complex waveforms and loading them into

the FPGA to test the DC2191. For more information about

how to use the LTDACGen software, refer to the help files

that come with the software.

APPLYING POWER AND SIGNALS TO THE DC2191

DEMONSTRATION CIRCUIT

If a Stratix IV demo board is used to supply data to the

DC2191, the two boards should first be bolted together and

a proper connection should be made. If Linear Technology

provided the Stratix IV board the proper bit file is already

installed in flash memory and will begin to operate when

the board is powered on. If an unprogrammed FPGA board

is used, refer to the Stratix IV GX Development Board

Reference Manual on how to program it.

Power should be applied to the system in this order:

1. Connect the Altera board to the provided power supply.

2. Connect the USB cable to J7.

3. Apply a clock to J4.

4. Connect an LO source to J6.

5. Turn on the voltage to the Altera board.

6. Connect the 5V from a bench supply to the +5V turret

on the DC2191.

7. Open the LTDACGen software and hit connect.

LTDACGen should report back that it is connected to the

FPGA. See Figure 2:

dc2191afa

DEMO MANUAL DC2191A

QUICK START PROCEDURE

Figure 1. DC2191 Setup (zoom for details)

SINGLE-ENDED

SAMPLE CLOCK INPUT

CONNECT USB TO PC

RUNNING LTDACGen SOFTWARE

JUMPERS SHOWN IN THEIR DEFAULT POSITIONS

THE DC2191 CONNECTS TO THE ALTERA STRATIX IV

GX FPGA DEVELOPMENT BOARD VIA HSMC CONNECTORS

RF OUTPUT

LO INPUT

dc2191afa

DEMO MANUAL DC2191A

QUICK START PROCEDURE

Figure 2. LTDACGen Connected to FPGA

dc2191afa

DEMO MANUAL DC2191A

QUICK START PROCEDURE

Figure 3. Default Frequency

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DEMO MANUAL DC2191A

QUICK START PROCEDURE

ANALOG OUTPUT NETWORK

The analog output network of the DC2191 has been de-

signed to maximize the performance of the LTC2000. The

LTC2000 drives a chebyshev lowpass filter with a corner

at 500MHz.

SAMPLE CLOCK

The sample clock to the DC2191 demonstration circuit

board is marked J4. As a default it is a single-ended 50Ω

input port. There is an onboard balun that does a single-

ended to differential translation.

For the best noise performance, the sample input must

be driven with a very low jitter signal generator source.

The amplitude should be as large as possible up to ±1.8V

or 9dBm.

RESULTS

After everything is set up and the software is con-

nected to the DAC demo system, a sine wave can be

added to the output waveform. The default frequency is

399.932861328MHz (Figure 3). By clicking Update FPGA,

the data is sent to the FPGA and is then used to program

the DAC. A spectrum analyzer can then be used to view

the results at J5.

HARDWARE SETUP

SMAs

J2 & J3: Differential Trigger Input. Apply a signal to J2 from

a50Ω driver. Absorptive filters are required for data sheet

performance. UseJ2andJ3ifthe triggerisadifferentialsignal.

J4: Sample Clock Input. Apply a clock signal to this SMA

connector from a 50Ω driver. A 0dBm clock source should

be sufficient, but for best phase noise and jitter perfor-

mance, use the highest possible amplitude and slew rate.

J5: RF Output Signal. This is the upconverted output of

the DAC if the output impedance is 50Ω. Connect to a

spectrum analyzer.

J6: LO Input Signal. This is the local oscillator input to

the upconverting mixer. Nominal power level is 0dBm.

J8: SYNC. This SMA is to provide access to the sync pin

of the LT8614. It is not used in normal use.

Turrets

+5V: Positive Input Voltage for the DAC, Mixer, and Digital

Circuits. This voltage feeds a series of regulators that supply

the proper voltages for the DAC. The voltage range for this

turret is 4.8V to 5.2V. Note: For close-in phase noise plots,

driving this voltage is not ideal. There is a known 20kHz noise

hump in the spectrum that is generated by the regulators. For

the best phase noise performance, back drive the onboard

regulators with the provided turrets from a low noise supply.

GND: Ground Connection. This demo board has only a

single ground plane. This turret should be tied to the GND

terminal of the power supply being used.

SVDD3V0: Optional 3.0V Input. This pin is connected

directly to the SVDD pin of the DAC. It requires a supply

that can deliver up to 100mA. Driving this pin will shut

down the onboard regulator.

AVDD3V3: Optional 3.3V Input. This pin is connected

directly to the AVDD33 pin of the DAC. It requires a supply

that can deliver up to 450mA. Driving this pin will shut

down the onboard regulator.

DVDD3V3: Optional 3.3V Input. This pin is connected

directly to the DVDD33 pin of the DAC. It requires a sup-

ply that can deliver up to 50mA. Driving this pin will shut

down the onboard regulator.

AVDD1V8: Optional 1.8V Input. This pin is connected

directly to the AVDD18 pin of the DAC. It requires a supply

that can deliver up to 1A. Driving this pin will shut down

the onboard regulator.

DVDD1V8: Optional 1.8V Input. This pin is connected

directly to the DVDD18 pin of the DAC. It requires a supply

that can deliver up to 500mA. Driving this pin will shut

down the onboard regulator.

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DEMO MANUAL DC2191A

VP1: This is a test point that is at the output of the on-

board switching regulator. It is meant for test purposes.

It can also be driven to 2.5V to shut down the output of

the switching regulator.

TSTP & TSTN: These pins are tied directly to the TSTP

and TSTN pins of the DAC. They can be used to measure

the internal temperature and timing of the LVDS inputs.

FSADJ: This is an optional pin that is tied directly to the

FSADJ pin of the DAC. It can be used to set the full-scale

output current of the DAC. In normal operation this pin

is tied to GND through 500Ω to set a current of 40mA at

the output.

REFIO: This pin is tied directly to the REFIO pin of the

DAC and is used to set the reference voltage for the DAC.

Normally it is internally set to 1.25V but can be overdriven

with an external voltage from 1.1V to 1.4V.

Jumpers

The DC2191 demonstration circuit should have the fol-

lowing jumper settings as default positions.

JP1: PD. In the RUN position this pin results in normal

operation of the DAC. In the SHDN position the DAC is

powered down. (Default: RUN or up)

JP2: SPI and JTAG. This jumper selects how the FPGA is

programmed. In the SPI position the FPGA is programmed

from the onboard FTDI chip and the LTDACGen software.In

the JTAG position the J9 is used with a JTAG programmer

to program the FPGA. (Default: SPI or down)

Connectors

J1: DC590. This is an optional header that can be used

to program the DAC with the DC590. (Default: removed)

J9: JTAG. This is an optional header that can be used to

program the FPGA through a JTAG programmer. (Default:

removed)

J7: USB. Connect a USB cable from J7 to a computer with

the LTDACGen software installed.

J10 & J11: HSMC Connectors. These connectors are

designed to connect to the Altera Stratix IV development

board. All of the communication between the FPGA and

the DAC is routed through these connectors.

dc2191afa

DEMO MANUAL DC2191A

PARTS LIST

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

Required Circuit Components

1 13 C1, C25, C26, C29, C31, C32, C33, C34,

C35, C36, C37, C71, C72

CAP., X7R, 0.1µF, 16V 10% 0402 AVX, 0402YC104KAT2A

2 4 C2, C3, C8, C19, C78, C94 CAP., NPO, 0.01µF, 25V, 5%, 0603 TDK, C1608C0G1H103J

3 9 C4, C6, C9, C11, C14, C18, C67, C68,

C69, C76, C77, C81

CAP., X7R, 1µF, 16V 10% 0603 AVX, 0603YC105KAT2A

4 5 C5, C7, C10, C12, C15 CAP., TANT., 47µF, 16V, 10%, 7343 AVX, TAJD476K016RNJ

5 6 C13, C16, C27, C28, C73, C74 CAP., X5R, 4.7µF, 16V, 20%, 1206 TDK, C3216X5R1C475M

6 3 C17, C40, C82 CAP., X5R, 10µF, 10V, 20%, 0603 AVX, 0603ZD106MA2T

7 1 C20 CAP., C0G, 4.7pF, 50V ± 0.25pF, 0603 AVX, 06035A4R7CAT2A

8 2 C21, C24 CAP., X7R, 0.1µF, 16V, 10%, 0603 TDK, C1608X7R1C104K

9 1 C22 CAP., X7R, 1µF, 25V, 10%, 0603 TDK, C1608X7R1E105K

10 2 C23, C70 CAP., X7R, 47µF, 10V, 10%, 1210 MURATA, GRM32ER71A476KE15L

11 1 C30 CAP., X5R, 3.3µF, 16V, 10%, 0603 TDK, C1608X5R1C335K

12 2 C38, C39 CAP., COG, 27pF, 50V, 5%, 0402 TDK, C1005C0G1H270J

13 2 C89, C88 CAP., COG, 5.6pF, 50V, 5%, 0402 TDK, C1005C0G1H5R6J

14 2 C90, C93 CAP., COG, 22pF, 50V, 5%, 0402 TDK, C1005C0G1H220J

15 1 C83 CAP., COG, 2.7pF, 50V, 5%, 0402 TDK, C1005C0G1H2R7J

16 1 C85 CAP., COG, 1.2pF, 50V, 5%, 0402 TDK, C1005C0G1H1R2J

17 1 C79 CAP., COG, 10pF, 50V, 5%, 0402 TDK, C1005C0G1H100J

18 1 C80 CAP., COG, 100pF, 50V, 5%, 0402 TDK, C1005C0G1H101J

19 2 C41, C42 CAP., COG, 100pF, 25V, 5%, 0201 TDK, C0603C0G1E101J

20 1 C43 CAP., X5R, 0.01µF, 16V, 10%, 0402 MURATA, GRM155R61C103KA01D

21 1 C44 CAP., X7R, 47nF, 25V, 10%, 0402 MURATA, GRM155R71E473KA88D

22 9 C45, C48, C49, C53, C54, C58, C61, C62,

C64

CAP., X5R, 100µF, 6.3V, 20%, 1206 TDK, C3216X5R0J107M

23 10 C46, C50, C51, C52, C55, C56, C57, C59,

C60, C63

CAP., X7S, 2.2µF, 4V, 20%, 0306 MURATA, LLL185C70G225ME01L

24 1 C47 CAP., COG, 10pF, 25V, 5%, 0201 MURATA, GRM0335C1E100JA01D

25 0 C65, C84, C86, C91, C92 CAP., OPT, 0402 OPTION

26 1 C66 CAP., NP0, 1pF, 25V ±.25pF, 0402 AVX, 04023A1R0CAT2A

27 1 C75 CAP., X7R, 10µF, 50V, 10%, 1210 MURATA, GRM32ER71H106KA12L

28 1 D1 DIODE, TVS, 70V, SMA DIODES INC./ ZETEX, SMAT70A-13-F

29 1 D2 DIODE, TVS, 24V, SMA DIODES INC./ ZETEX, SMAJ24A-13-F

30 1 D3 LED,RED, WATERCLEAR, 0805 WURTH, 150080RS75000

31 10 E1, E2, E3, E5-E11 TEST POINT, TURRET, .061, PBF MILL-MAX, 2308-2-00-80-00-00-07-0

32 2 E4, E12 TEST POINT, TURRET, .094, PBF MILL-MAX, 2501-2-00-80-00-00-07-0

33 2 JP1, JP2 HEADER, 3 PIN, .079 SULLINS, NRPN031PAEN-RC

34 1 J1 HEADER, 2 × 7 DUAL ROW MOLEX 87831-1420

35 3 J2, J3, J8 CON.,SMA JACK, STRAIGHT, THRU-HOLE AMPHENOL CONNEX, 132134

36 1 J4 CON., SMA PCB TOP MOUNT AEP, 9650-1113-005

37 2 J5, J6 CON., SMA 50 OHM EDGE-LAUNCH EMERSON, 142-0701-851

dc2191afa

DEMO MANUAL DC2191A

PARTS LIST

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

38 1 J7 CONNECTOR, USB TYPE B, RIGHT ANGLE PCB

MOUNT

FCI, 61729-0010BLF

39 1 J9 HEADER, 2 ×5, 0.100 SAMTEC, TSW-105-07-L-D

40 2 J10, J11 CONNECTOR, HSMC SAMTEC, ASP-122952-01

41 6 L1, L2, L3, L4, L6, L7 FERRITE BEAD, 33Ω at 100mhz, 1206 MURATA, BLM31PG330SN1L

42 1 L5 INDUCTOR, 2.2µH, 20% HIGH CURRENT, SMT VISHAY, IHLP2020BZER2R2M11

43 1 L8 INDUCTOR, CERAMIC CHIP, 1nH, 5%, 0402 COILCRAFT, 0402CS-1N0XJLU

44 1 L9 FERRITE BEAD, 30Ω at 100Mhz, 0805 TDK, MPZ2012S300A

45 1 L10 INDUCTOR, 6.8µH, 20% HIGH CURRENT, SMT VISHAY, IHLP2020BZER6R8M11

46 2 L18, L19 IND, 3.3nH, 5%, 0402 TOKO, LL1005-FHL3N3S

47 2 L16, L17 IND, 3.9nH, 5%, 0402 TOKO, LL1005-FHL3N9S

48 1 L13 IND, 1.8nH, 5%, 0402 TOKO, LL1005-FHL1N8S

49 1 L12 IND, 2.7nH, 5%, 0402 TOKO, LL1005-FHL2N7S

50 2 L20, L21 IND, 560nH, 5%, 0603 COILCRAFT, 0603HL-561XJR

51 2 L14, L15 RES., CHIP, 0Ω, JUMPER, 1/16W, 0402 VISHAY, CRCW04020000Z0ED

52 5 MP1-MP5 MACHINE SCREW, NYLON, #4-40 ×1/2 IN.,

SLOTTED

EAGLE PLASTIC DEVICES, 561-J440.5

53 2 MP6-MP7 HEX STANDOFF, NYLON, #4-40 ×1/2 IN.,

THREADED

KEYSTONE, 1902C

54 4 MP8-MP11 SPACER, NYLON, 5mm L ×3.2mm DIA. BIVAR, 9908-5MM

55 2 MP12-MP13 STANDOFF, NYLON, 3/4 IN. KEYSTONE, 8834

56 4 MP14-MP17 STANDOFF, NYLON, #4-40 ×1/4 IN. MICROPLASTICS, #14HTSP101

57 2 MP18, MP19 STANDOFF, NYLON 3/4" KEYSTONE, 8834

58 2 Q1, Q2 TRANSISTOR, N-CH. POWER MOSFET, SOIC 8L FAIRCHILD, FDS8870

59 6 R1, R2, R3, R13, R17, R30 RES., CHIP, 1k, 1/16W, 5%, 0402 VISHAY, CRCW04021K00JNED

60 1 R4 RES., CHIP, 4.7k, 1/16W, 5%, 0402 YAGEO, RC0402JR-074K7L

61 4 R5, R14, R15, R16 RES., CHIP, 10k, 1/16W, 5%, 0402 YAGEO, RC0402JR-0710KL

62 2 R6, R8 RES., CHIP, 2k, 1/16W, 5%, 0402 VISHAY, CRCW04022K00JNED

63 0 R7, R10, R36, R37, R38, R39 RES., CHIP, DNI, 0402 OPTION

64 1 R9 RES., CHIP, 39Ω, 1/16W, 1%, 0402 VISHAY, CRCW040239R0FKED

65 3 R11, R57, R58 RES., CHIP, 0Ω JUMPER, 1/16W, 0402 VISHAY, CRCW04020000Z0ED

66 1 R12 RES., CHIP, 12k, 1/16W, 5%, 0402 VISHAY, CRCW040212K0JNED

67 1 R18 RES., CHIP, 2.2k, 1/16W, 5%, 0402 VISHAY, CRCW04022K20JNED

68 2 R19, R20 RES., CHIP, 3.24k, 1/16W, 1%, 0402 VISHAY, CRCW04023K24FKED

69 1 R21 RES., CHIP, 1k, 1/16W, 1%, 0402 YAGEO, RC0402FR-071KL

70 1 R22 RES., CHIP, 7.15k, 1/16W, 1%, 0402 VISHAY, CRCW04027K15FKED

71 2 R26, R29 RES., CHIP, 49.9Ω, 1/6W, 1%, 0201 VISHAY, CRCW020149R9FNED

72 7 R31, R32, R33, R34, R35, R41, R42 RES., CHIP, 10Ω, 1/16W, 1%, 0402 VISHAY, CRCW040210R0FKED

73 1 R45 RES., CHIP, 499Ω, 1/16W, 1%, 0402 VISHAY, CRCW0402499RFKED

74 1 R49 RES., CHIP, 41.2k, 1/10W, 1%, 0603 VISHAY, CRCW060341K2FKEA

75 1 R50 RES., CHIP, 309k, 1/10W, 1%, 0603 VISHAY, CRCW0603309KFKEA

76 1 R51 RES., CHIP, 243k, 1/10W, 1%, 0603 VISHAY, CRCW0603243KFKEA

dc2191afa

DEMO MANUAL DC2191A

PARTS LIST

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

77 1 R52 RES., CHIP, 50Ω, 1/8W, 5%, 0603 VISHAY, FC0603E50R0JST1

78 1 R53 RES., CHIP, 560Ω, 1/10W, 5%, 0603 VISHAY, CRCW0603560RJNEA

79 1 R54 RES., CHIP, 10k, 1/10W, 1%, 0603 VISHAY, CRCW060310K0FKEA

80 4 R55, R56, R59, R60 RES., CHIP, 20Ω, 1/16W, 1%, 0402 VISHAY, CRCW040220R0FKED

81 2 R61, R62 RES., CHIP, 11Ω, 1/16W, 1%, 0402 VISHAY, CRCW040211R0FKED

82 1 T1 TRANSFORMER, BALUN ANAREN, B0430J50100AHF

83 1 U2 IC, USB TO MULTIPURPOSE UART/FIFO, TQFP FTDI, FT2232HL

84 1 U3 IC, QUAD MUX/DEMUX, TSSOP-16 FAIRCHILD, FST3257MTCX

85 1 U4 IC, EEPROM 1KBIT 3MHz, 8TSSOP MICROCHIP, 93LC46C-I/ST

86 1 U5 IC, MICROPOWER REGULATOR, SO-8 LINEAR TECH., LT1763CS8-3#PBF

87 2 U6, U7 IC, MICROPOWER REGULATOR, SO-8 LINEAR TECH., LT1763CS8-3.3#PBF

88 1 U8 IC, BUCK REGULATOR, QFN LINEAR TECH., LT8614IUDC#PBF

89 1 U9 IC, VOLTAGE REFERENCE, MSOP LINEAR TECH., LTC6655CHMS8-

2.048#PBF

90 2 U10, U11 I.C., LOW DROPOUT REGULATOR, 3mm ×3mm, DFN LINEAR TECH., LT3080EDD#PBF

91 1 U12 I.C., 80V IDEAL DIODE, DFN-6L LINEAR TECH.,LTC4359HDCB#TRPBF

92 1 U13 IC, MIXER LINEAR TECH, LTC5579IUH

93 2 XJP1, XJP2 SHUNT, 2mm SAMTEC, 2SN-BK-G

94 1 Y1 CRYSTAL, 12.0MHz, SMT ABRACON, ABMM2-12.000MHZ-E2-T

DC2191A-A Required Circuit Components

1 1 GENERAL BOM DC2191A

2 1 U1 IC, 16-BIT 2.5Gsps DAC LINEAR TECH. LTC2000IY-16

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