Datum 5094-101 Manual de usuario

-c:c·1

1111111

PERIPHERAL

EQUIPMENT

DIVISION

INSTRUCTION

MANUAL

MODEL

5094-101

TWO-PORT

MULTIPLEXER

PUBLICATION

NO.

1802.3

••••••••••••••••

••••••••••

SEPTEMBER

1974

DATUM

NC.

1363

South

State

College

Boulevard

Anaheim,

California

92806

PERIPHERAL

EQUIPMENT

DIVISION

INSTRUCT

ION

MANUAL

MODEL

5094-101

TWO-PORT

MULTIPLEXER

PUBLICATION

NO.

1802.3

Section

111

TABLE

CONTENTS

GENERAL

DESCRIPTION

1•1

1•2

1.3

1.4

Introduction

••••••••••

•••••••••••••••.••

Purpose

Equipment

•••••••.••••••••••••

Physical

Description

•••••••••••.••••••••

Functional

Description

••••••••••••••••••

INSTALLATION

AND

OPERATION

2.2

2.2.2

2.3

Genera1

Installation

••••.•••••••••

•••••••••••••

Power

•••.•••••••••••••••••••••••••••••

• •

Interface

Connectors

••••••••••••••••••••

Operation

•••••••••••••••••••••••••••••••

THEORY

OPERATION

3. 1

3.2

3.3

.3.

3.3.2

3.3.3

3.3.4

3.3.5

3.4

3.5

Genera1

Block Diagram

Description

•••••••••••••••

Logic

Description

•••••.•••••••••••••••••

Cont

Log

i c

••••••

•••.••••••••••••••••

Data Input

Bus

••••••••.•••••••••••••••••

Address

Bus

••••.••••••••••••••••••••••••

Data Output

Bus

•••••••••••••••••••••••.•

Control

Signals

Repowering

•••••••••.••••

Logic Elements

······················~···

Logic

Symbols

•..•.•.••••••••••••.•.•••••

MAINTENANCE

4.2

4.2.l

DRAWINGS

General

Maintenance Aids

•••.••••.••.••••••••••••

Drawings

••••••••••••••••••••••••••••••••

1-1

1-2

2-1

2-2

3-1

3-2

3-3

4-1

1.1

INTRODUCTION

SECTION

GENERAL

DESCRIPTION

This

technical

manual

contains

operating,

installation,

and

maintenance

information

for

the

DATUM

Model

5094-101

Multiplexer.

The

manual

organized

five

sections.

Section

contains

general

phy-

sical

and

functional

information,

Section

contains

information

for

installing

and

operating

the

Multiplexer,

and

Section

Ill

includes

Mul-

tiplexer

theory

the

block

diagram and

logic

level.

Sections

and

respectively,

contain

maintenance

information

and

the

reference

draw-

ings.

1.2

PURPOSE

EQUIPMENT

The

Model

5094-101

Multiplexer

allows

the

connection

two

peripheral

devices

the

IBM

1130

SAC

channel.

typical

application

would be

the

connection

magnetic

tape

system and a

high-speed

line

printer

the

IBM

1130.

1.3

PHYSICAL

DESCRIPTION

The

Multiplexer

(Drawing 5094-101)

consists

printed

cir-

cuit

card

and a power

supply

mounted

a 19"

x·

3.5

box. The box

furnished

with

standard

RETMA

hole

spacing

for

the

3.5

high

front

panel.

The

front

panel

contains

the

power

on-off

pushbutton,

and

the

rear

panel

contains

the

connectors

for

interfacing

the

computer and

per-

ipheral

devices.

1.4

FUNCTIONAL

DESCRIPTION

The

Model

5094-101

Multiplexer

receives

and

repowers

all

the

signals

and from

the

computer and

peripheral

devices.

controls

and

determines

the

priority

the

cycle

steal

operations

the

two

peripheral

devices.

Connectors

Jl02

and J103

are

identical

the

IBM

SAC

channel.

1-2

SECTION

INSTALLATION

AND

OPERATION

GENERAL

This

section

the

manual

describes

the

installation

and

operation

the

Model

5094-101

Multiplexer.

2.2

INSTALLATION

The

Multiplexer

shipped

fully

assembled

and

ready

for

oper-

ation.

assembly

required

other

thar'I

connection

the

Multi_Plexer

source

power and

connection

the

computer and

peripheral

device

interface

cables.

2.2.

l Power

The

Multiplexer

operates

120/230-volt,

60 Hz,

single-phase

power. Connect

the

source

the

Hubbel

connector

provided

the

rear

panel

the

Multiplexer.

Ensure

that

a 2-ampere

Slo~Blo

fuse

installed

the

fuse

socket.

2.2.2

Interface

Connectors

The

functions

the

interface

connectors

located

the

rear

the

Multiplexer

are

listed

Table

2.1.

2-1

The

signal

cable

from

the

IBM

1130

SAC

channel

plugged

into

connector

JlOl.

The

signal

cable

from

the

higher

priority

device

connects

Jl02,

and

the

signal

cable

from

the

lower

priority

device

connects

Jl03.

2.3

OPERATION

only

one

device

operated,

the

connector

for

the

second

device

must be

left

open.

makes

difference

which

connec-

tor

used

for

single

device.

Tab 1e

nte

ace

Connector

Functions

CONNECTOR

FUNCTION

JlOl

Interface

the

computer

lo2

Channel I ] I -

highest

priority

Channel •

2•

-1

owe

st pr io r i ty

2:-2

SECTION

Ill

THEORY

OPERATION

3.1

GENERAL

The

theory

operation

describes

the

detailed

functions

the

Model

5094-101

Multiplexer.

The

descriptions

begin

the

block

diagram

level

and

then

proceed

through

descriptions

the

logic

dia-

gram.

3.2

BLOCK

DIAGRAM

DESCRIPTION

(DRAWING

800526)

The

block

diagram shows

the

flow

the

data

and from

the

computer and

peripheral

devices.

The

arrows show

the

direction

the

data

flow.

The

sheet

numbers

shown

each

box

refer

the

sheet

numbers

Drawing 76085 where

that

particular

logic

shown.

The

control

lines

(out

the

control

logic)

which

control

some

the

gating

functions

are

now

shown.

The

block

diagram shows

the

IBM

1130

SAC

channel

the

right-

hand

side

the

drawing;

the

two

peripheral

devices

are

shown on

the

left-hand

side.

The

SAC

Device #1

the

higher

priority

device.

3.3

LOGIC

DESCRIPTION

.3.

Control

Logic (76085,

Sheet

This

logic

handles

the

priority

the

cycle

steal

requests

from

the

two

peripheral

devices.

3-1

Flip-flop

REQ

the

channel

cycle

steal

request.

used

synchronize

the

incoming

cycle

steal

request

with

the

phase A

signal

from

the

computer

when

the

computer

the

wait

mode

and

clocks

are

available.

SELl

determines

which

device

serviced.

3.3.2 Data Input Bus (76085,

Sheet

This

logic

receives

the

16-bit

data

words from

the

two

peri-

pheral

devices

and

1s them

drive

the

data

input

bus

the

SAC

channe1.

3.3.3 Address

Bus

(76085,

Sheet

This

logic

receives

the

16-bit

address

words from

the

two

per-

ipheral

devices

and

gates

one

them, depending on which

being

ser-

Viced

the

time,

out

onto

the

address

bus

the

SAC

channel.

3.3.4

Data Output

Bus

(76085,

Sheet

This

logic

receives

the

16-bit

data

word from

the

SAC

channel

and repowers

for

the

two

peripheral

devices.

3.3.5

·control

Signals

Repowering (76085,

Sheets

5 and 6)

This

logic

receives

the

control

signals

from

the

SAC

channel

and repowers them

for

the

two

peripheral

devices.

3.4

LOGIC

ELEMENTS

All

logic

elements

are

Signetics

TTL

Utilogic

integrated

circuits

dua1-inline

packages.

Logic diagrams

for

these

elements

can be found

the

back

this

section.

3-2

The

logic

elements

are

mounted in

wire-wrap

sockets

printed

circuit

cards.

All

circJit

interconnections

are

made

wire-wrap

con-

nections.

Circuit

elements

are

easily

replaceable

by removing them from

their

sockets

and

replacing

them

with

equ!valent

elements.

Integrated

circuits

are

used

throughout

wherever

possible.

Exceptions

are

relay

and

lamp

drivers.

3.5

LOGIC

SYMBOLS

The

logic

symbols

are

derived

from MIL-STD-806B, and

they

are

utilized

in such a manner

that

signals

can be

traced

through

the

logic

terms

''high

and

"low"

(+2.5

+5V)

and

(OV)

examination

the

logic

symbols

without

the

need

memorize

the

electrical

characteristics

(NANO,

NOR,

AND,

OR,

etc.)

the

circuits

(which most

other

logic

draw-

ing schemes

require).

The

"high"

and "low"

signal

level

indication

illustrated

straight

line

for

high"

signal

and a

small

circle

for

low

·signal

level.

The

following

symbol

shapes

are

used:

"OR"

SYMBOL

AND

SYMBOL

The use

straight

lines

circles

inputs

and

outputs

these

basic

symbols

completely

defines

the

function

the

circuit

performs,

the

input

signal

levels

required

activate

the

circuit,

and

the

output

signal

level

when

the

circuit

activated.

3-3

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